cpu/saml21: adapted UART driver
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@ -21,53 +21,30 @@
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* @}
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*/
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#include "board.h"
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#include "cpu.h"
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#include "periph/uart.h"
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#include "periph_conf.h"
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#include "sched.h"
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#include "thread.h"
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/* guard file in case no UART device was specified */
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#if UART_NUMOF
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/**
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* @brief Each UART device has to store two callbacks.
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*/
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typedef struct {
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uart_rx_cb_t rx_cb;
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uart_tx_cb_t tx_cb;
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void *arg;
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} uart_conf_t;
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/**
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* @brief Unified interrupt handler for all UART devices
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*
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* @param uartnum the number of the UART that triggered the ISR
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* @param uart the UART device that triggered the ISR
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*/
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static inline void irq_handler(uart_t uartnum, SercomUsart *uart);
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#include "periph/uart.h"
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/**
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* @brief Allocate memory to store the callback functions.
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*/
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static uart_conf_t uart_config[UART_NUMOF];
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static uart_isr_ctx_t uart_config[UART_NUMOF];
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static uint64_t _long_division(uint64_t n, uint64_t d);
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int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, uart_tx_cb_t tx_cb, void *arg)
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static int init_base(uart_t uart, uint32_t baudrate);
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int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
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{
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/* initialize basic functionality */
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int res = uart_init_blocking(uart, baudrate);
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int res = init_base(uart, baudrate);
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if (res != 0) {
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return res;
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}
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/* register callbacks */
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uart_config[uart].rx_cb = rx_cb;
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uart_config[uart].tx_cb = tx_cb;
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uart_config[uart].arg = arg;
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/* configure interrupts and enable RX interrupt */
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@ -81,7 +58,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, uart_tx_cb_t t
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return 0;
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}
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int uart_init_blocking(uart_t uart, uint32_t baudrate)
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static int init_base(uart_t uart, uint32_t baudrate)
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{
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/* Calculate the BAUD value */
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uint64_t temp1 = ((16 * ((uint64_t)baudrate)) << 32);
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@ -134,54 +111,42 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
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break;
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#endif
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default:
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(void)baud_calculated;
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return -1;
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}
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uart_poweron(uart);
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return 0;
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}
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void uart_tx_begin(uart_t uart)
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void uart_write(uart_t uart, const uint8_t *data, size_t len)
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{
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}
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void uart_tx_end(uart_t uart)
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{
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}
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int uart_write(uart_t uart, char data)
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{
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switch (uart) {
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case UART_0:
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UART_0_DEV.DATA.reg = (uint8_t)data;
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break;
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}
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return 1;
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}
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int uart_read_blocking(uart_t uart, char *data)
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{
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switch (uart) {
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case UART_0:
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while (UART_0_DEV.INTFLAG.bit.RXC == 0);
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*data = (char)(0x00ff & UART_0_DEV.DATA.reg);
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break;
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}
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return 1;
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}
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int uart_write_blocking(uart_t uart, char data)
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{
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switch (uart) {
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case UART_0:
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if (uart == UART_0) {
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for (size_t i = 0; i < len; i++) {
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while (UART_0_DEV.INTFLAG.bit.DRE == 0);
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while(UART_0_DEV.SYNCBUSY.bit.ENABLE);
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UART_0_DEV.DATA.reg = (uint8_t)data;
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UART_0_DEV.DATA.reg = data[i];
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while (UART_0_DEV.INTFLAG.reg & SERCOM_USART_INTFLAG_TXC);
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break;
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}
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}
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}
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static inline void irq_handler(uint8_t uartnum, SercomUsart *dev)
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{
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if (dev->INTFLAG.bit.RXC) {
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/* cleared by reading DATA regiser */
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char data = (char)dev->DATA.reg;
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uart_config[uartnum].rx_cb(uart_config[uartnum].arg, data);
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}
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else if (dev->INTFLAG.bit.ERROR) {
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/* clear error flag */
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dev->INTFLAG.bit.ERROR = 1;
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}
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if (sched_context_switch_request) {
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thread_yield();
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}
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return 1;
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}
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void uart_poweron(uart_t uart)
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@ -203,35 +168,6 @@ void UART_0_ISR(void)
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}
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#endif
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static inline void irq_handler(uint8_t uartnum, SercomUsart *dev)
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{
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if (dev->INTFLAG.bit.RXC) {
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/* cleared by reading DATA regiser */
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char data = (char)dev->DATA.reg;
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uart_config[uartnum].rx_cb(uart_config[uartnum].arg, data);
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}
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else if (dev->INTFLAG.bit.TXC) {
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if (uart_config[uartnum].tx_cb(uart_config[uartnum].arg) == 0) {
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/* TXC flag is also cleared by writing data to DATA register */
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if (dev->INTFLAG.bit.TXC) {
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/* cleared by writing 1 to TXC */
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dev->INTFLAG.bit.TXC = 1;
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}
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}
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}
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else if (dev->INTFLAG.bit.ERROR) {
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/* clear error flag */
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dev->INTFLAG.bit.ERROR = 1;
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}
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if (sched_context_switch_request) {
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thread_yield();
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}
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}
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static uint64_t _long_division(uint64_t n, uint64_t d)
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{
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int32_t i;
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@ -253,5 +189,3 @@ static uint64_t _long_division(uint64_t n, uint64_t d)
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return q;
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}
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#endif /* UART_NUMOF */
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