cpu/esp*: common exception handling
This commit is contained in:
Gunar Schorcht
parent
90dc2ce846
commit
75d23e8458
@ -1,221 +0,0 @@
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/*
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* Copyright (C) 2018 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp32
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* @{
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*
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* @file
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* @brief ESP32 exception handling
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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* @}
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*/
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#define ENABLE_DEBUG 0
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#include "debug.h"
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#include <malloc.h>
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#include <string.h>
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#include <stdlib.h>
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#include "esp_common.h"
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#include "irq.h"
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#include "log.h"
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#include "periph/pm.h"
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#include "ps.h"
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#include "esp/common_macros.h"
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#include "esp/xtensa_ops.h"
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#include "rom/ets_sys.h"
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#include "rom/rtc.h"
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#include "rom/uart.h"
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#include "sdk_conf.h"
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#include "xtensa/corebits.h"
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#include "freertos/xtensa_api.h"
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#ifdef MODULE_ESP_GDBSTUB
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#include "esp_gdbstub.h"
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#endif
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#ifdef MODULE_ESP_IDF_HEAP
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#include "heap/esp_heap_caps.h"
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#endif
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extern void malloc_stats (void);
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extern unsigned int get_free_heap_size (void);
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extern uint8_t _eheap; /* end of heap (defined in esp32.common.ld) */
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extern uint8_t _sheap; /* start of heap (defined in esp32.common.ld) */
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static const char* exception_names [] =
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{
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"IllegalInstructionCause", /* 0 */
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"SyscallCause", /* 1 */
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"InstructionFetchErrorCause", /* 2 */
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"LoadStoreErrorCause", /* 3 */
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"Level1InterruptCause", /* 4 */
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"AllocaCause", /* 5 */
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"IntegerDivideByZeroCause", /* 6 */
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"", /* 7 - reserved */
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"PrivilegedCause", /* 8 */
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"LoadStoreAlignmentCause", /* 9 */
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"", /* 10 - reserved */
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"", /* 11 - reserved */
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"InstrPIFDataErrorCause", /* 12 */
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"LoadStorePIFDataErrorCause", /* 13 */
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"InstrPIFAddrErrorCause", /* 14 */
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"LoadStorePIFAddrErrorCause", /* 15 */
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"InstTLBMissCause", /* 16 */
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"InstTLBMultiHitCause", /* 17 */
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"InstFetchPrivilegeCause", /* 18 */
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"", /* 19 - reserved */
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"InstFetchProhibitedCause", /* 20 */
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"", /* 21 - reserved */
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"", /* 22 - reserved */
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"", /* 23 - reserved */
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"LoadStoreTLBMissCause", /* 24 */
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"LoadStoreTLBMultiHitCause", /* 25 */
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"LoadStorePrivilegeCause", /* 26 */
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"", /* 27 - reserved */
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"LoadProhibitedCause", /* 28 */
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"StoreProhibitedCause", /* 29 */
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"", /* 30 - reserved */
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"", /* 31 - reserved */
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"Coprocessor0Disabled", /* 32 */
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"Coprocessor1Disabled", /* 33 */
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"Coprocessor2Disabled", /* 34 */
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"Coprocessor3Disabled", /* 35 */
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"Coprocessor4Disabled", /* 36 */
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"Coprocessor5Disabled", /* 37 */
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"Coprocessor6Disabled", /* 38 */
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"Coprocessor7Disabled", /* 39 */
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};
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const char *reg_names[] = {
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"pc ", "ps ",
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"a0 ", "a1 ", "a2 ", "a3 ", "a4 ", "a5 ",
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"a6 ", "a7 ", "a8 ", "a9 ", "a10 ", "a11 ",
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"a12 ", "a13 ", "a14 ", "A15 ", "SAR ",
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"exccause", "excvaddr", "lbeg ", "lend ", "lcount "
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};
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void IRAM NORETURN exception_handler (XtExcFrame *frame)
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{
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uint32_t excsave1;
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uint32_t epc1;
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uint32_t epc2;
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uint32_t epc3;
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uint32_t epc4;
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RSR(excsave1, excsave1);
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RSR(epc1, epc1);
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RSR(epc2, epc2);
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RSR(epc3, epc3);
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RSR(epc4, epc4);
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#ifdef MODULE_ESP_GDBSTUB
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esp_gdbstub_panic_handler(frame);
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#endif
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ets_printf("EXCEPTION!! exccause=%d (%s) @%08x excvaddr=%08x\n\n",
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frame->exccause, exception_names[frame->exccause],
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excsave1, frame->excvaddr);
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#if defined(DEVELHELP)
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#if defined(MODULE_PS)
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ets_printf("processes:\n");
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ps();
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ets_printf("\n");
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#endif /* MODULE_PS */
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#ifdef MODULE_ESP_IDF_HEAP
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heap_caps_print_heap_info(MALLOC_CAP_DEFAULT);
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#else
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ets_printf("\nheap: %u (free %u) byte\n", &_eheap - &_sheap, get_free_heap_size());
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#endif /* MODULE_ESP_IDF_HEAP */
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ets_printf("\nregister set\n");
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ets_printf("pc : %08x\t", frame->pc);
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ets_printf("ps : %08x\t", frame->ps);
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ets_printf("exccause: %08x\t", frame->exccause);
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ets_printf("excvaddr: %08x\n", frame->excvaddr);
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ets_printf("epc1 : %08x\t", epc1);
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ets_printf("epc2 : %08x\t", epc2);
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ets_printf("epc3 : %08x\t", epc3);
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ets_printf("epc4 : %08x\n", epc4);
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ets_printf("a0 : %08x\t", frame->a0);
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ets_printf("a1 : %08x\t", frame->a1);
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ets_printf("a2 : %08x\t", frame->a2);
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ets_printf("a3 : %08x\n", frame->a3);
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ets_printf("a4 : %08x\t", frame->a4);
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ets_printf("a5 : %08x\t", frame->a5);
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ets_printf("a6 : %08x\t", frame->a6);
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ets_printf("a7 : %08x\n", frame->a7);
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ets_printf("a8 : %08x\t", frame->a8);
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ets_printf("a9 : %08x\t", frame->a9);
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ets_printf("a10 : %08x\t", frame->a10);
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ets_printf("a11 : %08x\n", frame->a11);
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ets_printf("a12 : %08x\t", frame->a12);
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ets_printf("a13 : %08x\t", frame->a13);
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ets_printf("a14 : %08x\t", frame->a14);
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ets_printf("a15 : %08x\n", frame->a15);
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ets_printf("lbeg : %08x\t", frame->lbeg);
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ets_printf("lend : %08x\t", frame->lend);
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ets_printf("lcount : %08x\n", frame->lcount);
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#endif /* DEVELHELP */
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/* restart */
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/* TODO: Improvement
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Normally, we should try to restart the system. However, this
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will not work after some exceptions, e.g., the LoadStoreErrorCause.
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Therefore, we break the execution and wait for the WDT reset. Maybe
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there is better way. If debugger is active, 'break 0,0' stops
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execution in debugger. */
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__asm__ volatile ("break 0,0");
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UNREACHABLE();
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}
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void init_exceptions (void)
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{
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xt_set_exception_handler(EXCCAUSE_UNALIGNED, exception_handler);
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xt_set_exception_handler(EXCCAUSE_ILLEGAL, exception_handler);
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xt_set_exception_handler(EXCCAUSE_INSTR_ERROR, exception_handler);
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xt_set_exception_handler(EXCCAUSE_LOAD_STORE_ERROR, exception_handler);
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xt_set_exception_handler(EXCCAUSE_LOAD_PROHIBITED, exception_handler);
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xt_set_exception_handler(EXCCAUSE_STORE_PROHIBITED, exception_handler);
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xt_set_exception_handler(EXCCAUSE_PRIVILEGED, exception_handler);
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}
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void IRAM NORETURN panic_arch(void)
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{
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#if defined(DEVELHELP)
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#ifdef MODULE_ESP_IDF_HEAP
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heap_caps_print_heap_info(MALLOC_CAP_DEFAULT);
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#else
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ets_printf("\nheap: %u (free %u) byte\n", &_eheap - &_sheap, get_free_heap_size());
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#endif /* MODULE_ESP_IDF_HEAP */
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/* break in debugger or reboot after WDT */
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__asm__ volatile ("break 0,0");
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#else /* DEVELHELP */
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/* restart */
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software_reset();
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#endif /* DEVELHELP */
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UNREACHABLE();
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}
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void _panic_handler(uint32_t addr)
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{
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ets_printf("#! _xt_panic called from 0x%08x: powering off\n", addr);
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pm_off();
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while (1) { };
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}
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@ -7,19 +7,16 @@
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*/
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*/
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/**
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/**
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* @ingroup cpu_esp8266
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* @ingroup cpu_esp_common
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* @{
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* @{
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*
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*
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* @file
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* @file
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* @brief ESP8266 exception handling
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* @brief ESP SoCs exception handling
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*
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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* @author Gunar Schorcht <gunar@schorcht.net>
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* @}
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* @}
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*/
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*/
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#include <malloc.h>
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#include <malloc.h>
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#include <string.h>
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#include <string.h>
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#include <stdlib.h>
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#include <stdlib.h>
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@ -31,10 +28,12 @@
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#include "esp_common.h"
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#include "esp_common.h"
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#include "esp/common_macros.h"
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#include "esp/common_macros.h"
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#include "esp/xtensa_ops.h"
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#include "esp/xtensa_ops.h"
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#include "sdk/ets.h"
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#include "xtensa/corebits.h"
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#include "xtensa/corebits.h"
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#include "xtensa/xtensa_api.h"
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#include "xtensa/xtensa_api.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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extern void heap_stats(void);
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extern void heap_stats(void);
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static const char* exception_names [] =
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static const char* exception_names [] =
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@ -85,17 +84,32 @@ void IRAM NORETURN exception_handler (XtExcFrame *frame)
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{
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{
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uint32_t excsave1;
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uint32_t excsave1;
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uint32_t epc1;
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uint32_t epc1;
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uint32_t epc2;
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uint32_t epc3;
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RSR(excsave1, excsave1);
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RSR(excsave1, excsave1);
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RSR(epc1, epc1);
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RSR(epc1, epc1);
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#if XCHAL_NMILEVEL >= 2
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uint32_t epc2;
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RSR(epc2, epc2);
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RSR(epc2, epc2);
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#endif
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#if XCHAL_NMILEVEL >= 3
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uint32_t epc3;
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RSR(epc3, epc3);
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RSR(epc3, epc3);
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#endif
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#ifdef MCU_ESP32
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#if XCHAL_NMILEVEL >= 4
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uint32_t epc4;
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uint32_t epc4;
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RSR(epc4, epc4);
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RSR(epc4, epc4);
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#endif
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#endif
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#if XCHAL_NMILEVEL >= 5
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uint32_t epc5;
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RSR(epc5, epc5);
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#endif
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#if XCHAL_NMILEVEL >= 6
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uint32_t epc6;
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RSR(epc6, epc6);
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#endif
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#if XCHAL_NMILEVEL >= 7
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uint32_t epc7;
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RSR(epc7, epc7);
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#endif
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ets_printf("EXCEPTION!! exccause=%d (%s) @%08x excvaddr=%08x\n",
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ets_printf("EXCEPTION!! exccause=%d (%s) @%08x excvaddr=%08x\n",
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frame->exccause, exception_names[frame->exccause],
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frame->exccause, exception_names[frame->exccause],
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@ -117,13 +131,25 @@ void IRAM NORETURN exception_handler (XtExcFrame *frame)
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ets_printf("exccause: %08x\t", frame->exccause);
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ets_printf("exccause: %08x\t", frame->exccause);
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ets_printf("excvaddr: %08x\n", frame->excvaddr);
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ets_printf("excvaddr: %08x\n", frame->excvaddr);
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ets_printf("epc1 : %08x\t", epc1);
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ets_printf("epc1 : %08x\t", epc1);
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#if XCHAL_NMILEVEL >= 2
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ets_printf("epc2 : %08x\t", epc2);
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ets_printf("epc2 : %08x\t", epc2);
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#endif
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#if XCHAL_NMILEVEL >= 3
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ets_printf("epc3 : %08x\t", epc3);
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ets_printf("epc3 : %08x\t", epc3);
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#ifdef MCU_ESP32
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#endif
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#if XCHAL_NMILEVEL >= 4
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ets_printf("epc4 : %08x\n", epc4);
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ets_printf("epc4 : %08x\n", epc4);
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#else /* MCU_ESP32 */
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#endif
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ets_printf("epc3 : %08x\n", epc3);
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#if XCHAL_NMILEVEL >= 5
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#endif /* MCU_ESP32 */
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ets_printf("epc5 : %08x\t", epc5);
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#endif
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#if XCHAL_NMILEVEL >= 6
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ets_printf("epc6 : %08x\t", epc6);
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#endif
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#if XCHAL_NMILEVEL >= 7
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ets_printf("epc7 : %08x\t", epc7);
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#endif
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ets_printf("\n");
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ets_printf("a0 : %08x\t", frame->a0);
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ets_printf("a0 : %08x\t", frame->a0);
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ets_printf("a1 : %08x\t", frame->a1);
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ets_printf("a1 : %08x\t", frame->a1);
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ets_printf("a2 : %08x\t", frame->a2);
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ets_printf("a2 : %08x\t", frame->a2);
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@ -154,9 +180,7 @@ void IRAM NORETURN exception_handler (XtExcFrame *frame)
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One option is to break the execution and wait for the WDT reset. Maybe
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One option is to break the execution and wait for the WDT reset. Maybe
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there is better way. If debugger is active, 'break 0,0' stops the
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there is better way. If debugger is active, 'break 0,0' stops the
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execution in debugger. */
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execution in debugger. */
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/* __asm__ volatile ("break 0,0"); */
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__asm__ volatile ("break 0,0");
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/* hard reset */
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__asm__ volatile (" call0 0x40000080 ");
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UNREACHABLE();
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UNREACHABLE();
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}
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}
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@ -174,12 +198,14 @@ void init_exceptions (void)
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void IRAM NORETURN panic_arch(void)
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void IRAM NORETURN panic_arch(void)
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{
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{
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#if defined(DEVELHELP)
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#if defined(DEVELHELP)
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heap_stats();
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heap_stats();
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#endif
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/* break in debugger or reboot after WDT */
|
||||||
|
__asm__ volatile ("break 0,0");
|
||||||
/* hard reset */
|
#else /* DEVELHELP */
|
||||||
__asm__ volatile (" call0 0x40000080 ");
|
/* restart */
|
||||||
|
pm_reboot();
|
||||||
|
#endif /* DEVELHELP */
|
||||||
|
|
||||||
UNREACHABLE();
|
UNREACHABLE();
|
||||||
}
|
}
|
||||||
Loading…
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Reference in New Issue
Block a user