diff --git a/cpu/stm32f4/cpu.c b/cpu/stm32f4/cpu.c
index 98d23fa82f..732cb65b88 100644
--- a/cpu/stm32f4/cpu.c
+++ b/cpu/stm32f4/cpu.c
@@ -73,7 +73,7 @@ static void cpu_clock_init(void)
     RCC->CR |= RCC_CR_HSEON;
 
     /* wait for HSE to be ready */
-    while (!(RCC->CR & RCC_CR_HSERDY));
+    while (!(RCC->CR & RCC_CR_HSERDY)) {}
 
     /* setup power module */
 
@@ -112,7 +112,7 @@ static void cpu_clock_init(void)
     /* enable PLL again */
     RCC->CR |= RCC_CR_PLLON;
     /* wait until PLL is stable */
-    while(!(RCC->CR & RCC_CR_PLLRDY));
+    while(!(RCC->CR & RCC_CR_PLLRDY)) {}
 
     /* configure flash latency */
 
@@ -135,5 +135,5 @@ static void cpu_clock_init(void)
     RCC->CFGR |= RCC_CFGR_SW_PLL;
 
     /* wait for sysclock to be stable */
-    while (!(RCC->CFGR & RCC_CFGR_SWS_PLL));
+    while (!(RCC->CFGR & RCC_CFGR_SWS_PLL)) {}
 }
diff --git a/cpu/stm32f4/periph/adc.c b/cpu/stm32f4/periph/adc.c
index 03e38614c0..12c1f47ceb 100644
--- a/cpu/stm32f4/periph/adc.c
+++ b/cpu/stm32f4/periph/adc.c
@@ -135,7 +135,7 @@ int adc_sample(adc_t dev, int channel)
     /* start single conversion */
     adc->CR2 |= ADC_CR2_SWSTART;
     /* wait until conversion is complete */
-    while (!(adc->SR & ADC_SR_EOC));
+    while (!(adc->SR & ADC_SR_EOC)) {}
     /* read and return result */
     return (int)adc->DR;
 }
diff --git a/cpu/stm32f4/periph/hwrng.c b/cpu/stm32f4/periph/hwrng.c
index ad918cdb5e..5f60bfe367 100644
--- a/cpu/stm32f4/periph/hwrng.c
+++ b/cpu/stm32f4/periph/hwrng.c
@@ -40,7 +40,7 @@ void hwrng_read(uint8_t *buf, unsigned int num)
     /* get random data */
     while (count < num) {
         /* wait for random data to be ready to read */
-        while (!(RNG->SR & RNG_SR_DRDY));
+        while (!(RNG->SR & RNG_SR_DRDY)) {}
         /* read next 4 bytes */
         uint32_t tmp = RNG->DR;
         /* copy data into result vector */
diff --git a/cpu/stm32f4/periph/i2c.c b/cpu/stm32f4/periph/i2c.c
index 961572305c..ebf0788759 100644
--- a/cpu/stm32f4/periph/i2c.c
+++ b/cpu/stm32f4/periph/i2c.c
@@ -271,13 +271,13 @@ int i2c_read_bytes(i2c_t dev, uint8_t address, char *data, int length)
 
             DEBUG("Wait for RXNE == 1\n");
 
-            while (!(i2c->SR1 & I2C_SR1_RXNE));
+            while (!(i2c->SR1 & I2C_SR1_RXNE)) {}
 
             DEBUG("Read received data\n");
             *data = (char)i2c->DR;
 
             /* wait until STOP is cleared by hardware */
-            while (i2c->CR1 & I2C_CR1_STOP);
+            while (i2c->CR1 & I2C_CR1_STOP) {}
 
             /* reset ACK to be able to receive new data */
             i2c->CR1 |= (I2C_CR1_ACK);
@@ -296,7 +296,7 @@ int i2c_read_bytes(i2c_t dev, uint8_t address, char *data, int length)
 
             DEBUG("Wait for transfer to be completed\n");
 
-            while (!(i2c->SR1 & I2C_SR1_BTF));
+            while (!(i2c->SR1 & I2C_SR1_BTF)) {}
 
             DEBUG("Crit block: set STOP and read first byte\n");
             state = disableIRQ();
@@ -309,7 +309,7 @@ int i2c_read_bytes(i2c_t dev, uint8_t address, char *data, int length)
 
             DEBUG("wait for STOP bit to be cleared again\n");
 
-            while (i2c->CR1 & I2C_CR1_STOP);
+            while (i2c->CR1 & I2C_CR1_STOP) {}
 
             DEBUG("reset POS = 0 and ACK = 1\n");
             i2c->CR1 &= ~(I2C_CR1_POS);
@@ -324,7 +324,7 @@ int i2c_read_bytes(i2c_t dev, uint8_t address, char *data, int length)
             while (i < (length - 3)) {
                 DEBUG("Wait until byte was received\n");
 
-                while (!(i2c->SR1 & I2C_SR1_RXNE));
+                while (!(i2c->SR1 & I2C_SR1_RXNE)) {}
 
                 DEBUG("Copy byte from DR\n");
                 data[i++] = (char)i2c->DR;
@@ -332,7 +332,7 @@ int i2c_read_bytes(i2c_t dev, uint8_t address, char *data, int length)
 
             DEBUG("Reading the last 3 bytes, waiting for BTF flag\n");
 
-            while (!(i2c->SR1 & I2C_SR1_BTF));
+            while (!(i2c->SR1 & I2C_SR1_BTF)) {}
 
             DEBUG("Disable ACK\n");
             i2c->CR1 &= ~(I2C_CR1_ACK);
@@ -346,7 +346,7 @@ int i2c_read_bytes(i2c_t dev, uint8_t address, char *data, int length)
             DEBUG("Read N-1 byte\n");
             data[i++] = (char)i2c->DR;
 
-            while (!(i2c->SR1 & I2C_SR1_RXNE));
+            while (!(i2c->SR1 & I2C_SR1_RXNE)) {}
 
             DEBUG("Read last byte\n");
 
@@ -354,7 +354,7 @@ int i2c_read_bytes(i2c_t dev, uint8_t address, char *data, int length)
 
             DEBUG("wait for STOP bit to be cleared again\n");
 
-            while (i2c->CR1 & I2C_CR1_STOP);
+            while (i2c->CR1 & I2C_CR1_STOP) {}
 
             DEBUG("reset POS = 0 and ACK = 1\n");
             i2c->CR1 &= ~(I2C_CR1_POS);
@@ -477,7 +477,7 @@ void i2c_poweroff(i2c_t dev)
     switch (dev) {
 #if I2C_0_EN
         case I2C_0:
-            while (I2C_0_DEV->SR2 & I2C_SR2_BUSY);
+            while (I2C_0_DEV->SR2 & I2C_SR2_BUSY) {}
 
             I2C_0_CLKDIS();
             break;
@@ -490,14 +490,14 @@ static void _start(I2C_TypeDef *dev, uint8_t address, uint8_t rw_flag)
     /* wait for device to be ready */
     DEBUG("Wait for device to be ready\n");
 
-    while (dev->SR2 & I2C_SR2_BUSY);
+    while (dev->SR2 & I2C_SR2_BUSY) {}
 
     /* generate start condition */
     DEBUG("Generate start condition\n");
     dev->CR1 |= I2C_CR1_START;
     DEBUG("Wait for SB flag to be set\n");
 
-    while (!(dev->SR1 & I2C_SR1_SB));
+    while (!(dev->SR1 & I2C_SR1_SB)) {}
 
     /* send address and read/write flag */
     DEBUG("Send address\n");
@@ -505,7 +505,7 @@ static void _start(I2C_TypeDef *dev, uint8_t address, uint8_t rw_flag)
     /* clear ADDR flag by reading first SR1 and then SR2 */
     DEBUG("Wait for ADDR flag to be set\n");
 
-    while (!(dev->SR1 & I2C_SR1_ADDR));
+    while (!(dev->SR1 & I2C_SR1_ADDR)) {}
 }
 
 static inline void _clear_addr(I2C_TypeDef *dev)
@@ -525,7 +525,7 @@ static inline void _write(I2C_TypeDef *dev, char *data, int length)
         DEBUG("Written %i byte to data reg, now waiting for DR to be empty again\n", i);
 
         /* wait for transfer to finish */
-        while (!(dev->SR1 & I2C_SR1_TXE));
+        while (!(dev->SR1 & I2C_SR1_TXE)) {}
 
         DEBUG("DR is now empty again\n");
     }
@@ -536,7 +536,7 @@ static inline void _stop(I2C_TypeDef *dev)
     /* make sure last byte was send */
     DEBUG("Wait if last byte hasn't been sent\n");
 
-    while (!(dev->SR1 & I2C_SR1_BTF));
+    while (!(dev->SR1 & I2C_SR1_BTF)) {}
 
     /* send STOP condition */
     dev->CR1 |= I2C_CR1_STOP;
@@ -569,7 +569,7 @@ void I2C_0_ERR_ISR(void)
     if (state & I2C_SR1_SMBALERT) {
         DEBUG("SMBALERT\n");
     }
-    while (1);
+    while (1) {}
 }
 #endif /* I2C_0_EN */
 
diff --git a/cpu/stm32f4/periph/spi.c b/cpu/stm32f4/periph/spi.c
index 294a211a41..6208b0c1bf 100644
--- a/cpu/stm32f4/periph/spi.c
+++ b/cpu/stm32f4/periph/spi.c
@@ -334,10 +334,10 @@ int spi_transfer_byte(spi_t dev, char out, char *in)
             return -1;
     }
 
-    while (!(spi_port->SR & SPI_SR_TXE));
+    while (!(spi_port->SR & SPI_SR_TXE)) {}
     spi_port->DR = out;
 
-    while (!(spi_port->SR & SPI_SR_RXNE));
+    while (!(spi_port->SR & SPI_SR_RXNE)) {}
 
     if (in != NULL) {
         *in = spi_port->DR;
@@ -397,19 +397,19 @@ void spi_poweroff(spi_t dev)
     switch (dev) {
 #if SPI_0_EN
         case SPI_0:
-            while (SPI_0_DEV->SR & SPI_SR_BSY);
+            while (SPI_0_DEV->SR & SPI_SR_BSY) {}
             SPI_0_CLKDIS();
             break;
 #endif
 #if SPI_1_EN
         case SPI_1:
-            while (SPI_1_DEV->SR & SPI_SR_BSY);
+            while (SPI_1_DEV->SR & SPI_SR_BSY) {}
             SPI_1_CLKDIS();
             break;
 #endif
 #if SPI_2_EN
         case SPI_2:
-            while (SPI_2_DEV->SR & SPI_SR_BSY);
+            while (SPI_2_DEV->SR & SPI_SR_BSY) {}
             SPI_2_CLKDIS();
             break;
 #endif
diff --git a/cpu/stm32f4/periph/uart.c b/cpu/stm32f4/periph/uart.c
index 04ca4b7d9c..d82654224d 100644
--- a/cpu/stm32f4/periph/uart.c
+++ b/cpu/stm32f4/periph/uart.c
@@ -125,7 +125,7 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
         /* send data by active waiting on the TXE flag */
         USART_TypeDef *dev = _dev(uart);
         for (int i = 0; i < len; i++) {
-            while (!(dev->SR & USART_SR_TXE));
+            while (!(dev->SR & USART_SR_TXE)) {}
             dev->DR = data[i];
         }
     }