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boards/stm32-based: adapted PWM configuration

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This commit is contained in:
Hauke Petersen 2016-12-07 14:58:28 +01:00
parent 4d09d09ee4
commit 7b856cda30
7 changed files with 100 additions and 124 deletions
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27
boards/msbiot/include/periph_conf.h
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@ -76,24 +76,21 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @name PWM configuration
* @brief PWM configuration
* @{
*/
#define PWM_NUMOF (1U)
#define PWM_0_EN 1
#define PWM_MAX_CHANNELS 1 /* Increase if Timer with more channels is used */
static const pwm_conf_t pwm_config[] = {
{
.dev = TIM11,
.rcc_mask = RCC_APB2ENR_TIM11EN,
.pins = { GPIO_PIN(PORT_B, 9), GPIO_UNDEF, GPIO_UNDEF, GPIO_UNDEF },
.af = GPIO_AF3,
.chan = 1,
.bus = APB2
}
};
/* PWM 0 device configuration */
#define PWM_0_DEV TIM11
#define PWM_0_CHANNELS 1
#define PWM_0_CLK (168000000U)
#define PWM_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_TIM11EN)
#define PWM_0_CLKDIS() (RCC->APB2ENR &= ~RCC_APB2ENR_TIM11EN)
/* PWM 0 pin configuration */
#define PWM_0_PORT GPIOB
#define PWM_0_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
#define PWM_0_PIN_CH0 9
#define PWM_0_PIN_AF 3
#define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
/** @} */
/**

32
boards/nucleo-f207/include/periph_conf.h
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@ -51,25 +51,22 @@ extern "C" {
/** @} */
/**
* @name PWM configuration
* @brief PWM configuration
* @{
*/
#define PWM_NUMOF (1U)
#define PWM_0_EN 1
static const pwm_conf_t pwm_config[PWM_NUMOF] = {
static const pwm_conf_t pwm_config[] = {
{
.tim = 2,
.port = GPIOC,
.bus = AHB1,
.rcc_mask = RCC_AHB1ENR_GPIOCEN,
.CH0 = 6,
.CH1 = 7,
.CH2 = 8,
.CH3 = 9,
.AF = 2
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.pins = { GPIO_PIN(PORT_C, 6), GPIO_PIN(PORT_C, 7),
GPIO_PIN(PORT_C, 8), GPIO_PIN(PORT_C, 9) },
.af = GPIO_AF2,
.chan = 4,
.bus = APB1
}
};
#define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
/** @} */
/**
@ -91,13 +88,6 @@ static const timer_conf_t timer_config[] = {
.bus = APB1,
.irqn = TIM5_IRQn
},
{
.dev = TIM3,
.max = 0xffffffff,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.bus = APB1,
.irqn = TIM3_IRQn
},
{
.dev = TIM4,
.max = 0xffffffff,

32
boards/nucleo-f303/include/periph_conf.h
View File

@ -124,28 +124,22 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @brief PWM configuration
* @brief PWM configuration
* @{
*/
#define PWM_NUMOF (1U)
#define PWM_0_EN 1
static const pwm_conf_t pwm_config[] = {
{
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.pins = { GPIO_PIN(PORT_C, 6), GPIO_PIN(PORT_C, 7),
GPIO_PIN(PORT_C, 8), GPIO_PIN(PORT_C, 9) },
.af = GPIO_AF2,
.chan = 4,
.bus = APB1
}
};
#define PWM_MAX_CHANNELS 4
/* PWM 0 device configuration */
#define PWM_0_DEV TIM3
#define PWM_0_CHANNELS 4
#define PWM_0_CLK (72000000U)
#define PWM_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM3EN)
#define PWM_0_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM3EN))
/* PWM 0 pin configuration */
#define PWM_0_PORT GPIOC
#define PWM_0_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOCEN)
#define PWM_0_PIN_CH0 6
#define PWM_0_PIN_CH1 7
#define PWM_0_PIN_CH2 8
#define PWM_0_PIN_CH3 9
#define PWM_0_PIN_AF 2
#define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
/** @} */
/**

1
boards/nucleo-f334/Makefile.features
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@ -1,6 +1,7 @@
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart

19
boards/nucleo-f334/include/periph_conf.h
View File

@ -101,6 +101,25 @@ static const timer_conf_t timer_config[] = {
#define UART_0_AF 7
/** @} */
/**
* @brief PWM configuration
* @{
*/
static const pwm_conf_t pwm_config[] = {
{
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.pins = { GPIO_PIN(PORT_C, 6), GPIO_PIN(PORT_C, 7),
GPIO_PIN(PORT_C, 8), GPIO_PIN(PORT_C, 9) },
.af = GPIO_AF2,
.chan = 4,
.bus = APB1
}
};
#define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
/** @} */
/**
* @name SPI configuration
* @{

57
boards/stm32f3discovery/include/periph_conf.h
View File

@ -126,44 +126,31 @@ static const timer_conf_t timer_config[] = {
/** @} */
/**
* @brief PWM configuration
* @brief PWM configuration
* @{
*/
#define PWM_NUMOF (2U)
#define PWM_0_EN 1
#define PWM_1_EN 1
static const pwm_conf_t pwm_config[] = {
{
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.pins = { GPIO_PIN(PORT_C, 6), GPIO_PIN(PORT_C, 7),
GPIO_PIN(PORT_C, 8), GPIO_PIN(PORT_C, 9) },
.af = GPIO_AF2,
.chan = 4,
.bus = APB1
},
{
.dev = TIM4,
.rcc_mask = RCC_APB1ENR_TIM4EN,
.pins = { GPIO_PIN(PORT_D, 12), GPIO_PIN(PORT_D, 13),
GPIO_PIN(PORT_D, 14), GPIO_PIN(PORT_D, 15) },
.af = GPIO_AF2,
.chan = 4,
.bus = APB1
}
};
#define PWM_MAX_CHANNELS 4
/* PWM 0 device configuration */
#define PWM_0_DEV TIM3
#define PWM_0_CHANNELS 4
#define PWM_0_CLK (72000000U)
#define PWM_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM3EN)
#define PWM_0_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM3EN))
/* PWM 0 pin configuration */
#define PWM_0_PORT GPIOC
#define PWM_0_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOCEN)
#define PWM_0_PIN_CH0 6
#define PWM_0_PIN_CH1 7
#define PWM_0_PIN_CH2 8
#define PWM_0_PIN_CH3 9
#define PWM_0_PIN_AF 2
/* PWM 1 device configuration */
#define PWM_1_DEV TIM4
#define PWM_1_CHANNELS 4
#define PWM_1_CLK (72000000U)
#define PWM_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM4EN)
#define PWM_1_CLKDIS() (RCC->APB1ENR &= ~(RCC_APB1ENR_TIM4EN))
/* PWM 1 pin configuration */
#define PWM_1_PORT GPIOD
#define PWM_1_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIODEN)
#define PWM_1_PIN_CH0 12
#define PWM_1_PIN_CH1 13
#define PWM_1_PIN_CH2 14
#define PWM_1_PIN_CH3 15
#define PWM_1_PIN_AF 2
#define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
/** @} */
/**

56
boards/stm32f4discovery/include/periph_conf.h
View File

@ -148,43 +148,31 @@ static const uart_conf_t uart_config[] = {
/** @} */
/**
* @name PWM configuration
* @brief PWM configuration
* @{
*/
#define PWM_NUMOF (2U)
#define PWM_0_EN 1
#define PWM_1_EN 1
#define PWM_MAX_CHANNELS 4
static const pwm_conf_t pwm_config[] = {
{
.dev = TIM1,
.rcc_mask = RCC_APB2ENR_TIM1EN,
.pins = { GPIO_PIN(PORT_E, 9), GPIO_PIN(PORT_E, 11),
GPIO_PIN(PORT_E, 11), GPIO_PIN(PORT_E, 14) },
.af = GPIO_AF1,
.chan = 4,
.bus = APB2
},
{
.dev = TIM3,
.rcc_mask = RCC_APB1ENR_TIM3EN,
.pins = { GPIO_PIN(PORT_B, 4), GPIO_PIN(PORT_B, 5),
GPIO_PIN(PORT_B, 0), GPIO_PIN(PORT_B, 1) },
.af = GPIO_AF2,
.chan = 4,
.bus = APB1
}
};
/* PWM 0 device configuration */
#define PWM_0_DEV TIM1
#define PWM_0_CHANNELS 4
#define PWM_0_CLK (168000000U)
#define PWM_0_CLKEN() (RCC->APB2ENR |= RCC_APB2ENR_TIM1EN)
#define PWM_0_CLKDIS() (RCC->APB2ENR &= ~RCC_APB2ENR_TIM1EN)
/* PWM 0 pin configuration */
#define PWM_0_PORT GPIOE
#define PWM_0_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOEEN)
#define PWM_0_PIN_CH0 9
#define PWM_0_PIN_CH1 11
#define PWM_0_PIN_CH2 13
#define PWM_0_PIN_CH3 14
#define PWM_0_PIN_AF 1
/* PWM 1 device configuration */
#define PWM_1_DEV TIM3
#define PWM_1_CHANNELS 3
#define PWM_1_CLK (84000000U)
#define PWM_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM3EN)
#define PWM_1_CLKDIS() (RCC->APB1ENR &= ~RCC_APB1ENR_TIM3EN)
/* PWM 1 pin configuration */
#define PWM_1_PORT GPIOB
#define PWM_1_PORT_CLKEN() (RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN)
#define PWM_1_PIN_CH0 4
#define PWM_1_PIN_CH1 5
#define PWM_1_PIN_CH2 0
#define PWM_1_PIN_CH3 1
#define PWM_1_PIN_AF 2
#define PWM_NUMOF (sizeof(pwm_config) / sizeof(pwm_config[0]))
/** @} */
/**