diff --git a/boards/nucleo-wl55jc/Makefile.dep b/boards/nucleo-wl55jc/Makefile.dep
index 2f80f9d9bb..cd146179a3 100644
--- a/boards/nucleo-wl55jc/Makefile.dep
+++ b/boards/nucleo-wl55jc/Makefile.dep
@@ -1,4 +1,10 @@
 ifneq (,$(filter stdio_uart,$(USEMODULE)))
   FEATURES_REQUIRED += periph_lpuart
 endif
+ifneq (,$(filter netdev_default,$(USEMODULE)))
+  USEMODULE += sx126x_stm32wl
+endif
+ifneq (,$(filter sx126x_stm32wl,$(USEMODULE)))
+  USEMODULE += sx126x_rf_switch
+endif
 include $(RIOTBOARD)/common/nucleo/Makefile.dep
diff --git a/boards/nucleo-wl55jc/board.c b/boards/nucleo-wl55jc/board.c
new file mode 100644
index 0000000000..1e3865df0a
--- /dev/null
+++ b/boards/nucleo-wl55jc/board.c
@@ -0,0 +1,73 @@
+/*
+ * Copyright (C) 2021  Freie Universität Berlin
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_nucleo-wl55jc
+ * @{
+ *
+ * @file        board.c
+ * @brief       Board specific implementations for the Nucleo-wl55jc board
+ *
+ *
+ * @author      Akshai M <akshai.m@fu-berlin.de>
+ *
+ * @}
+ */
+
+#include <stdio.h>
+
+#include "board.h"
+#include "periph/gpio.h"
+
+void board_init(void)
+{
+    /* initialize the CPU */
+    board_common_nucleo_init();
+
+    if (IS_USED(MODULE_SX126X_STM32WL)) {
+        /* Initialize the GPIO control for RF 3-port switch (SP3T) */
+        gpio_init(FE_CTRL1, GPIO_OUT);
+        gpio_init(FE_CTRL2, GPIO_OUT);
+        gpio_init(FE_CTRL3, GPIO_OUT);
+    }
+}
+
+/**
+ * @brief Callback to set RF switch mode
+ *
+ * This function sets the GPIO's wired to the SP3T RF Switch. Nucleo-WL55JC
+ * supports three modes of operation.
+ */
+#if IS_USED(MODULE_SX126X_STM32WL)
+void nucleo_wl55jc_sx126x_set_rf_mode(sx126x_t *dev, sx126x_rf_mode_t rf_mode)
+{
+    (void)dev;
+    switch (rf_mode) {
+    case SX126X_RF_MODE_RX:
+        gpio_set(FE_CTRL1);
+        gpio_clear(FE_CTRL2);
+        gpio_set(FE_CTRL3);
+        break;
+
+    case SX126X_RF_MODE_TX_LPA:
+        gpio_set(FE_CTRL1);
+        gpio_set(FE_CTRL2);
+        gpio_set(FE_CTRL3);
+        break;
+
+    case SX126X_RF_MODE_TX_HPA:
+        gpio_clear(FE_CTRL1);
+        gpio_set(FE_CTRL2);
+        gpio_set(FE_CTRL3);
+        break;
+
+    default:
+        break;
+    }
+}
+#endif
diff --git a/boards/nucleo-wl55jc/include/board.h b/boards/nucleo-wl55jc/include/board.h
index 862e41c48a..8646dc621f 100644
--- a/boards/nucleo-wl55jc/include/board.h
+++ b/boards/nucleo-wl55jc/include/board.h
@@ -22,10 +22,27 @@
 
 #include "board_nucleo.h"
 
+/* Required for `nucleo_wl55jc_sx126x_set_rf_mode` */
+#if IS_USED(MODULE_SX126X_STM32WL)
+#include "sx126x.h"
+#endif
+
 #ifdef __cplusplus
 extern "C" {
 #endif
 
+/**
+ * @name    Sub-GHz radio (LoRa) configuration
+ * @{
+ */
+#define SX126X_PARAM_SPI                    (SPI_DEV(0))
+
+#if IS_USED(MODULE_SX126X_STM32WL)
+extern void nucleo_wl55jc_sx126x_set_rf_mode(sx126x_t *dev, sx126x_rf_mode_t rf_mode);
+#define SX126X_PARAM_SET_RF_MODE_CB         nucleo_wl55jc_sx126x_set_rf_mode
+#endif
+/** @} */
+
 /**
  * @name    LED pin definitions and handlers
  * @{
@@ -70,6 +87,17 @@ extern "C" {
 #define BTN2_MODE           GPIO_IN_PU
 /** @} */
 
+/**
+ * @name    RF 3-port switch (SP3T) control
+ *
+ * Refer Section 6.6.3 RF Overview in User Manual (UM2592)
+ * @{
+ */
+#define FE_CTRL1            GPIO_PIN(PORT_C, 4)
+#define FE_CTRL2            GPIO_PIN(PORT_C, 5)
+#define FE_CTRL3            GPIO_PIN(PORT_C, 3)
+/** @} */
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/boards/nucleo-wl55jc/include/periph_conf.h b/boards/nucleo-wl55jc/include/periph_conf.h
index e5d82ea71e..8d187699eb 100644
--- a/boards/nucleo-wl55jc/include/periph_conf.h
+++ b/boards/nucleo-wl55jc/include/periph_conf.h
@@ -84,6 +84,21 @@ static const uart_conf_t uart_config[] = {
  */
 static const spi_conf_t spi_config[] = {
     {
+        .dev      = SUBGHZSPI, /* Internally connected to Sub-GHz radio Modem  */
+        .mosi_pin = GPIO_UNDEF,
+        .miso_pin = GPIO_UNDEF,
+        .sclk_pin = GPIO_UNDEF,
+        .cs_pin   = GPIO_UNDEF,
+        .mosi_af  = GPIO_AF_UNDEF,
+        .miso_af  = GPIO_AF_UNDEF,
+        .sclk_af  = GPIO_AF_UNDEF,
+        .cs_af    = GPIO_AF_UNDEF,
+        .rccmask  = RCC_APB3ENR_SUBGHZSPIEN,
+        .apbbus   = APB3,
+    }
+/* SUBGHZ DEBUG PINS use the SPI1 pins */
+#if !IS_ACTIVE(CONFIG_STM32_WL55JC_SUBGHZ_DEBUG)
+    ,{
         .dev      = SPI1,
         .mosi_pin = GPIO_PIN(PORT_A, 7),
         .miso_pin = GPIO_PIN(PORT_A, 6),
@@ -96,6 +111,7 @@ static const spi_conf_t spi_config[] = {
         .rccmask  = RCC_APB2ENR_SPI1EN,
         .apbbus   = APB2,
     }
+#endif
 };
 
 #define SPI_NUMOF           ARRAY_SIZE(spi_config)
diff --git a/makefiles/pseudomodules.inc.mk b/makefiles/pseudomodules.inc.mk
index 6024f43945..3cbceaa961 100644
--- a/makefiles/pseudomodules.inc.mk
+++ b/makefiles/pseudomodules.inc.mk
@@ -246,6 +246,10 @@ PSEUDOMODULES += sx1261
 PSEUDOMODULES += sx1262
 PSEUDOMODULES += sx1268
 PSEUDOMODULES += llcc68
+PSEUDOMODULES += sx126x_stm32wl
+
+# include RF switch implemented in the board for use with sx126x
+PSEUDOMODULES += sx126x_rf_switch
 
 # include variants of SX127X drivers as pseudo modules
 PSEUDOMODULES += sx1272