diff --git a/board/eZ430-Chronos/Jamrules.eZ430-Chronos b/board/eZ430-Chronos/Jamrules.eZ430-Chronos index eef3a03017..74e57f0929 100644 --- a/board/eZ430-Chronos/Jamrules.eZ430-Chronos +++ b/board/eZ430-Chronos/Jamrules.eZ430-Chronos @@ -4,7 +4,7 @@ # $Id$ BOARD = eZ430-Chronos ; -CPU = msp430 ; +CPU = cc430 ; MCU = cc430x6137 ; FLASHER ?= mspdebug ; diff --git a/board/eZ430-Chronos/board_init.c b/board/eZ430-Chronos/board_init.c index aa52e65af9..74799abace 100644 --- a/board/eZ430-Chronos/board_init.c +++ b/board/eZ430-Chronos/board_init.c @@ -1,2 +1,74 @@ -void board_init() { +#include +#include +#include +#include + +void cc430_cpu_init(void) { + volatile uint16_t i; + volatile unsigned char *ptr; + + /* disable watchdog */ + WDTCTL = WDTPW + WDTHOLD; + + // --------------------------------------------------------------------- + // Enable 32kHz ACLK + P5SEL |= 0x03; // Select XIN, XOUT on P5.0 and P5.1 + UCSCTL6 &= ~XT1OFF; // XT1 On, Highest drive strength + UCSCTL6 |= XCAP_3; // Internal load cap + + UCSCTL3 = SELA__XT1CLK; // Select XT1 as FLL reference + UCSCTL4 = SELA__XT1CLK | SELS__DCOCLKDIV | SELM__DCOCLKDIV; + + // --------------------------------------------------------------------- + // Configure CPU clock for 12MHz + _BIS_SR(SCG0); // Disable the FLL control loop + UCSCTL0 = 0x0000; // Set lowest possible DCOx, MODx + UCSCTL1 = DCORSEL_5; // Select suitable range + UCSCTL2 = FLLD_1 + 0x16E; // Set DCO Multiplier + _BIC_SR(SCG0); // Enable the FLL control loop + + // Worst-case settling time for the DCO when the DCO range bits have been + // changed is n x 32 x 32 x f_MCLK / f_FLL_reference. See UCS chapter in 5xx + // UG for optimization. + // 32 x 32 x 8 MHz / 32,768 Hz = 250000 = MCLK cycles for DCO to settle + for (i = 0xFF; i > 0; i--); // Time for flag to set + + // Loop until XT1 & DCO stabilizes, use do-while to insure that + // body is executed at least once + do + { + UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + XT1HFOFFG + DCOFFG); + SFRIFG1 &= ~OFIFG; // Clear fault flags + } while ((SFRIFG1 & OFIFG)); + + // Disable all interrupts + __disable_interrupt(); + // Get write-access to port mapping registers: + PMAPPWD = 0x02D52; + // Allow reconfiguration during runtime: + PMAPCTL = PMAPRECFG; + + // P2.7 = TA0CCR1A or TA1CCR0A output (buzzer output) + ptr = &P2MAP0; + *(ptr+7) = PM_TA1CCR0A; + P2OUT &= ~BIT7; + P2DIR |= BIT7; + + // P1.5 = SPI MISO input + ptr = &P1MAP0; + *(ptr+5) = PM_UCA0SOMI; + // P1.6 = SPI MOSI output + *(ptr+6) = PM_UCA0SIMO; + // P1.7 = SPI CLK output + *(ptr+7) = PM_UCA0CLK; + + // Disable write-access to port mapping registers: + PMAPPWD = 0; + // Re-enable all interrupts + enableIRQ(); + +} + +void board_init() { + cc430_cpu_init(); } diff --git a/board/msb-430-common/Jamrules.msb-430-common b/board/msb-430-common/Jamrules.msb-430-common index 9c51cd21db..7eee8b088f 100644 --- a/board/msb-430-common/Jamrules.msb-430-common +++ b/board/msb-430-common/Jamrules.msb-430-common @@ -25,7 +25,7 @@ # ****************************************************************************** # $Id$ -CPU = msp430 ; +CPU = msp430x16x ; MCU = msp430x1612 ; FLASH_PORT ?= "$(PORT)" ; diff --git a/board/msb-430h/Jamfile b/board/msb-430h/Jamfile index 79e6f920c0..15f7ba97f9 100644 --- a/board/msb-430h/Jamfile +++ b/board/msb-430h/Jamfile @@ -31,4 +31,3 @@ Module board_cc1100 : driver_cc1100.c ; SubInclude TOP board msb-430-common ; SubInclude TOP cpu $(CPU) ; - diff --git a/cpu/cc430/Jamfile b/cpu/cc430/Jamfile new file mode 100644 index 0000000000..416073e255 --- /dev/null +++ b/cpu/cc430/Jamfile @@ -0,0 +1,32 @@ +# ****************************************************************************** +# Copyright 2010, Freie Universitaet Berlin (FUB). All rights reserved. +# +# These sources were developed at the Freie Universitaet Berlin, Computer +# Systems and Telematics group (http://cst.mi.fu-berlin.de). +# ------------------------------------------------------------------------------ +# This file is part of FeuerWare. +# +# This program is free software: you can redistribute it and/or modify it under +# the terms of the GNU General Public License as published by the Free Software +# Foundation, either version 3 of the License, or (at your option) any later +# version. +# +# FeuerWare is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS +# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along with +# this program. If not, see http://www.gnu.org/licenses/ . +# ------------------------------------------------------------------------------ +# For further information and questions please use the web site +# http://scatterweb.mi.fu-berlin.de +# and the mailinglist (subscription via web site) +# scatterweb@lists.spline.inf.fu-berlin.de +# ****************************************************************************** +# $Id$ + +SubDir TOP cpu cc430 ; + +Module hwtimer_cpu : hwtimer_cc430.c : hwtimer_msp430 ; + +SubInclude TOP cpu msp430-common ; diff --git a/cpu/cc430/Jamrules.cc430 b/cpu/cc430/Jamrules.cc430 new file mode 100644 index 0000000000..c66536fc9b --- /dev/null +++ b/cpu/cc430/Jamrules.cc430 @@ -0,0 +1 @@ +include [ FPath $(TOP) cpu msp430-common Jamrules.msp430-common ] ; diff --git a/cpu/cc430/hwtimer_cc430.c b/cpu/cc430/hwtimer_cc430.c new file mode 100644 index 0000000000..b83de4da96 --- /dev/null +++ b/cpu/cc430/hwtimer_cc430.c @@ -0,0 +1,73 @@ +#include +#include +#include +#include +#include + +static uint32_t ticks = 0; + +extern void (*int_handler)(int); +extern void TA0_unset(short timer); + +void timerA_init() +{ + ticks = 0; // Set tick counter value to 0 + TA0CTL = TASSEL_1 + TACLR; // Clear the timer counter, set ACLK + TA0CTL &= ~TAIE; // Clear the IFG + +/* volatile unsigned int *ccr = &TA0CCR0; + volatile unsigned int *ctl = &TA0CCTL0; + + for (int i = 0; i < ARCH_MAXTIMERS; i++) { + *ccr = 0; + *ctl &= ~(CCIFG); + *ctl &= ~(CCIE); + } + */ + + TA0CCR0 = 0; + TA0CTL |= MC_2; +} + +interrupt(TIMER0_A0_VECTOR) __attribute__ ((naked)) timer0_a0_isr(void) { + __enter_isr(); + + TA0_unset(0); + int_handler(0); + __exit_isr(); +} + +interrupt(TIMER0_A1_VECTOR) __attribute__ ((naked)) timer0_a1_5_isr(void) { + __enter_isr(); + + short taiv = TA0IV; + short timer; + + switch(taiv) { + case TAIFG: + timer = (taiv/2); + TA0_unset(timer); + int_handler(timer); + break; + + // Timer0_A3 Configurable periodic IRQ (used by button_repeat and buzzer) + case 0x06: // Disable IE + TA0CCTL3 &= ~CCIE; + // Reset IRQ flag + TA0CCTL3 &= ~CCIFG; + // Enable timer interrupt + TA0CCTL3 |= CCIE; + // Call function handler + // TODO + break; + + // Timer0_A4 One-time delay + case 0x08: // Disable IE + TA0CCTL4 &= ~CCIE; + // Reset IRQ flag + TA0CCTL4 &= ~CCIFG; + break; + } + + __exit_isr(); +} diff --git a/cpu/msp430/Jamfile b/cpu/msp430-common/Jamfile similarity index 95% rename from cpu/msp430/Jamfile rename to cpu/msp430-common/Jamfile index bec5471cdc..540398c723 100644 --- a/cpu/msp430/Jamfile +++ b/cpu/msp430-common/Jamfile @@ -25,10 +25,10 @@ # ****************************************************************************** # $Id$ -SubDir TOP cpu msp430 ; +SubDir TOP cpu msp430-common ; Module cpu : msp430-main.c cpu.c atomic.c irq.c flashrom.c ; -Module hwtimer_cpu : hwtimer_cpu.c ; +Module hwtimer_msp430 : hwtimer_cpu.c ; UseModule cpu ; UseModule oneway_malloc ; diff --git a/cpu/msp430/Jamrules.msp430 b/cpu/msp430-common/Jamrules.msp430-common similarity index 82% rename from cpu/msp430/Jamrules.msp430 rename to cpu/msp430-common/Jamrules.msp430-common index 74d65de844..aaba8a424b 100644 --- a/cpu/msp430/Jamrules.msp430 +++ b/cpu/msp430-common/Jamrules.msp430-common @@ -5,7 +5,7 @@ echo "Building for board $(BOARD)." ; echo "Building for MCU $(MCU)." ; -HDRS += $(TOP)/cpu/$(CPU)/include $(TOP)/board/$(BOARD)/drivers $(TOP)/board/$(BOARD)/include $(TOP)/include $(TOP)/core/include ; +HDRS += $(TOP)/cpu/msp430-common/include $(TOP)/cpu/$(CPU)/include $(TOP)/board/$(BOARD)/drivers $(TOP)/board/$(BOARD)/include $(TOP)/include $(TOP)/core/include ; TOOLCHAIN = msp430- ; CC = msp430-gcc ; diff --git a/cpu/msp430/atomic.c b/cpu/msp430-common/atomic.c similarity index 100% rename from cpu/msp430/atomic.c rename to cpu/msp430-common/atomic.c diff --git a/cpu/msp430/cpu.c b/cpu/msp430-common/cpu.c similarity index 100% rename from cpu/msp430/cpu.c rename to cpu/msp430-common/cpu.c diff --git a/cpu/msp430/flashrom.c b/cpu/msp430-common/flashrom.c similarity index 100% rename from cpu/msp430/flashrom.c rename to cpu/msp430-common/flashrom.c diff --git a/cpu/msp430/hwtimer_cpu.c b/cpu/msp430-common/hwtimer_cpu.c similarity index 72% rename from cpu/msp430/hwtimer_cpu.c rename to cpu/msp430-common/hwtimer_cpu.c index e25fd799e7..3d193c28e1 100644 --- a/cpu/msp430/hwtimer_cpu.c +++ b/cpu/msp430-common/hwtimer_cpu.c @@ -33,29 +33,9 @@ and the mailinglist (subscription via web site) #include "debug.h" -static uint32_t ticks = 0; - -static void (*int_handler)(int); - -static void timerA_init() -{ - ticks = 0; // Set tick counter value to 0 - TA0CTL = TASSEL_1 + TACLR; // Clear the timer counter, set SMCLK - TA0CTL &= ~TAIFG; // Clear the IFG - TA0CTL &= ~TAIE; // Clear the IFG - - volatile unsigned int *ccr = &TA0CCR0; - volatile unsigned int *ctl = &TA0CCTL0; - - for (int i = 0; i < ARCH_MAXTIMERS; i++) { - *ccr = 0; - *ctl &= ~(CCIFG); - *ctl &= ~(CCIE); - } - - TA0CTL |= MC_2; -} +void (*int_handler)(int); +extern void timerA_init(void); static void TA0_disable_interrupt(short timer) { volatile unsigned int *ptr = &TA0CCTL0 + (timer); @@ -80,7 +60,7 @@ static void TA0_set(unsigned long value, short timer) { TA0_enable_interrupt(timer); } -static void TA0_unset(short timer) { +void TA0_unset(short timer) { volatile unsigned int *ptr = &TA0CCR0 + (timer); TA0_disable_interrupt(timer); *ptr = 0; @@ -119,33 +99,3 @@ void hwtimer_arch_set_absolute(unsigned long value, short timer) { void hwtimer_arch_unset(short timer) { TA0_unset(timer); } - -interrupt(TIMERA0_VECTOR) __attribute__ ((naked)) timer_isr_ccr0(void) -{ - __enter_isr(); - - TA0_unset(0); - int_handler(0); - - __exit_isr(); -} - -interrupt(TIMERA1_VECTOR) __attribute__ ((naked)) timer_isr(void) -{ - __enter_isr(); - - short taiv = TA0IV; - - if (taiv & TAIFG) { - puts("msp430/hwtimer_cpu TAIFG set!"); - // TA0CTL &= ~TAIFG; - // ticks += 0xFFFF; - } else { - - short timer = (taiv/2); - TA0_unset(timer); - int_handler(timer); - } - - __exit_isr(); -} diff --git a/cpu/msp430/include/cpu-conf.h b/cpu/msp430-common/include/cpu-conf.h similarity index 100% rename from cpu/msp430/include/cpu-conf.h rename to cpu/msp430-common/include/cpu-conf.h diff --git a/cpu/msp430/include/cpu.h b/cpu/msp430-common/include/cpu.h similarity index 99% rename from cpu/msp430/include/cpu.h rename to cpu/msp430-common/include/cpu.h index 830e5c9e7f..e924cdff28 100644 --- a/cpu/msp430/include/cpu.h +++ b/cpu/msp430-common/include/cpu.h @@ -44,6 +44,7 @@ and the mailinglist (subscription via web site) #define WORDSIZE 16 +/* not used(?) */ #define F_CPU 10000000 extern volatile int __inISR; diff --git a/cpu/msp430/include/errno-base.h b/cpu/msp430-common/include/errno-base.h similarity index 100% rename from cpu/msp430/include/errno-base.h rename to cpu/msp430-common/include/errno-base.h diff --git a/cpu/msp430/include/errno.h b/cpu/msp430-common/include/errno.h similarity index 100% rename from cpu/msp430/include/errno.h rename to cpu/msp430-common/include/errno.h diff --git a/cpu/msp430/include/hwtimer_cpu.h b/cpu/msp430-common/include/hwtimer_cpu.h similarity index 98% rename from cpu/msp430/include/hwtimer_cpu.h rename to cpu/msp430-common/include/hwtimer_cpu.h index 1d014640c3..e10ca60191 100644 --- a/cpu/msp430/include/hwtimer_cpu.h +++ b/cpu/msp430-common/include/hwtimer_cpu.h @@ -36,10 +36,10 @@ and the mailinglist (subscription via web site) #ifdef __MSP430_HAS_TA3__ #define ARCH_MAXTIMERS 3 #endif -/*#ifdef __MSP430_HAS_TA5__ +#ifdef __MSP430_HAS_T0A5__ #define ARCH_MAXTIMERS 5 #endif -*/ + #ifndef ARCH_MAXTIMERS #warning "ARCH_MAXTIMERS UNSET!" diff --git a/cpu/msp430/include/malloc.h b/cpu/msp430-common/include/malloc.h similarity index 100% rename from cpu/msp430/include/malloc.h rename to cpu/msp430-common/include/malloc.h diff --git a/cpu/msp430/include/msp430.h b/cpu/msp430-common/include/msp430.h similarity index 100% rename from cpu/msp430/include/msp430.h rename to cpu/msp430-common/include/msp430.h diff --git a/cpu/msp430/irq.c b/cpu/msp430-common/irq.c similarity index 100% rename from cpu/msp430/irq.c rename to cpu/msp430-common/irq.c diff --git a/cpu/msp430/msp430-main.c b/cpu/msp430-common/msp430-main.c similarity index 100% rename from cpu/msp430/msp430-main.c rename to cpu/msp430-common/msp430-main.c diff --git a/cpu/msp430/startup.c b/cpu/msp430-common/startup.c similarity index 100% rename from cpu/msp430/startup.c rename to cpu/msp430-common/startup.c diff --git a/cpu/msp430x16x/Jamfile b/cpu/msp430x16x/Jamfile new file mode 100644 index 0000000000..a110170676 --- /dev/null +++ b/cpu/msp430x16x/Jamfile @@ -0,0 +1,32 @@ +# ****************************************************************************** +# Copyright 2010, Freie Universitaet Berlin (FUB). All rights reserved. +# +# These sources were developed at the Freie Universitaet Berlin, Computer +# Systems and Telematics group (http://cst.mi.fu-berlin.de). +# ------------------------------------------------------------------------------ +# This file is part of FeuerWare. +# +# This program is free software: you can redistribute it and/or modify it under +# the terms of the GNU General Public License as published by the Free Software +# Foundation, either version 3 of the License, or (at your option) any later +# version. +# +# FeuerWare is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS +# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License along with +# this program. If not, see http://www.gnu.org/licenses/ . +# ------------------------------------------------------------------------------ +# For further information and questions please use the web site +# http://scatterweb.mi.fu-berlin.de +# and the mailinglist (subscription via web site) +# scatterweb@lists.spline.inf.fu-berlin.de +# ****************************************************************************** +# $Id$ + +SubDir TOP cpu msp430x16x ; + +Module hwtimer_cpu : hwtimer_msp430.c : hwtimer_msp430 ; + +SubInclude TOP cpu msp430-common ; diff --git a/cpu/msp430x16x/Jamrules.msp430x16x b/cpu/msp430x16x/Jamrules.msp430x16x new file mode 100644 index 0000000000..c66536fc9b --- /dev/null +++ b/cpu/msp430x16x/Jamrules.msp430x16x @@ -0,0 +1 @@ +include [ FPath $(TOP) cpu msp430-common Jamrules.msp430-common ] ; diff --git a/cpu/msp430x16x/hwtimer_msp430.c b/cpu/msp430x16x/hwtimer_msp430.c new file mode 100644 index 0000000000..2a39a7ec84 --- /dev/null +++ b/cpu/msp430x16x/hwtimer_msp430.c @@ -0,0 +1,55 @@ +#include +#include +#include +#include +#include + +static uint32_t ticks = 0; + +extern void (*int_handler)(int); +extern void TA0_unset(short timer); + +void timerA_init() +{ + ticks = 0; // Set tick counter value to 0 + TA0CTL = TASSEL_1 + TACLR; // Clear the timer counter, set ACLK + TA0CTL &= ~TAIFG; // Clear the IFG + TA0CTL &= ~TAIE; // Clear the IFG + volatile unsigned int *ccr = &TA0CCR0; + volatile unsigned int *ctl = &TA0CCTL0; + + for (int i = 0; i < ARCH_MAXTIMERS; i++) { + *ccr = 0; + *ctl &= ~(CCIFG); + *ctl &= ~(CCIE); + } + TA0CTL |= MC_2; +} + +interrupt(TIMERA0_VECTOR) __attribute__ ((naked)) timer_isr_ccr0(void) { + __enter_isr(); + + TA0_unset(0); + int_handler(0); + + __exit_isr(); +} + +interrupt(TIMERA1_VECTOR) __attribute__ ((naked)) timer_isr(void) { + __enter_isr(); + + short taiv = TA0IV; + + if (taiv & TAIFG) { + // puts("msp430/hwtimer_cpu TAIFG set!"); + // TA0CTL &= ~TAIFG; + // ticks += 0xFFFF; + } else { + + short timer = (taiv/2); + TA0_unset(timer); + int_handler(timer); + } + + __exit_isr(); +}