cpu/stm32f4: add support for stm32f429zi
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@ -37,6 +37,8 @@
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#include "vendor/stm32f415xx.h"
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#include "vendor/stm32f415xx.h"
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#elif defined(CPU_MODEL_STM32F446RE) || defined(CPU_MODEL_STM32F446ZE)
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#elif defined(CPU_MODEL_STM32F446RE) || defined(CPU_MODEL_STM32F446ZE)
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#include "vendor/stm32f446xx.h"
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#include "vendor/stm32f446xx.h"
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#elif defined(CPU_MODEL_STM32F429ZI)
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#include "vendor/stm32f429xx.h"
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#endif
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#endif
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#ifdef __cplusplus
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#ifdef __cplusplus
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@ -45,7 +45,7 @@ enum {
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*/
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*/
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#if defined(CPU_MODEL_STM32F401RE) || defined(CPU_MODEL_STM32F410RB) || defined(CPU_MODEL_STM32F411RE)|| defined(CPU_MODEL_STM32F413ZH)
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#if defined(CPU_MODEL_STM32F401RE) || defined(CPU_MODEL_STM32F410RB) || defined(CPU_MODEL_STM32F411RE)|| defined(CPU_MODEL_STM32F413ZH)
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#define ADC_DEVS (1U)
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#define ADC_DEVS (1U)
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#elif defined(CPU_MODEL_STM32F407VG) || defined(CPU_MODEL_STM32F415RG) || defined(CPU_MODEL_STM32F446RE)
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#elif defined(CPU_MODEL_STM32F407VG) || defined(CPU_MODEL_STM32F415RG) || defined(CPU_MODEL_STM32F446RE) || defined(CPU_MODEL_STM32F429ZI)
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#define ADC_DEVS (3U)
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#define ADC_DEVS (3U)
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#endif
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#endif
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9065
cpu/stm32f4/include/vendor/stm32f429xx.h
vendored
Normal file
9065
cpu/stm32f4/include/vendor/stm32f429xx.h
vendored
Normal file
File diff suppressed because it is too large
Load Diff
31
cpu/stm32f4/ldscripts/stm32f429zi.ld
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31
cpu/stm32f4/ldscripts/stm32f429zi.ld
Normal file
@ -0,0 +1,31 @@
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/*
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* Copyright (C) 2017 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @addtogroup cpu_stm32f4
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* @{
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*
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* @file
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* @brief Memory definitions for the STM32F429ZI
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*
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* @}
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*/
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MEMORY
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{
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rom (rx) : ORIGIN = 0x08000000, LENGTH = 2M
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
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ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 64K
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cpuid (r) : ORIGIN = 0x1fff7a10, LENGTH = 12
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}
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_cpuid_address = ORIGIN(cpuid);
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INCLUDE cortexm_base.ld
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