riot-ci/RIOT
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

cpu: samd21: make isr vector table -pedantic safe

Browse Source
This commit is contained in:
Kaspar Schleiser 2016-06-02 22:26:51 +02:00
parent 9ec39de1d0
commit 865008ea7e
1 changed files with 56 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

105
cpu/samd21/vectors.c
View File

@ -20,6 +20,8 @@
*/
#include <stdint.h>
#include "cpu_conf.h"
#include "vectors_cortexm.h"
/* get the start of the ISR stack as defined in the linkerscript */
@ -66,54 +68,59 @@ WEAK_DEFAULT void isr_ptc(void);
WEAK_DEFAULT void isr_i2c(void);
/* interrupt vector table */
ISR_VECTORS const void *interrupt_vector[] = {
ISR_VECTORS struct {
void* _estack;
void(*vectors[CPU_IRQ_NUMOF + CPU_NONISR_EXCEPTIONS])(void);
} interrupt_vector = {
/* Exception stack pointer */
(void*) (&_estack), /* pointer to the top of the stack */
/* Cortex-M0+ handlers */
(void*) reset_handler_default, /* entry point of the program */
(void*) nmi_default, /* non maskable interrupt handler */
(void*) hard_fault_default, /* hard fault exception */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(void*) (0UL), /* reserved */
(void*) (0UL), /* reserved */
(void*) isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
(void*) isr_systick, /* SysTick interrupt, not used in RIOT */
/* Atmel specific peripheral handlers */
(void*) isr_pm, /* 0 Power Manager */
(void*) isr_sysctrl, /* 1 System Control */
(void*) isr_wdt, /* 2 Watchdog Timer */
(void*) isr_rtc, /* 3 Real-Time Counter */
(void*) isr_eic, /* 4 External Interrupt Controller */
(void*) isr_nvmctrl, /* 5 Non-Volatile Memory Controller */
(void*) isr_dmac, /* 6 Direct Memory Access Controller */
(void*) isr_usb, /* 7 Universal Serial Bus */
(void*) isr_evsys, /* 8 Event System Interface */
(void*) isr_sercom0, /* 9 Serial Communication Interface 0 */
(void*) isr_sercom1, /* 10 Serial Communication Interface 1 */
(void*) isr_sercom2, /* 11 Serial Communication Interface 2 */
(void*) isr_sercom3, /* 12 Serial Communication Interface 3 */
(void*) isr_sercom4, /* 13 Serial Communication Interface 4 */
(void*) isr_sercom5, /* 14 Serial Communication Interface 5 */
(void*) isr_tcc0, /* 15 Timer Counter Control 0 */
(void*) isr_tcc1, /* 16 Timer Counter Control 1 */
(void*) isr_tcc2, /* 17 Timer Counter Control 2 */
(void*) isr_tc3, /* 18 Basic Timer Counter 0 */
(void*) isr_tc4, /* 19 Basic Timer Counter 1 */
(void*) isr_tc5, /* 20 Basic Timer Counter 2 */
(void*) isr_tc6, /* 21 Basic Timer Counter 3 */
(void*) isr_tc7, /* 22 Basic Timer Counter 4 */
(void*) isr_adc, /* 23 Analog Digital Converter */
(void*) isr_ac, /* 24 Analog Comparators */
(void*) isr_dac, /* 25 Digital Analog Converter */
(void*) isr_ptc, /* 26 Peripheral Touch Controller */
(void*) isr_i2c /* 27 Inter-IC Sound Interface */
&_estack, /* pointer to the top of the stack */
{
/* Cortex-M0+ handlers */
reset_handler_default, /* entry point of the program */
nmi_default, /* non maskable interrupt handler */
hard_fault_default, /* hard fault exception */
(0UL), /* reserved */
(0UL), /* reserved */
(0UL), /* reserved */
(0UL), /* reserved */
(0UL), /* reserved */
(0UL), /* reserved */
(0UL), /* reserved */
isr_svc, /* system call interrupt, in RIOT used for
* switching into thread context on boot */
(0UL), /* reserved */
(0UL), /* reserved */
isr_pendsv, /* pendSV interrupt, in RIOT the actual
* context switching is happening here */
isr_systick, /* SysTick interrupt, not used in RIOT */
/* Atmel specific peripheral handlers */
isr_pm, /* 0 Power Manager */
isr_sysctrl, /* 1 System Control */
isr_wdt, /* 2 Watchdog Timer */
isr_rtc, /* 3 Real-Time Counter */
isr_eic, /* 4 External Interrupt Controller */
isr_nvmctrl, /* 5 Non-Volatile Memory Controller */
isr_dmac, /* 6 Direct Memory Access Controller */
isr_usb, /* 7 Universal Serial Bus */
isr_evsys, /* 8 Event System Interface */
isr_sercom0, /* 9 Serial Communication Interface 0 */
isr_sercom1, /* 10 Serial Communication Interface 1 */
isr_sercom2, /* 11 Serial Communication Interface 2 */
isr_sercom3, /* 12 Serial Communication Interface 3 */
isr_sercom4, /* 13 Serial Communication Interface 4 */
isr_sercom5, /* 14 Serial Communication Interface 5 */
isr_tcc0, /* 15 Timer Counter Control 0 */
isr_tcc1, /* 16 Timer Counter Control 1 */
isr_tcc2, /* 17 Timer Counter Control 2 */
isr_tc3, /* 18 Basic Timer Counter 0 */
isr_tc4, /* 19 Basic Timer Counter 1 */
isr_tc5, /* 20 Basic Timer Counter 2 */
isr_tc6, /* 21 Basic Timer Counter 3 */
isr_tc7, /* 22 Basic Timer Counter 4 */
isr_adc, /* 23 Analog Digital Converter */
isr_ac, /* 24 Analog Comparators */
isr_dac, /* 25 Digital Analog Converter */
isr_ptc, /* 26 Peripheral Touch Controller */
isr_i2c /* 27 Inter-IC Sound Interface */
}
};