From 871dda12161bfacf12e4e768c3df85bf2a8ceaa0 Mon Sep 17 00:00:00 2001 From: Alexandre Abadie Date: Fri, 29 Mar 2019 18:31:30 +0100 Subject: [PATCH] boards/stm32: introduce common default rtt config --- boards/common/stm32/include/cfg_rtt_default.h | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) create mode 100644 boards/common/stm32/include/cfg_rtt_default.h diff --git a/boards/common/stm32/include/cfg_rtt_default.h b/boards/common/stm32/include/cfg_rtt_default.h new file mode 100644 index 0000000000..c77c8e3b3f --- /dev/null +++ b/boards/common/stm32/include/cfg_rtt_default.h @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2019 Inria + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_stm32 + * @{ + * + * @file + * @brief Common configuration for STM32 RTT + * + * @author Alexandre Abadie + */ + +#ifndef CFG_RTT_DEFAULT_H +#define CFG_RTT_DEFAULT_H + +#include "periph_cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name RTT configuration + * + * On the STM32Lx platforms, we always utilize the LPTIM1. + * @{ + */ +#define RTT_NUMOF (1) +#define RTT_FREQUENCY (1024U) /* 32768 / 2^n */ +#define RTT_MAX_VALUE (0x0000ffff) /* 16-bit timer */ +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* CFG_RTT_DEFAULT_H */ +/** @} */