From 87b49d04ab3bb04d40839e9d60a1d37783d6f83e Mon Sep 17 00:00:00 2001
From: Kaspar Schleiser <kaspar@schleiser.de>
Date: Wed, 18 Aug 2021 12:08:22 +0200
Subject: [PATCH] cpu/native: defer yield when IRQs are disabled.

This makes native behave like Cortex-M, which flags PENDSV, which then
gets triggered once IRQs are re-enabled.
---
 cpu/native/irq_cpu.c    | 5 +++++
 cpu/native/native_cpu.c | 5 +----
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/cpu/native/irq_cpu.c b/cpu/native/irq_cpu.c
index ae16a0c5e7..1558d5429d 100644
--- a/cpu/native/irq_cpu.c
+++ b/cpu/native/irq_cpu.c
@@ -201,6 +201,11 @@ unsigned irq_enable(void)
 
     _native_syscall_leave();
 
+    if (_native_in_isr == 0 && sched_context_switch_request) {
+        DEBUG("irq_enable() deferred thread_yield_higher()\n");
+        thread_yield_higher();
+    }
+
     DEBUG("irq_enable(): return\n");
 
     return prev_state;
diff --git a/cpu/native/native_cpu.c b/cpu/native/native_cpu.c
index 136908bd6b..5fb6241628 100644
--- a/cpu/native/native_cpu.c
+++ b/cpu/native/native_cpu.c
@@ -210,12 +210,9 @@ void thread_yield_higher(void)
 {
     sched_context_switch_request = 1;
 
-    if (_native_in_isr == 0) {
+    if (_native_in_isr == 0 && native_interrupts_enabled) {
         ucontext_t *ctx = (ucontext_t *)(thread_get_active()->sp);
         _native_in_isr = 1;
-        if (!native_interrupts_enabled) {
-            warnx("thread_yield_higher: interrupts are disabled - this should not be");
-        }
         irq_disable();
         native_isr_context.uc_stack.ss_sp = __isr_stack;
         native_isr_context.uc_stack.ss_size = SIGSTKSZ;