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drivers/kw2xrf: adapt to new SPI interface

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- add docu for structs, defines and functions
    - exclude drivers/kw2xrf/include/overwrites.h (vendor header)
    - add missing header guards
This commit is contained in:
smlng 2017-01-23 11:06:37 +01:00
parent 5eccbfb2ad
commit 887f499eca
17 changed files with 365 additions and 84 deletions
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10
boards/pba-d-01-kw2x/include/board.h
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@ -68,11 +68,11 @@ extern "C"
@name KW2XRF configuration @name KW2XRF configuration
@{ @{
*/ */
#define KW2XRF_SPI (SPI_DEV(1)) #define KW2XRF_SPI (SPI_DEV(1))
#define KW2XRF_CS (GPIO_PIN(KW2XDRF_PORT, KW2XDRF_PCS0_PIN)) #define KW2XRF_CS (GPIO_PIN(KW2XDRF_PORT, KW2XDRF_PCS0_PIN))
#define KW2XRF_INT (GPIO_PIN(KW2XDRF_PORT, KW2XDRF_IRQ_PIN)) #define KW2XRF_INT (GPIO_PIN(KW2XDRF_PORT, KW2XDRF_IRQ_PIN))
#define KW2XRF_SPI_SPEED (SPI_CLK_10MHZ) #define KW2XRF_SPI_CLK (SPI_CLK_10MHZ)
#define KW2XRF_SHARED_SPI 0 #define KW2XRF_SHARED_SPI 0
/** @}*/ /** @}*/
/** /**

2
boards/pba-d-01-kw2x/include/kw2xrf_params.h
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@ -32,7 +32,7 @@ static const kw2xrf_params_t kw2xrf_params[] =
{ {
{ {
.spi = KW2XRF_SPI, .spi = KW2XRF_SPI,
.spi_speed = KW2XRF_SPI_SPEED, .spi_clk = KW2XRF_SPI_CLK,
.cs_pin = KW2XRF_CS, .cs_pin = KW2XRF_CS,
.int_pin = KW2XRF_INT, .int_pin = KW2XRF_INT,
}, },

1
doc/doxygen/riot.doxyfile
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@ -826,6 +826,7 @@ EXCLUDE_PATTERNS = */board/*/tools/* \
*/cpu/cortexm_common/include/core_cm*.h \ */cpu/cortexm_common/include/core_cm*.h \
*/cpu/stm32f*/include/stm32f* \ */cpu/stm32f*/include/stm32f* \
*/drivers/nrf24l01p/include/nrf24l01p_settings.h \ */drivers/nrf24l01p/include/nrf24l01p_settings.h \
*/drivers/kw2xrf/include/overwrites.h \
*/cpu/nrf5*/include/nrf5*.h \ */cpu/nrf5*/include/nrf5*.h \
*/cpu/lpc1768/include/LPC17xx.h \ */cpu/lpc1768/include/LPC17xx.h \
*/cpu/lpc11u34/include/LPC11Uxx.h \ */cpu/lpc11u34/include/LPC11Uxx.h \

13
drivers/include/kw2xrf.h
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@ -57,6 +57,8 @@ extern "C" {
/** /**
* @brief Default channel used after initialization * @brief Default channel used after initialization
*
* @{
*/ */
#ifdef DEFAULT_CHANNEL #ifdef DEFAULT_CHANNEL
#define KW2XRF_DEFAULT_CHANNEL (DEFAULT_CHANNEL) #define KW2XRF_DEFAULT_CHANNEL (DEFAULT_CHANNEL)
@ -64,8 +66,16 @@ extern "C" {
#ifndef KW2XRF_DEFAULT_CHANNEL #ifndef KW2XRF_DEFAULT_CHANNEL
#define KW2XRF_DEFAULT_CHANNEL (IEEE802154_DEFAULT_CHANNEL) #define KW2XRF_DEFAULT_CHANNEL (IEEE802154_DEFAULT_CHANNEL)
#endif #endif
/** @} */
/**
* @brief Allowed range of channels
*
* @{
*/
#define KW2XRF_MIN_CHANNEL (11U) #define KW2XRF_MIN_CHANNEL (11U)
#define KW2XRF_MAX_CHANNEL (26U) #define KW2XRF_MAX_CHANNEL (26U)
/** @} */
/** /**
* @brief Default TX_POWER in dbm used after initialization * @brief Default TX_POWER in dbm used after initialization
@ -115,7 +125,7 @@ extern "C" {
*/ */
typedef struct kw2xrf_params { typedef struct kw2xrf_params {
spi_t spi; /**< SPI bus the device is connected to */ spi_t spi; /**< SPI bus the device is connected to */
spi_speed_t spi_speed; /**< SPI speed to use */ spi_clk_t spi_clk; /**< SPI clock speed to use */
gpio_t cs_pin; /**< GPIO pin connected to chip select */ gpio_t cs_pin; /**< GPIO pin connected to chip select */
gpio_t int_pin; /**< GPIO pin connected to the interrupt pin */ gpio_t int_pin; /**< GPIO pin connected to the interrupt pin */
} kw2xrf_params_t; } kw2xrf_params_t;
@ -168,7 +178,6 @@ int kw2xrf_init(kw2xrf_t *dev, gpio_cb_t cb);
*/ */
void kw2xrf_reset_phy(kw2xrf_t *dev); void kw2xrf_reset_phy(kw2xrf_t *dev);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

140
drivers/kw2xrf/include/kw2xrf_getset.h
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@ -7,7 +7,7 @@
*/ */
/** /**
* @ingroup * @ingroup drivers_kw2xrf
* @{ * @{
* *
* @file * @file
@ -16,55 +16,189 @@
* @author Johann Fischer <j.fischer@phytec.de> * @author Johann Fischer <j.fischer@phytec.de>
*/ */
#ifndef KW2XRF_GETSET_H
#define KW2XRF_GETSET_H
#include "kw2xrf.h" #include "kw2xrf.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/**
* @brief Set tx power of given device
*
* @param[in] dev kw2xrf device descriptor
* @param[in] txpower transmit power in dBm
*/
void kw2xrf_set_tx_power(kw2xrf_t *dev, int16_t txpower); void kw2xrf_set_tx_power(kw2xrf_t *dev, int16_t txpower);
/**
* @brief Get tx power value of given device
*
* @param[in] dev kw2xrf device descriptor
*
* @return current tx power value
*/
uint16_t kw2xrf_get_txpower(kw2xrf_t *dev); uint16_t kw2xrf_get_txpower(kw2xrf_t *dev);
uint8_t kw2xrf_get_channel(kw2xrf_t *dev); /**
* @brief Set channel of given device
*
* @param[in] dev kw2xrf device descriptor
* @param[in] val channel
*/
int kw2xrf_set_channel(kw2xrf_t *dev, uint8_t val); int kw2xrf_set_channel(kw2xrf_t *dev, uint8_t val);
/**
* @brief Get channel of given device
*
* @param[in] dev kw2xrf device descriptor
*
* @return current channel
*/
uint8_t kw2xrf_get_channel(kw2xrf_t *dev);
/**
* @brief Abort current sequence of device
*
* @param[in] dev kw2xrf device descriptor
*/
void kw2xrf_abort_sequence(kw2xrf_t *dev); void kw2xrf_abort_sequence(kw2xrf_t *dev);
/**
* @brief Set idle sequence state of device
*
* @param[in] dev kw2xrf device descriptor
*/
void kw2xrf_set_idle_sequence(kw2xrf_t *dev); void kw2xrf_set_idle_sequence(kw2xrf_t *dev);
/**
* @brief Set sequence state of device
*
* @param[in] dev kw2xrf device descriptor
* @param[in] seq sequence
*/
void kw2xrf_set_sequence(kw2xrf_t *dev, kw2xrf_physeq_t seq); void kw2xrf_set_sequence(kw2xrf_t *dev, kw2xrf_physeq_t seq);
/**
* @brief Set PAN ID of a given device
*
* @param[in] dev kw2xrf device descriptor
* @param[in] pan PAN ID value
*/
void kw2xrf_set_pan(kw2xrf_t *dev, uint16_t pan); void kw2xrf_set_pan(kw2xrf_t *dev, uint16_t pan);
/**
* @brief Set short address of a given device
*
* @param[in] dev kw2xrf device descriptor
* @param[in] addr short address
*/
void kw2xrf_set_addr_short(kw2xrf_t *dev, uint16_t addr); void kw2xrf_set_addr_short(kw2xrf_t *dev, uint16_t addr);
/**
* @brief Set long address of a given device
*
* @param[in] dev kw2xrf device descriptor
* @param[in] addr long address
*/
void kw2xrf_set_addr_long(kw2xrf_t *dev, uint64_t addr); void kw2xrf_set_addr_long(kw2xrf_t *dev, uint64_t addr);
/**
* @brief Get short address of a given device
*
* @param[in] dev kw2xrf device descriptor
* @return current short address
*/
uint16_t kw2xrf_get_addr_short(kw2xrf_t *dev); uint16_t kw2xrf_get_addr_short(kw2xrf_t *dev);
/**
* @brief Get long address of a given device
*
* @param[in] dev kw2xrf device descriptor
* @return current long address
*/
uint64_t kw2xrf_get_addr_long(kw2xrf_t *dev); uint64_t kw2xrf_get_addr_long(kw2xrf_t *dev);
/**
* @brief Get CCA threshhold of a given device
*
* @param[in] dev kw2xrf device descriptor
* @return current CCA threshhold
*/
int8_t kw2xrf_get_cca_threshold(kw2xrf_t *dev); int8_t kw2xrf_get_cca_threshold(kw2xrf_t *dev);
/**
* @brief Set CCA threshold of a given device
*
* @param[in] dev kw2xrf device descriptor
* @param[in] value CCA threshold
*/
void kw2xrf_set_cca_threshold(kw2xrf_t *dev, int8_t value); void kw2xrf_set_cca_threshold(kw2xrf_t *dev, int8_t value);
/**
* @brief Set CCA mode of a given device
*
* @param[in] dev kw2xrf device descriptor
* @param[in] mode CCA mode
*/
void kw2xrf_set_cca_mode(kw2xrf_t *dev, uint8_t mode); void kw2xrf_set_cca_mode(kw2xrf_t *dev, uint8_t mode);
/**
* @brief Get CCA mode of a given device
*
* @param[in] dev kw2xrf device descriptor
* @return current CCA mode
*/
uint8_t kw2xrf_get_cca_mode(kw2xrf_t *dev); uint8_t kw2xrf_get_cca_mode(kw2xrf_t *dev);
/**
* @brief Get RSSI from LQI value
*
* @param[in] value Current LQI value
*
* @return deduced RSSI in dBm
*/
uint32_t kw2xrf_get_rssi(uint32_t value); uint32_t kw2xrf_get_rssi(uint32_t value);
/**
* @brief Get state of a given device
*
* @param[in] dev kw2xrf device descriptor
* @return current state
*/
netopt_state_t kw2xrf_get_status(kw2xrf_t *dev); netopt_state_t kw2xrf_get_status(kw2xrf_t *dev);
/**
* @brief Enable continous CCA
*
* @param[in] dev kw2xrf device descriptor
*
* @return CCA value
*/
int kw2xrf_cca(kw2xrf_t *dev); int kw2xrf_cca(kw2xrf_t *dev);
/**
* @brief Set receive watermark
*
* @param[in] dev kw2xrf device descriptor
* @param[in] value watermark
*/
void kw2xrf_set_rx_watermark(kw2xrf_t *dev, uint8_t value); void kw2xrf_set_rx_watermark(kw2xrf_t *dev, uint8_t value);
/**
* @brief Set netopt a given device
*
* @param[in] dev kw2xrf device descriptor
* @param[in] option Netopt option type
* @param[in] state state
*/
void kw2xrf_set_option(kw2xrf_t *dev, uint16_t option, bool state); void kw2xrf_set_option(kw2xrf_t *dev, uint16_t option, bool state);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* KW2XRF_GETSET_H */
/** @} */ /** @} */

128
drivers/kw2xrf/include/kw2xrf_intern.h
View File

@ -7,7 +7,7 @@
*/ */
/** /**
* @ingroup * @ingroup drivers_kw2xrf
* @{ * @{
* *
* @file * @file
@ -16,6 +16,9 @@
* @author Johann Fischer <j.fischer@phytec.de> * @author Johann Fischer <j.fischer@phytec.de>
*/ */
#ifndef KW2XRF_INTERN_H
#define KW2XRF_INTERN_H
#include <stdint.h> #include <stdint.h>
#include "kw2xrf.h" #include "kw2xrf.h"
@ -23,7 +26,9 @@
extern "C" { extern "C" {
#endif #endif
/** Power Modes */ /**
* @brief Power Modes
*/
typedef enum { typedef enum {
KW2XRF_HIBERNATE = 0, KW2XRF_HIBERNATE = 0,
KW2XRF_DOZE, KW2XRF_DOZE,
@ -31,6 +36,13 @@ typedef enum {
KW2XRF_AUTODOZE, KW2XRF_AUTODOZE,
} kw2xrf_powermode_t; } kw2xrf_powermode_t;
/**
* @brief Set a certain bit of a kw2xrf register
*
* @param[in] dev kw2xrf device descriptor
* @param[in] reg address of register
* @param[in] bit set this bit
*/
inline void kw2xrf_set_dreg_bit(kw2xrf_t *dev, uint8_t reg, uint8_t bit) inline void kw2xrf_set_dreg_bit(kw2xrf_t *dev, uint8_t reg, uint8_t bit)
{ {
uint8_t tmp = kw2xrf_read_dreg(dev, reg); uint8_t tmp = kw2xrf_read_dreg(dev, reg);
@ -38,6 +50,13 @@ inline void kw2xrf_set_dreg_bit(kw2xrf_t *dev, uint8_t reg, uint8_t bit)
kw2xrf_write_dreg(dev, reg, tmp); kw2xrf_write_dreg(dev, reg, tmp);
} }
/**
* @brief Clear a certain bit of a kw2xrf register
*
* @param[in] dev kw2xrf device descriptor
* @param[in] reg address of register
* @param[in] bit set this bit
*/
inline void kw2xrf_clear_dreg_bit(kw2xrf_t *dev, uint8_t reg, uint8_t bit) inline void kw2xrf_clear_dreg_bit(kw2xrf_t *dev, uint8_t reg, uint8_t bit)
{ {
uint8_t tmp = kw2xrf_read_dreg(dev, reg); uint8_t tmp = kw2xrf_read_dreg(dev, reg);
@ -45,28 +64,67 @@ inline void kw2xrf_clear_dreg_bit(kw2xrf_t *dev, uint8_t reg, uint8_t bit)
kw2xrf_write_dreg(dev, reg, tmp); kw2xrf_write_dreg(dev, reg, tmp);
} }
/** Enable any transceiver interrupt to assert IRQ_B */ /**
* @brief Enable any transceiver interrupt to assert IRQ_B
*
* @param[in] dev kw2xrf device descriptor
*/
inline void kw2xrf_enable_irq_b(kw2xrf_t *dev) inline void kw2xrf_enable_irq_b(kw2xrf_t *dev)
{ {
kw2xrf_clear_dreg_bit(dev, MKW2XDM_PHY_CTRL4, MKW2XDM_PHY_CTRL4_TRCV_MSK); kw2xrf_clear_dreg_bit(dev, MKW2XDM_PHY_CTRL4, MKW2XDM_PHY_CTRL4_TRCV_MSK);
} }
/** Mask all transceiver interrupts to assert IRQ_B */ /**
* @brief Mask all transceiver interrupts to assert IRQ_B
*
* @param[in] dev kw2xrf device descriptor
*/
inline void kw2xrf_mask_irq_b(kw2xrf_t *dev) inline void kw2xrf_mask_irq_b(kw2xrf_t *dev)
{ {
kw2xrf_set_dreg_bit(dev, MKW2XDM_PHY_CTRL4, MKW2XDM_PHY_CTRL4_TRCV_MSK); kw2xrf_set_dreg_bit(dev, MKW2XDM_PHY_CTRL4, MKW2XDM_PHY_CTRL4_TRCV_MSK);
} }
/**
* @brief Disable all interrupts on transceiver
*
* @param[in] dev kw2xrf device descriptor
*/
void kw2xrf_disable_interrupts(kw2xrf_t *dev); void kw2xrf_disable_interrupts(kw2xrf_t *dev);
/**
* @brief
*
* @param[in] dev kw2xrf device descriptor
*/
void kw2xrf_update_overwrites(kw2xrf_t *dev); void kw2xrf_update_overwrites(kw2xrf_t *dev);
/**
* @brief
*
* @param[in] dev kw2xrf device descriptor
*/
void kw2xrf_set_out_clk(kw2xrf_t *dev); void kw2xrf_set_out_clk(kw2xrf_t *dev);
/**
* @brief Set power mode for device
*
* @param[in] dev kw2xrf device descriptor
* @param[in] pm power mode value
*/
void kw2xrf_set_power_mode(kw2xrf_t *dev, kw2xrf_powermode_t pm); void kw2xrf_set_power_mode(kw2xrf_t *dev, kw2xrf_powermode_t pm);
/**
* @brief
*
* @param[in] dev
*
* @return
*/
int kw2xrf_can_switch_to_idle(kw2xrf_t *dev); int kw2xrf_can_switch_to_idle(kw2xrf_t *dev);
/**
* @brief Timebase values
*/
typedef enum kw2xrf_timer_timebase { typedef enum kw2xrf_timer_timebase {
KW2XRF_TIMEBASE_500000HZ = 2, KW2XRF_TIMEBASE_500000HZ = 2,
KW2XRF_TIMEBASE_250000HZ, KW2XRF_TIMEBASE_250000HZ,
@ -77,53 +135,103 @@ typedef enum kw2xrf_timer_timebase {
} kw2xrf_timer_timebase_t; } kw2xrf_timer_timebase_t;
/** /**
* Initialize the Event Timer Block (up counter) * @brief Initialize the Event Timer Block (up counter)
*
* The Event Timer Block provides: * The Event Timer Block provides:
* - Abort an RX and CCA sequence at pre-determined time * - Abort an RX and CCA sequence at pre-determined time
* - Latches "timestamp" value during packet reception * - Latches "timestamp" value during packet reception
* - Initiates timer-triggered sequences * - Initiates timer-triggered sequences
*
* @param[in] dev kw2xrf device descriptor
* @param[in] tb timer base value
*/ */
void kw2xrf_timer_init(kw2xrf_t *dev, kw2xrf_timer_timebase_t tb); void kw2xrf_timer_init(kw2xrf_t *dev, kw2xrf_timer_timebase_t tb);
/**
* @brief Enable start sequence time
*
* @param[in] dev kw2xrf device descriptor
*/
void kw2xrf_timer2_seq_start_on(kw2xrf_t *dev); void kw2xrf_timer2_seq_start_on(kw2xrf_t *dev);
/**
* @brief Disable start sequence timer
*
* @param[in] dev kw2xrf device descriptor
*/
void kw2xrf_timer2_seq_start_off(kw2xrf_t *dev); void kw2xrf_timer2_seq_start_off(kw2xrf_t *dev);
/**
* @brief Enable abort sequence timer
*
* @param[in] dev kw2xrf device descriptor
*/
void kw2xrf_timer3_seq_abort_on(kw2xrf_t *dev); void kw2xrf_timer3_seq_abort_on(kw2xrf_t *dev);
/**
* @brief Disable abort sequence timer
*
* @param[in] dev kw2xrf device descriptor
*/
void kw2xrf_timer3_seq_abort_off(kw2xrf_t *dev); void kw2xrf_timer3_seq_abort_off(kw2xrf_t *dev);
/** /**
* Use T2CMP or T2PRIMECMP to Trigger Transceiver Operations * @brief Use T2CMP or T2PRIMECMP to Trigger Transceiver Operations
*
* @param[in] dev kw2xrf device descriptor
* @param[in] timeout timeout value
*/ */
void kw2xrf_trigger_tx_ops_enable(kw2xrf_t *dev, uint32_t timeout); void kw2xrf_trigger_tx_ops_enable(kw2xrf_t *dev, uint32_t timeout);
/** /**
* Disable Trigger for Transceiver Operations * @brief Disable Trigger for Transceiver Operations
* *
* @param[in] dev kw2xrf device descriptor
*/ */
void kw2xrf_trigger_tx_ops_disable(kw2xrf_t *dev); void kw2xrf_trigger_tx_ops_disable(kw2xrf_t *dev);
/** /**
* Use T3CMP to Abort an RX operation * @brief Use T3CMP to Abort an RX operation
*
* @param[in] dev kw2xrf device descriptor
* @param[in] timeout timeout value
*/ */
void kw2xrf_abort_rx_ops_enable(kw2xrf_t *dev, uint32_t timeout); void kw2xrf_abort_rx_ops_enable(kw2xrf_t *dev, uint32_t timeout);
/** /**
* Disable Trigger to Abort an RX operation * @brief Disable Trigger to Abort an RX operation
*
* @param[in] dev kw2xrf device descriptor
*/ */
void kw2xrf_abort_rx_ops_disable(kw2xrf_t *dev); void kw2xrf_abort_rx_ops_disable(kw2xrf_t *dev);
/**
* @brief Enable sequence timeout
*
* @param[in] dev kw2xrf device descriptor
* @param[in] timeout timeout value
*/
void kw2xrf_seq_timeout_on(kw2xrf_t *dev, uint32_t timeout); void kw2xrf_seq_timeout_on(kw2xrf_t *dev, uint32_t timeout);
/**
* @brief Disable sequence timeout
*
* @param[in] dev kw2xrf device descriptor
*/
void kw2xrf_seq_timeout_off(kw2xrf_t *dev); void kw2xrf_seq_timeout_off(kw2xrf_t *dev);
/** /**
* Returns Timestamp of the actual received packet * @brief Returns Timestamp of the actual received packet
*
* @param[in] dev kw2xrf device descriptor
*
* @return timestamp value
*/ */
uint32_t kw2xrf_get_timestamp(kw2xrf_t *dev); uint32_t kw2xrf_get_timestamp(kw2xrf_t *dev);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* KW2XRF_INTERN_H */
/** @} */ /** @} */

7
drivers/kw2xrf/include/kw2xrf_netdev.h
View File

@ -7,7 +7,7 @@
*/ */
/** /**
* @ingroup * @ingroup drivers_kw2xrf
* @{ * @{
* *
* @file * @file
@ -16,6 +16,9 @@
* @author Johann Fischer <j.fischer@phytec.de> * @author Johann Fischer <j.fischer@phytec.de>
*/ */
#ifndef KW2XRF_NETDEV_H
#define KW2XRF_NETDEV_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
@ -28,4 +31,6 @@ extern const netdev2_driver_t kw2xrf_driver;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* KW2XRF_NETDEV_H */
/** @} */ /** @} */

2
drivers/kw2xrf/include/kw2xrf_reg.h
View File

@ -564,5 +564,5 @@ enum mkw2xdrf_iregister {
} }
#endif #endif
#endif #endif /* MKW2XD_MODEM_REG_H */
/** @} */ /** @} */

7
drivers/kw2xrf/include/kw2xrf_spi.h
View File

@ -14,6 +14,7 @@
* *
* @author Johann Fischer <j.fischer@phytec.de> * @author Johann Fischer <j.fischer@phytec.de>
*/ */
#ifndef KW2XRF_SPI_H #ifndef KW2XRF_SPI_H
#define KW2XRF_SPI_H #define KW2XRF_SPI_H
@ -62,7 +63,7 @@ uint8_t kw2xrf_read_dreg(kw2xrf_t *dev, uint8_t addr);
* @param[in] buf Value that shall be written. * @param[in] buf Value that shall be written.
* @param[in] length Length of the register. * @param[in] length Length of the register.
*/ */
size_t kw2xrf_write_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length); void kw2xrf_write_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length);
/** /**
* @brief Reads a byte from the kw2xrf indirect register. * @brief Reads a byte from the kw2xrf indirect register.
@ -72,7 +73,7 @@ size_t kw2xrf_write_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t len
* @param[in] buf Buffer, where the content of the reg shall be written to. * @param[in] buf Buffer, where the content of the reg shall be written to.
* @param[in] length Length of the register. * @param[in] length Length of the register.
*/ */
size_t kw2xrf_read_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length); void kw2xrf_read_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length);
/** /**
* @brief Writes to a byte from the kw2xrf indirect register. * @brief Writes to a byte from the kw2xrf indirect register.
@ -139,5 +140,5 @@ void kw2xrf_read_fifo(kw2xrf_t *dev, uint8_t *data, uint8_t data_length);
} }
#endif #endif
#endif #endif /* KW2XRF_SPI_H */
/** @} */ /** @} */

5
drivers/kw2xrf/include/kw2xrf_tm.h
View File

@ -16,6 +16,9 @@
* @author Johann Fischer <j.fischer@phytec.de> * @author Johann Fischer <j.fischer@phytec.de>
*/ */
#ifndef KW2XRF_TM_H
#define KW2XRF_TM_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
@ -44,4 +47,6 @@ int kw2xrf_set_test_mode(kw2xrf_t *dev, uint8_t mode);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* KW2XRF_TM_H */
/** @} */ /** @} */

8
drivers/kw2xrf/include/overwrites.h
View File

@ -34,6 +34,10 @@
#ifndef OVERWRITES_H_ #ifndef OVERWRITES_H_
#define OVERWRITES_H_ #define OVERWRITES_H_
#ifdef __cplusplus
extern "C" {
#endif
typedef struct overwrites_tag { typedef struct overwrites_tag {
char address; char address;
char data; char data;
@ -304,5 +308,7 @@ overwrites_t const overwrites_indirect[] ={
end of deprecated versions */ end of deprecated versions */
#ifdef __cplusplus
}
#endif
#endif //OVERWRITES_H_ #endif //OVERWRITES_H_

2
drivers/kw2xrf/kw2xrf.c
View File

@ -85,6 +85,7 @@ static void kw2xrf_set_address(kw2xrf_t *dev)
void kw2xrf_setup(kw2xrf_t *dev, const kw2xrf_params_t *params) void kw2xrf_setup(kw2xrf_t *dev, const kw2xrf_params_t *params)
{ {
DEBUG("[kw2xrf]: kw2xrf_setup\n");
netdev2_t *netdev = (netdev2_t *)dev; netdev2_t *netdev = (netdev2_t *)dev;
netdev->driver = &kw2xrf_driver; netdev->driver = &kw2xrf_driver;
@ -93,7 +94,6 @@ void kw2xrf_setup(kw2xrf_t *dev, const kw2xrf_params_t *params)
dev->idle_state = XCVSEQ_RECEIVE; dev->idle_state = XCVSEQ_RECEIVE;
dev->state = 0; dev->state = 0;
dev->pending_tx = 0; dev->pending_tx = 0;
kw2xrf_spi_init(dev); kw2xrf_spi_init(dev);
kw2xrf_set_power_mode(dev, KW2XRF_IDLE); kw2xrf_set_power_mode(dev, KW2XRF_IDLE);
DEBUG("[kw2xrf]: setup finished\n"); DEBUG("[kw2xrf]: setup finished\n");

2
drivers/kw2xrf/kw2xrf_intern.c
View File

@ -62,6 +62,7 @@ void kw2xrf_set_out_clk(kw2xrf_t *dev)
void kw2xrf_set_power_mode(kw2xrf_t *dev, kw2xrf_powermode_t pm) void kw2xrf_set_power_mode(kw2xrf_t *dev, kw2xrf_powermode_t pm)
{ {
DEBUG("[kw2xrf]: kw2xrf_set_power_mode\n");
uint8_t reg = 0; uint8_t reg = 0;
switch (pm) { switch (pm) {
case KW2XRF_HIBERNATE: case KW2XRF_HIBERNATE:
@ -87,7 +88,6 @@ void kw2xrf_set_power_mode(kw2xrf_t *dev, kw2xrf_powermode_t pm)
dev->state = NETOPT_STATE_IDLE; dev->state = NETOPT_STATE_IDLE;
break; break;
} }
kw2xrf_write_dreg(dev, MKW2XDM_PWR_MODES, reg); kw2xrf_write_dreg(dev, MKW2XDM_PWR_MODES, reg);
} }

85
drivers/kw2xrf/kw2xrf_spi.c
View File

@ -14,6 +14,7 @@
* *
* @author Johann Fischer <j.fischer@phytec.de> * @author Johann Fischer <j.fischer@phytec.de>
* @author Jonas Remmert <j.remmert@phytec.de> * @author Jonas Remmert <j.remmert@phytec.de>
* @author Sebastian Meiling <s@mlng.net>
* @} * @}
*/ */
#include "kw2xrf.h" #include "kw2xrf.h"
@ -27,55 +28,76 @@
#define ENABLE_DEBUG (0) #define ENABLE_DEBUG (0)
#include "debug.h" #include "debug.h"
#define SPI_MODE (SPI_MODE_0) #define SPIDEV (dev->params.spi)
#define SPICLK (dev->params.spi_clk)
#define CSPIN (dev->params.cs_pin)
#define SPIMODE (SPI_MODE_0)
#define KW2XRF_IBUF_LENGTH (9) #define KW2XRF_IBUF_LENGTH (9)
static uint8_t ibuf[KW2XRF_IBUF_LENGTH]; static uint8_t ibuf[KW2XRF_IBUF_LENGTH];
void kw2xrf_spi_transfer_head(kw2xrf_t *dev) void kw2xrf_spi_transfer_head(kw2xrf_t *dev)
{ {
spi_acquire(SPIDEV, CSPIN, SPIMODE, SPICLK);
#if KW2XRF_SHARED_SPI #if KW2XRF_SHARED_SPI
spi_acquire(dev->params.spi); gpio_clear(CSPIN);
gpio_clear(dev->params.cs_pin);
#endif #endif
} }
void kw2xrf_spi_transfer_tail(kw2xrf_t *dev) void kw2xrf_spi_transfer_tail(kw2xrf_t *dev)
{ {
#if KW2XRF_SHARED_SPI #if KW2XRF_SHARED_SPI
gpio_set(dev->params.cs_pin); gpio_set(CSPIN);
spi_release(dev->params.spi);
#endif #endif
spi_release(SPIDEV);
} }
int kw2xrf_spi_init(kw2xrf_t *dev) int kw2xrf_spi_init(kw2xrf_t *dev)
{ {
DEBUG("[kw2xrf_spi] kw2xrf_spi_init\n");
int res; int res;
#if KW2XRF_SHARED_SPI #if KW2XRF_SHARED_SPI
spi_acquire(dev->params.spi); spi_acquire(SPIDEV, CSPIN, SPIMODE, SPICLK);
#endif #endif
res = spi_init_master(dev->params.spi, SPI_CONF_FIRST_RISING, dev->params.spi_speed); res = spi_init_cs(SPIDEV, CSPIN);
#if KW2XRF_SHARED_SPI #if KW2XRF_SHARED_SPI
spi_release(dev->params.spi); spi_release(SPIDEV);
gpio_init(CSPIN, GPIO_OUT);
gpio_init(dev->params.cs_pin, GPIO_OUT); gpio_set(CSPIN);
gpio_set(dev->params.cs_pin);
#endif #endif
if (res < 0) { if (res != SPI_OK) {
DEBUG("[kw2xrf]: error initializing SPI_%i device (code %i)\n", DEBUG("[kw2xrf_spi] error: initializing SPI_%i device (code %i)\n",
kw2xrf_spi, res); SPIDEV, res);
return -1; return 1;
} }
/* verify SPI params */
res = spi_acquire(SPIDEV, CSPIN, SPIMODE, SPICLK);
if (res == SPI_NOMODE) {
puts("[kw2xrf_spi] error: given SPI mode is not supported");
return 1;
}
else if (res == SPI_NOCLK) {
puts("[kw2xrf_spi] error: targeted clock speed is not supported");
return 1;
}
else if (res != SPI_OK) {
puts("[kw2xrf_spi] error: unable to acquire bus with given parameters");
return 1;
}
spi_release(SPIDEV);
DEBUG("[kw2xrf_spi] SPI_DEV(%i) initialized: mode: %i, clk: %i, cs_pin: %i\n",
SPIDEV, SPIMODE, SPICLK, CSPIN);
return 0; return 0;
} }
void kw2xrf_write_dreg(kw2xrf_t *dev, uint8_t addr, uint8_t value) void kw2xrf_write_dreg(kw2xrf_t *dev, uint8_t addr, uint8_t value)
{ {
DEBUG("[kw2xrf_spi] kw2xrf_write_dreg, addr %u, value %u\n", addr, value);
kw2xrf_spi_transfer_head(dev); kw2xrf_spi_transfer_head(dev);
spi_transfer_reg(dev->params.spi, dev->params.cs_pin, addr, value); spi_transfer_reg(SPIDEV, CSPIN, addr, value);
kw2xrf_spi_transfer_tail(dev); kw2xrf_spi_transfer_tail(dev);
return; return;
} }
@ -84,27 +106,26 @@ uint8_t kw2xrf_read_dreg(kw2xrf_t *dev, uint8_t addr)
{ {
uint8_t value; uint8_t value;
kw2xrf_spi_transfer_head(dev); kw2xrf_spi_transfer_head(dev);
value = spi_transfer_reg(dev->params.spi, dev->params.cs_pin, value = spi_transfer_reg(SPIDEV, CSPIN, (addr | MKW2XDRF_REG_READ), 0x0);
(addr | MKW2XDRF_REG_READ), 0x0);
kw2xrf_spi_transfer_tail(dev); kw2xrf_spi_transfer_tail(dev);
DEBUG("[kw2xrf_spi] kw2xrf_read_dreg, addr %u, value %u\n", addr, value);
return value; return value;
} }
size_t kw2xrf_write_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length) void kw2xrf_write_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length)
{ {
DEBUG("[kw2xrf_spi] kw2xrf_write_dregs, addr %u, length %u\n", addr, length);
kw2xrf_spi_transfer_head(dev); kw2xrf_spi_transfer_head(dev);
size_t i = spi_transfer_regs(dev->params.spi, addr, (char *)buf, NULL, length); spi_transfer_regs(SPIDEV, CSPIN, addr, buf, NULL, length);
kw2xrf_spi_transfer_tail(dev); kw2xrf_spi_transfer_tail(dev);
return i;
} }
size_t kw2xrf_read_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length) void kw2xrf_read_dregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length)
{ {
kw2xrf_spi_transfer_head(dev); kw2xrf_spi_transfer_head(dev);
size_t i = spi_transfer_regs(dev->params.spi, (addr | MKW2XDRF_REG_READ), spi_transfer_regs(SPIDEV, CSPIN, (addr | MKW2XDRF_REG_READ), NULL, buf, length);
NULL, (char *)buf, length); DEBUG("[kw2xrf_spi] kw2xrf_read_dregs, addr %u, length %u\n", addr, length);
kw2xrf_spi_transfer_tail(dev); kw2xrf_spi_transfer_tail(dev);
return i;
} }
@ -121,8 +142,7 @@ void kw2xrf_write_iregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t lengt
} }
kw2xrf_spi_transfer_head(dev); kw2xrf_spi_transfer_head(dev);
spi_transfer_regs(dev->params.spi, dev->params.cs_pin, MKW2XDM_IAR_INDEX, spi_transfer_regs(SPIDEV, CSPIN, MKW2XDM_IAR_INDEX, ibuf, NULL, length + 1);
ibuf, NULL, length + 1);
kw2xrf_spi_transfer_tail(dev); kw2xrf_spi_transfer_tail(dev);
return; return;
@ -137,8 +157,7 @@ void kw2xrf_read_iregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length
ibuf[0] = addr; ibuf[0] = addr;
kw2xrf_spi_transfer_head(dev); kw2xrf_spi_transfer_head(dev);
spi_transfer_regs(dev->params.spi, dev->params.cs_pin, spi_transfer_regs(SPIDEV, CSPIN, (MKW2XDM_IAR_INDEX | MKW2XDRF_REG_READ),
(MKW2XDM_IAR_INDEX | MKW2XDRF_REG_READ),
ibuf, ibuf, length + 1); ibuf, ibuf, length + 1);
kw2xrf_spi_transfer_tail(dev); kw2xrf_spi_transfer_tail(dev);
@ -152,15 +171,13 @@ void kw2xrf_read_iregs(kw2xrf_t *dev, uint8_t addr, uint8_t *buf, uint8_t length
void kw2xrf_write_fifo(kw2xrf_t *dev, uint8_t *data, uint8_t length) void kw2xrf_write_fifo(kw2xrf_t *dev, uint8_t *data, uint8_t length)
{ {
kw2xrf_spi_transfer_head(dev); kw2xrf_spi_transfer_head(dev);
spi_transfer_regs(dev->params.spi, dev->params.cs_pin, spi_transfer_regs(SPIDEV, CSPIN, MKW2XDRF_BUF_WRITE, data, NULL, length);
MKW2XDRF_BUF_WRITE, data, NULL, length);
kw2xrf_spi_transfer_tail(dev); kw2xrf_spi_transfer_tail(dev);
} }
void kw2xrf_read_fifo(kw2xrf_t *dev, uint8_t *data, uint8_t length) void kw2xrf_read_fifo(kw2xrf_t *dev, uint8_t *data, uint8_t length)
{ {
kw2xrf_spi_transfer_head(dev); kw2xrf_spi_transfer_head(dev);
spi_transfer_regs(dev->params.spi, dev->params.cs_pin, spi_transfer_regs(SPIDEV, CSPIN, MKW2XDRF_BUF_READ, NULL, data, length);
MKW2XDRF_BUF_READ, NULL, data, length);
kw2xrf_spi_transfer_tail(dev); kw2xrf_spi_transfer_tail(dev);
} }

17
sys/auto_init/netif/auto_init_kw2xrf.c
View File

@ -17,6 +17,7 @@
* *
* @author Kaspar Schleiser <kaspar@schleiser.de> * @author Kaspar Schleiser <kaspar@schleiser.de>
* @author Jonas Remmert <j.remmert@phytec.de> * @author Jonas Remmert <j.remmert@phytec.de>
* @author Sebastian Meiling <s@mlng.net>
*/ */
#ifdef MODULE_KW2XRF #ifdef MODULE_KW2XRF
@ -51,24 +52,18 @@ void auto_init_kw2xrf(void)
const kw2xrf_params_t *p = &kw2xrf_params[i]; const kw2xrf_params_t *p = &kw2xrf_params[i];
LOG_DEBUG("[auto_init_netif] initializing kw2xrf #%u\n", i); LOG_DEBUG("[auto_init_netif] initializing kw2xrf #%u\n", i);
kw2xrf_setup(&kw2xrf_devs[i], (kw2xrf_params_t*) p); kw2xrf_setup(&kw2xrf_devs[i], (kw2xrf_params_t*) p);
int res = gnrc_netdev2_ieee802154_init(&gnrc_adpt[i], if (gnrc_netdev2_ieee802154_init(&gnrc_adpt[i], (netdev2_ieee802154_t *)&kw2xrf_devs[i]) < 0) {
(netdev2_ieee802154_t *)&kw2xrf_devs[i]); LOG_ERROR("[auto_init_netif] error, initializing kw2xrf #%u\n", i);
if (res < 0) {
LOG_ERROR("[auto_init_netif] initializing kw2xrf #%u\n", i);
} }
else { else {
gnrc_netdev2_init(_nomac_stacks[i], gnrc_netdev2_init(_nomac_stacks[i], KW2XRF_MAC_STACKSIZE,
KW2XRF_MAC_STACKSIZE, KW2XRF_MAC_PRIO, "kw2xrf", &gnrc_adpt[i]);
KW2XRF_MAC_PRIO,
"kw2xrf",
&gnrc_adpt[i]);
} }
} }
} }
#else #else
typedef int dont_be_pedantic; typedef int dont_be_pedantic;
#endif /* MODULE_GNRC_KW2XRF */ #endif /* MODULE_KW2XRF */
/** @} */ /** @} */

1
tests/driver_kw2xrf/Makefile
View File

@ -4,6 +4,7 @@ include ../Makefile.tests_common
FEATURES_REQUIRED = periph_spi periph_gpio FEATURES_REQUIRED = periph_spi periph_gpio
BOARD_INSUFFICIENT_MEMORY := stm32f0discovery nucleo-f334 weio BOARD_INSUFFICIENT_MEMORY := stm32f0discovery nucleo-f334 weio
# msba2 fails with linker error in cc110x
USEMODULE += auto_init_gnrc_netif USEMODULE += auto_init_gnrc_netif
USEMODULE += gnrc_netif USEMODULE += gnrc_netif

19
tests/driver_kw2xrf/kw2xrf_params.h
View File

@ -39,23 +39,22 @@ extern "C" {
#ifndef KWRF_INT #ifndef KWRF_INT
#error "Interrupt pin not defined" #error "Interrupt pin not defined"
#endif #endif
#ifndef KWRF_SPI_SPEED #ifndef KWRF_SPI_CLK
#define KWRF_SPI_SPEED (SPI_CLK_10MHZ) #define KWRF_SPI_CLK (SPI_CLK_10MHZ)
#endif #endif
/**@}*/ /**@}*/
/** /**
* @name KW2XRF configuration * @name KW2XRF configuration
*/ */
static const kw2xrf_params_t kw2xrf_params[] = static const kw2xrf_params_t kw2xrf_params[] = {
{ {
{ .spi = KWRF_SPI,
.spi = KWRF_SPI, .spi_clk = KWRF_SPI_CLK,
.spi_speed = KWRF_SPI_SPEED, .cs_pin = KWRF_CS,
.cs_pin = KWRF_CS, .int_pin = KWRF_INT,
.int_pin = KWRF_INT, },
}, };
};
/** @} */ /** @} */
#ifdef __cplusplus #ifdef __cplusplus