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Merge pull request #8061 from haukepetersen/opt_boards_wsn430

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boards: cleanup structure of wsn430 boards
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Martine Lenders 2018-01-24 16:05:42 +01:00 committed by GitHub
commit 8ab837c4b9
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13 changed files with 85 additions and 244 deletions
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10
boards/common/wsn430/Makefile.features Normal file
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@ -0,0 +1,10 @@
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_uart
# The board MPU family (used for grouping by the CI system)
FEATURES_MCU_GROUP = msp430
-include $(RIOTCPU)/msp430fxyz/Makefile.features

15
boards/common/wsn430/Makefile.include
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@ -1,17 +1,18 @@
## the cpu to build for # select the used CPU
export CPU = msp430fxyz export CPU = msp430fxyz
export CPU_MODEL = msp430f1611 export CPU_MODEL = msp430f1611
# set default port depending on operating system # include this module in the build
USEMODULE += boards_common_wsn430
# use common wsn430 includes
export INCLUDES += -I$(RIOTBOARD)/common/wsn430/include
# configure the serial interface
PORT_LINUX ?= /dev/ttyUSB0 PORT_LINUX ?= /dev/ttyUSB0
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*))) PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*)))
# setup serial terminal
include $(RIOTMAKE)/tools/serial.inc.mk include $(RIOTMAKE)/tools/serial.inc.mk
# setup flash tool # configure the flash tool
export OFLAGS = -O ihex export OFLAGS = -O ihex
export FLASHER = mspdebug export FLASHER = mspdebug
export FFLAGS = -d $(PORT) -j uif "prog $(HEXFILE)" export FFLAGS = -d $(PORT) -j uif "prog $(HEXFILE)"
# include common wsn430 includes
export INCLUDES += -I$(RIOTBOARD)/common/wsn430/include

124
boards/common/wsn430/board_init.c
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@ -1,6 +1,6 @@
/* /*
* board_init.c - Implementation of functions to init board.
* Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de> * Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de>
* 2017 Freie Universität Berlin
* *
* This file is subject to the terms and conditions of the GNU Lesser * This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level * General Public License v2.1. See the file LICENSE in the top level
@ -15,103 +15,76 @@
* @brief Board initialization for WSN430 * @brief Board initialization for WSN430
* *
* @author Milan Babel <babel@inf.fu-berlin.de> * @author Milan Babel <babel@inf.fu-berlin.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* *
* @} * @}
*/ */
#include "cpu.h" #include "cpu.h"
#include "irq.h" #include "irq.h"
#include "board.h" #include "assert.h"
#include "msp430.h"
#include "debug.h"
#include "uart_stdio.h" #include "uart_stdio.h"
#include "periph_conf.h"
static volatile uint32_t __msp430_cpu_speed = MSP430_INITIAL_CPU_SPEED; enum {
MCLK_2MHZ_SCLK_1MHZ = (SELM_2 | DIVM_2 | SELS | DIVS_3),
void msp430_init_dco(void); MCLK_4MHZ_SCLK_1MHZ = (SELM_2 | DIVM_1 | SELS | DIVS_3),
MCLK_8MHZ_SCLK_1MHZ = (SELM_2 | SELS | DIVS_3),
typedef enum { MCLK_8MHZ_SCLK_8MHZ = (SELM_2 | SELS),
MCLK_2MHZ_SCLK_1MHZ = 1000002uL, };
MCLK_4MHZ_SCLK_1MHZ = 1000004uL,
MCLK_8MHZ_SCLK_1MHZ = 1000008uL,
MCLK_8MHZ_SCLK_8MHZ = 8000000uL
}speed_t;
static void msb_ports_init(void) static void msb_ports_init(void)
{ {
// Port 1: GDO, Flash, BSL TX /* Port 1: GDO, Flash, BSL TX */
P1SEL = 0x02; // Port1 Select: 00000010 = 0x02 P1SEL = 0x02; /* Port1 Select: 00000010 = 0x02 */
P1OUT = 0x00; // Port1 Output: 00000000 = 0x00 P1OUT = 0x00; /* Port1 Output: 00000000 = 0x00 */
P1DIR = 0x87; // Port1 Direction: 10000111 = 0x87 P1DIR = 0x87; /* Port1 Direction: 10000111 = 0x87 */
// Port 2: GPIO, BSL RX, 1wire /* Port 2: GPIO, BSL RX, 1wire */
P2SEL = 0x04; // Port2 Select: 00000100 = 0x04 P2SEL = 0x04; /* Port2 Select: 00000100 = 0x04 */
P2OUT = 0x00; // Port2 Output: 00000000 = 0x00 P2OUT = 0x00; /* Port2 Output: 00000000 = 0x00 */
P2DIR = 0xFF; // Port2 Direction: 11111111 = 0xFF P2DIR = 0xFF; /* Port2 Direction: 11111111 = 0xFF */
// Port 3: UART /* Port 3: UART */
P3SEL = 0xFE; // Port3 Select: 11111110 = 0xFE P3SEL = 0xFE; /* Port3 Select: 11111110 = 0xFE */
P3OUT = 0x00; // Port3 Output: 00000000 = 0x00 P3OUT = 0x00; /* Port3 Output: 00000000 = 0x00 */
P3DIR = 0xFF; // Port3 Direction: 11111111 = 0xFF P3DIR = 0xFF; /* Port3 Direction: 11111111 = 0xFF */
// Port 4: CS /* Port 4: CS */
P4SEL = 0x00; // Port4 Select: 00000000 = 0x00 P4SEL = 0x00; /* Port4 Select: 00000000 = 0x00 */
P4OUT = 0x14; // Port4 Output: 00010100 = 0x14 P4OUT = 0x14; /* Port4 Output: 00010100 = 0x14 */
P4DIR = 0xFF; // Port4 Direction: 11111111 = 0xFF P4DIR = 0xFF; /* Port4 Direction: 11111111 = 0xFF */
// Port 5: SPI, LED /* Port 5: SPI, LED */
P5SEL = 0x0E; // Port5 Select: 00001110 = 0x0E P5SEL = 0x0E; /* Port5 Select: 00001110 = 0x0E */
P5OUT = 0x70; // Port5 Output: 01110000 = 0x70 P5OUT = 0x70; /* Port5 Output: 01110000 = 0x70 */
P5DIR = 0x70; // Port5 Direction: 01110000 = 0x70 P5DIR = 0x70; /* Port5 Direction: 01110000 = 0x70 */
P6SEL = 0xFF; // Port6 Select: 11111111 = 0xFF P6SEL = 0xFF; /* Port6 Select: 11111111 = 0xFF */
P6OUT = 0x00; // Port6 Output: 00000000 = 0x00 P6OUT = 0x00; /* Port6 Output: 00000000 = 0x00 */
P6DIR = 0xFF; // Port6 Direction: 11111000 = 0xF8 P6DIR = 0xFF; /* Port6 Direction: 11111000 = 0xF8 */
} }
void msp430_set_cpu_speed(uint32_t speed) static void msp430_init_cpuclk(uint8_t speed)
{ {
irq_disable(); /* stop watchdog */
__msp430_cpu_speed = speed; WDTCTL = WDTPW + WDTHOLD;
msp430_init_dco(); BCSCTL1 = RSEL2;
irq_enable();
}
/*---------------------------------------------------------------------------*/ /* wait for XTAL to stabilize */
void msp430_init_dco(void) do {
{ /* clear oscillator fault flag */
/*----------------------- use external oszillator -------------------------*/ IFG1 &= ~OFIFG;
uint16_t i; /* time for flag to set */
for (uint16_t i = 0xFF; i > 0; i--) {}
} while ((IFG1 & OFIFG) != 0);
// Stop watchdog /* apply clock config */
WDTCTL = WDTPW + WDTHOLD; BCSCTL2 = speed;
BCSCTL1 = RSEL2;
// Wait for xtal to stabilize
do {
IFG1 &= ~OFIFG; // Clear oscillator fault flag
for (i = 0xFF; i > 0; i--); // Time for flag to set
}
while ((IFG1 & OFIFG) != 0); // Oscillator fault flag still set?
switch (__msp430_cpu_speed) {
case MCLK_2MHZ_SCLK_1MHZ:
BCSCTL2 = (SELM_2 | DIVM_2) | (SELS | DIVS_3);
break;
case MCLK_4MHZ_SCLK_1MHZ:
BCSCTL2 = (SELM_2 | DIVM_1) | (SELS | DIVS_3);
break;
case MCLK_8MHZ_SCLK_1MHZ:
BCSCTL2 = SELM_2 | (SELS | DIVS_3);
break;
default:
BCSCTL2 = SELM_2 + SELS; // MCLK and SMCLK = XT2 (safe)
break;
}
} }
void board_init(void) void board_init(void)
@ -119,7 +92,10 @@ void board_init(void)
msp430_cpu_init(); msp430_cpu_init();
msb_ports_init(); msb_ports_init();
msp430_set_cpu_speed(MCLK_8MHZ_SCLK_8MHZ); /* initialize CPU clock */
unsigned state = irq_disable();
msp430_init_cpuclk(CLOCK_MODE);
irq_restore(state);
/* initialize STDIO over UART */ /* initialize STDIO over UART */
uart_stdio_init(); uart_stdio_init();

14
boards/common/wsn430/include/board_common.h → boards/common/wsn430/include/board.h
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@ -1,6 +1,6 @@
/* /*
* Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de> * Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de>
* 2016 Freie Universität Berlin * 2015-2017 Freie Universität Berlin
* *
* This file is subject to the terms and conditions of the GNU Lesser * This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level * General Public License v2.1. See the file LICENSE in the top level
@ -8,9 +8,9 @@
*/ */
/** /**
* @defgroup boards_common_wsn430 WSN430 common * @defgroup boards_common_wsn430 Shared WSN430 files
* @ingroup boards_common * @ingroup boards_common
* @brief Shared files and configuration for all WSN430 based boards. * @brief Common files for WSN430 based boards
* @{ * @{
* *
* @file * @file
@ -21,8 +21,10 @@
* *
*/ */
#ifndef BOARD_COMMON_H #ifndef BOARD_H
#define BOARD_COMMON_H #define BOARD_H
#include "cpu.h"
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
@ -71,5 +73,5 @@ extern "C" {
} }
#endif #endif
#endif /* BOARD_COMMON_H */ #endif /* BOARD_H */
/** @} */ /** @} */

14
boards/common/wsn430/include/periph_conf.h
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@ -1,6 +1,6 @@
/* /*
* Copyright (C) 2014 INRIA * Copyright (C) 2014 INRIA
* 2015 Freie Universität Berlin * 2015,2017 Freie Universität Berlin
* *
* This file is subject to the terms and conditions of the GNU Lesser General * This file is subject to the terms and conditions of the GNU Lesser General
* Public License v2.1. See the file LICENSE in the top level directory for more * Public License v2.1. See the file LICENSE in the top level directory for more
@ -12,10 +12,10 @@
* @{ * @{
* *
* @file * @file
* @brief WSN30 peripheral configuration * @brief WSN430 peripheral configuration
* *
* @author Oliver Hahm <oliver.hahm@inria.fr> * @author Oliver Hahm <oliver.hahm@inria.fr>
* Hauke Petersen <hauke.petersen@fu-berlin.de> * @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*/ */
#ifndef PERIPH_CONF_H #ifndef PERIPH_CONF_H
@ -29,10 +29,9 @@ extern "C" {
* @name Clock configuration * @name Clock configuration
* @{ * @{
*/ */
/** @todo Move all clock configuration code here from the board.h */ #define CLOCK_CORECLOCK (8000000UL)
#define CLOCK_CORECLOCK (8000000U) #define CLOCK_MODE (MCLK_8MHZ_SCLK_8MHZ)
#define CLOCK_CMCLK (CLOCK_CORECLOCK) /* no divider programmed */
#define CLOCK_CMCLK CLOCK_CORECLOCK /* no divider programmed */
/** @} */ /** @} */
/** /**
@ -92,3 +91,4 @@ extern "C" {
#endif #endif
#endif /* PERIPH_CONF_H */ #endif /* PERIPH_CONF_H */
/** @} */

1
boards/wsn430-v1_3b/Makefile
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@ -1,5 +1,4 @@
MODULE = board MODULE = board
DIRS = $(RIOTBOARD)/common/wsn430 DIRS = $(RIOTBOARD)/common/wsn430
include $(RIOTBASE)/Makefile.base include $(RIOTBASE)/Makefile.base

11
boards/wsn430-v1_3b/Makefile.features
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@ -1,10 +1 @@
# Put defined MCU peripherals here (in alphabetical order) include $(RIOTBOARD)/common/wsn430/Makefile.features
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_uart
# The board MPU family (used for grouping by the CI system)
FEATURES_MCU_GROUP = msp430
-include $(RIOTCPU)/msp430fxyz/Makefile.features

1
boards/wsn430-v1_3b/Makefile.include
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@ -1,2 +1 @@
USEMODULE += boards_common_wsn430
include $(RIOTBOARD)/common/wsn430/Makefile.include include $(RIOTBOARD)/common/wsn430/Makefile.include

63
boards/wsn430-v1_3b/include/board.h
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@ -1,63 +0,0 @@
/*
* Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de>
* 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @defgroup boards_wsn430-v1_3b WSN430 v1.3b
* @ingroup boards
* @brief Support for the Senslab WSN430 v1.3b board
*
* <h2>Compontents</h2>
* \li MSP430
* \li CC1100
*
* @{
*
* @file
* @brief Basic definitions for the Senslab WSN430 v1.3b board
*
* @author Milan Babel <babel@inf.fu-berlin.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*/
#ifndef BOARD_H
#define BOARD_H
#include "board_common.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Define the CPU model for the <msp430.h>
*/
#ifndef __MSP430F1611__
#define __MSP430F1611__
#endif
/**
* @name CPU core configuration
* @{
*/
/** @todo Move this to the periph_conf.h */
#define MSP430_INITIAL_CPU_SPEED 800000uL
#define F_CPU MSP430_INITIAL_CPU_SPEED
#define F_RC_OSCILLATOR 32768
#define MSP430_HAS_DCOR 0
#define MSP430_HAS_EXTERNAL_CRYSTAL 1
/** @} */
#ifdef __cplusplus
}
#endif
#include <msp430x16x.h>
/** @} */
#endif /* BOARD_H */

1
boards/wsn430-v1_4/Makefile
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@ -1,5 +1,4 @@
MODULE = board MODULE = board
DIRS = $(RIOTBOARD)/common/wsn430 DIRS = $(RIOTBOARD)/common/wsn430
include $(RIOTBASE)/Makefile.base include $(RIOTBASE)/Makefile.base

11
boards/wsn430-v1_4/Makefile.features
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@ -1,10 +1 @@
# Put defined MCU peripherals here (in alphabetical order) include $(RIOTBOARD)/common/wsn430/Makefile.features
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_spi
FEATURES_PROVIDED += periph_uart
# The board MPU family (used for grouping by the CI system)
FEATURES_MCU_GROUP = msp430
-include $(RIOTCPU)/msp430fxyz/Makefile.features

1
boards/wsn430-v1_4/Makefile.include
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@ -1,2 +1 @@
USEMODULE += boards_common_wsn430
include $(RIOTBOARD)/common/wsn430/Makefile.include include $(RIOTBOARD)/common/wsn430/Makefile.include

63
boards/wsn430-v1_4/include/board.h
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@ -1,63 +0,0 @@
/*
* Copyright (C) 2013 Milan Babel <babel@inf.fu-berlin.de>
* 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @defgroup boards_wsn430-v1_4 WSN430 v1.4
* @ingroup boards
* @brief Support for the Senslab WSN430 v1.4 board
*
* <h2>Compontents</h2>
* \li MSP430
* \li CC2420
*
* @{
*
* @file
* @brief Basic definitions for the Senslab WSN430 v1.4 board
*
* @author Milan Babel <babel@inf.fu-berlin.de>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*/
#ifndef BOARD_H
#define BOARD_H
#include "board_common.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Define the CPU model for the <msp430.h>
*/
#ifndef __MSP430F1611__
#define __MSP430F1611__
#endif
/**
* @name CPU core configuration
* @{
*/
/** @todo Move this to the periph_conf.h */
#define MSP430_INITIAL_CPU_SPEED 800000uL
#define F_CPU MSP430_INITIAL_CPU_SPEED
#define F_RC_OSCILLATOR 32768
#define MSP430_HAS_DCOR 0
#define MSP430_HAS_EXTERNAL_CRYSTAL 1
/** @} */
#ifdef __cplusplus
}
#endif
#include <msp430x16x.h>
/** @} */
#endif /* BOARD_H */