diff --git a/boards/common/blxxxpill/include/board_common.h b/boards/common/blxxxpill/include/board_common.h
index a405eadd8c..5305da7d14 100644
--- a/boards/common/blxxxpill/include/board_common.h
+++ b/boards/common/blxxxpill/include/board_common.h
@@ -67,6 +67,14 @@ void board_init(void);
 #define XTIMER_BACKOFF      (19)
 /** @} */
 
+/* The boards debug header only exports  SWD, so JTAG-only pins PA15, PB3(*),
+ * and PB4 can be remapped as regular GPIOs instead. (Note: PB3 is also used as
+ * SWO.  The user needs to take care to not enable SWO with the debugger while
+ * at the same time PB3 is used as GPIO. But RIOT does not use SWO in any case,
+ * so if a user adds this feature in her/his own code, she/he should be well
+ * aware of this.)
+ */
+#define STM32F1_DISABLE_JTAG    /**< Disable JTAG to allow pins being used as GPIOs */
 #ifdef __cplusplus
 }
 #endif
diff --git a/boards/nucleo-f103rb/Makefile.include b/boards/nucleo-f103rb/Makefile.include
index 8db8eaed90..f0ba8bb233 100644
--- a/boards/nucleo-f103rb/Makefile.include
+++ b/boards/nucleo-f103rb/Makefile.include
@@ -1,2 +1,9 @@
 # load the common Makefile.include for Nucleo boards
 include $(RIOTBOARD)/common/nucleo64/Makefile.include
+
+# On-board debugger uses SWD, so JTAG-only pins PA15, PB3(*), and PB4 can be
+# remapped as regular GPIOs instead. (Note: PB3 is also used as SWO. The user
+# needs to take care to not enable SWO with the debugger while at the same time
+# PB3 is used as GPIO. But RIOT does not use SWO in any case, so if a user adds
+# this feature in her/his own code, she/he should be well aware of this.)
+CFLAGS += -DSTM32F1_DISABLE_JTAG