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cc26x0: Adjust ldscript memory segment attributes

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This commit is contained in:
Joakim Nohlgård 2018-05-06 07:48:43 +02:00
parent e3a27a74cc
commit 93e2527a64
1 changed files with 3 additions and 3 deletions
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4
cpu/cc26x0/ldscripts/cc26x0f128.ld
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@ -12,8 +12,8 @@
MEMORY MEMORY
{ {
rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00020000 - 88 /* technically, it's 128K */ rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00020000 - 88 /* technically, it's 128K */
gpram (rwx) : ORIGIN = 0x11000000, LENGTH = 8K /* configurable as cache. 20K here, 8K there, and 2K in the ld-script of cc26x0ware */ gpram : ORIGIN = 0x11000000, LENGTH = 8K /* configurable as cache. 20K here, 8K there, and 2K in the ld-script of cc26x0ware */
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K /* sram */ ram (w!rx) : ORIGIN = 0x20000000, LENGTH = 20K /* sram */
} }
INCLUDE cortexm_base.ld INCLUDE cortexm_base.ld