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drivers: doxygen cleanup

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This commit is contained in:
Alexandre Abadie 2017-08-29 18:00:46 +02:00
parent d512967fb6
commit 94c753c07a
171 changed files with 1375 additions and 1352 deletions
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2
drivers/adcxx1c/adcxx1c_saul.c
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_adcxx1c
* @ingroup drivers_adcxx1c
* @{
*
* @file

2
drivers/adcxx1c/include/adcxx1c_params.h
View File

@ -28,7 +28,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the ADCXX1C driver
* @name Set default configuration parameters for the ADCXX1C driver
* @{
*/
#ifndef ADCXX1C_PARAM_I2C

2
drivers/adxl345/include/adxl345_params.h
View File

@ -28,7 +28,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the ADXL345 driver
* @name Set default configuration parameters for the ADXL345 driver
* @{
*/
#ifndef ADXL345_PARAM_I2C

3
drivers/adxl345/include/adxl345_regs.h
View File

@ -23,7 +23,8 @@
extern "C" {
#endif
/** \name Register addresses
/**
* @name Register addresses
* @{
*/
#define ACCEL_ADXL345_CHIP_ID_REG (0x00) /**< Device ID */

1
drivers/at30tse75x/at30tse75x.c
View File

@ -7,6 +7,7 @@
*/
/**
* @ingroup drivers_at30tse75x
* @file
* @brief Driver for the AT30TSE75x temperature sensor with serial EEPROM
*

2
drivers/at86rf2xx/include/at86rf2xx_params.h
View File

@ -28,7 +28,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the AT86RF2xx driver
* @name Set default configuration parameters for the AT86RF2xx driver
* @{
*/
#ifndef AT86RF2XX_PARAM_SPI

40
drivers/at86rf2xx/include/at86rf2xx_registers.h
View File

@ -29,7 +29,7 @@ extern "C" {
#endif
/**
* @brief Constant part numbers of the AT86RF2xx device family
* @name Constant part numbers of the AT86RF2xx device family
* @{
*/
#define AT86RF212B_PARTNUM (0x07)
@ -39,7 +39,7 @@ extern "C" {
/** @} */
/**
* @brief Assign the part number for the device we are building the driver for
* @name Assign the part number for the device we are building the driver for
* @{
*/
#ifdef MODULE_AT86RF212B
@ -54,7 +54,7 @@ extern "C" {
/** @} */
/**
* @brief SPI access specifiers
* @name SPI access specifiers
* @{
*/
#define AT86RF2XX_ACCESS_REG (0x80)
@ -65,7 +65,7 @@ extern "C" {
/** @} */
/**
* @brief Register addresses
* @name Register addresses
* @{
*/
#define AT86RF2XX_REG__TRX_STATUS (0x01)
@ -119,7 +119,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the TRX_CTRL_0 register
* @name Bitfield definitions for the TRX_CTRL_0 register
* @{
*/
#define AT86RF2XX_TRX_CTRL_0_MASK__PAD_IO (0xC0)
@ -143,7 +143,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the TRX_CTRL_1 register
* @name Bitfield definitions for the TRX_CTRL_1 register
* @{
*/
#define AT86RF2XX_TRX_CTRL_1_MASK__PA_EXT_EN (0x80)
@ -156,7 +156,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the TRX_CTRL_2 register
* @name Bitfield definitions for the TRX_CTRL_2 register
* @{
*/
#define AT86RF2XX_TRX_CTRL_2_MASK__RX_SAFE_MODE (0x80)
@ -170,7 +170,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the IRQ_STATUS register
* @name Bitfield definitions for the IRQ_STATUS register
* @{
*/
#define AT86RF2XX_IRQ_STATUS_MASK__BAT_LOW (0x80)
@ -184,7 +184,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the TRX_STATUS register
* @name Bitfield definitions for the TRX_STATUS register
* @{
*/
#define AT86RF2XX_TRX_STATUS_MASK__CCA_DONE (0x80)
@ -209,7 +209,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the TRX_STATE register
* @name Bitfield definitions for the TRX_STATE register
* @{
*/
#define AT86RF2XX_TRX_STATE_MASK__TRAC (0xe0)
@ -232,7 +232,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the PHY_CCA register
* @name Bitfield definitions for the PHY_CCA register
* @{
*/
#define AT86RF2XX_PHY_CC_CCA_MASK__CCA_REQUEST (0x80)
@ -243,7 +243,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the CCA_THRES register
* @name Bitfield definitions for the CCA_THRES register
* @{
*/
#define AT86RF2XX_CCA_THRES_MASK__CCA_ED_THRES (0x0F)
@ -252,7 +252,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the PHY_TX_PWR register
* @name Bitfield definitions for the PHY_TX_PWR register
* @{
*/
#ifdef MODULE_AT86RF212B
@ -272,7 +272,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the PHY_RSSI register
* @name Bitfield definitions for the PHY_RSSI register
* @{
*/
#define AT86RF2XX_PHY_RSSI_MASK__RX_CRC_VALID (0x80)
@ -281,7 +281,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the XOSC_CTRL register
* @name Bitfield definitions for the XOSC_CTRL register
* @{
*/
#define AT86RF2XX_XOSC_CTRL__XTAL_MODE_CRYSTAL (0xF0)
@ -289,7 +289,7 @@ extern "C" {
/** @} */
/**
* @brief Timing values
* @name Timing values
* @{
*/
#define AT86RF2XX_TIMING__VCC_TO_P_ON (330)
@ -302,7 +302,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the XAH_CTRL_0 register
* @name Bitfield definitions for the XAH_CTRL_0 register
* @{
*/
#define AT86RF2XX_XAH_CTRL_0__MAX_FRAME_RETRIES (0xF0)
@ -311,7 +311,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the XAH_CTRL_1 register
* @name Bitfield definitions for the XAH_CTRL_1 register
* @{
*/
#define AT86RF2XX_XAH_CTRL_1__AACK_FLTR_RES_FT (0x20)
@ -321,7 +321,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the CSMA_SEED_1 register
* @name Bitfield definitions for the CSMA_SEED_1 register
* @{
*/
#define AT86RF2XX_CSMA_SEED_1__AACK_SET_PD (0x20)
@ -331,7 +331,7 @@ extern "C" {
/** @} */
/**
* @brief Bitfield definitions for the RF_CTRL_0 register
* @name Bitfield definitions for the RF_CTRL_0 register
* @{
*/
#ifdef MODULE_AT86RF212B

4
drivers/bh1750fvi/include/bh1750fvi_internal.h
View File

@ -34,7 +34,7 @@ extern "C" {
#define RES_DIV (78642)
/**
* @brief Opcodes
* @name Opcodes
* @{
*/
#define OP_POWER_DOWN (0x00)
@ -51,7 +51,7 @@ extern "C" {
/** @} */
/**
* @brief Measurement delays (in us)
* @name Measurement delays (in us)
* @{
*/
#define DELAY_HMODE (120000) /**< typ. 120ms in H-mode */

2
drivers/bh1750fvi/include/bh1750fvi_params.h
View File

@ -27,7 +27,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for BH1750FVI devices
* @name Set default configuration parameters for BH1750FVI devices
* @{
*/
#ifndef BH1750FVI_PARAM_I2C

2
drivers/bmp180/include/bmp180_params.h
View File

@ -31,7 +31,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the BMP180
* @name Set default configuration parameters for the BMP180
* @{
*/
#ifndef BMP180_PARAM_I2C_DEV

2
drivers/bmx280/bmx280_saul.c
View File

@ -8,7 +8,7 @@
*/
/**
* @ingroup driver_bmx280
* @ingroup drivers_bmx280
* @{
*
* @file

2
drivers/bmx280/include/bmx280_params.h
View File

@ -29,7 +29,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the BMX280
* @name Set default configuration parameters for the BMX280
* @{
*/
#ifndef BMX280_PARAM_I2C_DEV

2
drivers/cc110x/include/cc110x-defaultsettings.h
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_cc110x
* @ingroup drivers_cc110x
* @{
*
* @file

2
drivers/cc110x/include/cc110x-defines.h
View File

@ -203,5 +203,5 @@ extern "C" {
}
#endif
/** @} */
#endif /* CC110X_DEFINES_H */
/** @} */

2
drivers/cc110x/include/cc110x-interface.h
View File

@ -62,5 +62,5 @@ void cc110x_hook_off(void);
}
#endif
/** @} */
#endif /* CC110X_INTERFACE_H */
/** @} */

2
drivers/cc110x/include/cc110x-internal.h
View File

@ -206,5 +206,5 @@ typedef struct cc110x_statistic {
}
#endif
/** @} */
#endif /* CC110X_INTERNAL_H */
/** @} */

1
drivers/cc110x/include/cc110x-netdev.h
View File

@ -64,3 +64,4 @@ int netdev_cc110x_setup(netdev_cc110x_t *netdev_cc110x, const cc110x_params_t *p
#endif
#endif /* CC110X_NETDEV_H */
/** @} */

2
drivers/cc110x/include/cc110x-spi.h
View File

@ -112,5 +112,5 @@ void cc110x_cs(cc110x_t *dev);
}
#endif
/** @} */
#endif /* CC110X_SPI_H */
/** @} */

2
drivers/cc2420/include/cc2420_params.h
View File

@ -26,7 +26,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the CC2420 driver
* @name Set default configuration parameters for the CC2420 driver
* @{
*/
#ifndef CC2420_PARAM_SPI

35
drivers/cc2420/include/cc2420_registers.h
View File

@ -26,7 +26,7 @@ extern "C" {
#endif
/**
* @brief Internal device option flags
* @name Internal device option flags
* @{
*/
#define CC2420_OPT_AUTOACK (0x0001) /**< auto ACKs active */
@ -45,7 +45,7 @@ extern "C" {
/** @} */
/**
* @brief Possible device state change commands
* @name Possible device state change commands
* @{
*/
enum {
@ -57,7 +57,7 @@ enum {
};
/**
* @brief (Selected) device states
* @name (Selected) device states
*/
enum {
CC2420_STATE_PD = 0, /**< power down */
@ -68,7 +68,7 @@ enum {
};
/**
* @brief CC2420 SPI commands
* @name CC2420 SPI commands
* @{
*/
#define CC2420_REG_WRITE (0x00) /**< read register value */
@ -82,7 +82,7 @@ enum {
/**
* @brief CC2420 strobe commands
* @name CC2420 strobe commands
* @see Datasheet section 37, pages 61--62
* @{
*/
@ -104,7 +104,7 @@ enum {
/** @} */
/**
* @brief CC2420 configuration registers
* @name CC2420 configuration registers
* @see Datasheet section 37, pages 61 to 80
* @{
*/
@ -145,7 +145,7 @@ enum {
/** @} */
/**
* @brief CC2420 section address in RAM
* @name CC2420 section address in RAM
* @see Datasheet section 13.5 page 31.
* @{
*/
@ -165,7 +165,7 @@ enum {
/** @} */
/**
* @brief Status byte bit fields
* @name Status byte bit fields
* @see Datasheet section 13.3, page 29
* @{
*/
@ -178,7 +178,7 @@ enum {
/** @} */
/**
* @brief Modem control 0 register bitfields
* @name Modem control 0 register bitfields
* @{
*/
#define CC2420_MDMCTRL0_RES_FRM (0x2000
@ -191,21 +191,21 @@ enum {
/** @} */
/**
* @brief Transmit control register bitfields
* @name Transmit control register bitfields
* @{
*/
#define CC2420_TXCTRL_PA_MASK (0x001f)
/** @} */
/**
* @brief Receive control register 1 bitfields
* @name Receive control register 1 bitfields
* @{
*/
#define CC2420_RXCTRL1_RXBPF_LOCUR (0x2000)
/** @} */
/**
* @brief Frequency synthesizer control and status register bitfields
* @name Frequency synthesizer control and status register bitfields
* @{
*/
#define CC2420_FSCTRL_LOCK_THR_MASK (0xc000)
@ -217,21 +217,25 @@ enum {
/** @} */
/**
* @brief Security control register 0 bitfields
* @name Security control register 0 bitfields
* @{
*/
#define CC2420_SECCTRL0_RXFIFO_PROT (0x0200)
/** @} */
/**
* @brief Manufacturer ID low register value
* @name Manufacturer ID low register value
* @{
*/
#define CC2420_MANFIDL_VAL (0x233d)
/** @} */
/**
* @brief Manufacturer ID high register value
* @name Manufacturer ID high register value
* @{
*/
#define CC2420_MANFIDH_VAL (0x3000)
/** @} */
#ifdef __cplusplus
@ -239,3 +243,4 @@ enum {
#endif
#endif /* CC2420_REGISTERS_H */
/** @} */

2
drivers/dht/include/dht_params.h
View File

@ -28,7 +28,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the DHT devices
* @name Set default configuration parameters for the DHT devices
* @{
*/
#ifndef DHT_PARAM_PIN

1
drivers/ds1307/ds1307.c
View File

@ -7,6 +7,7 @@
*/
/**
* @ingroup drivers_ds1307
* @{
*
* @file

2
drivers/dsp0401/include/dsp0401_params.h
View File

@ -29,7 +29,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the DSP0401 (for Nucleo-F411)
* @name Set default configuration parameters for the DSP0401 (for Nucleo-F411)
* @{
*/
#ifndef DSP0401_PARAM_SDI_PIN

2
drivers/enc28j60/enc28j60.c
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_enc28j60
* @ingroup drivers_enc28j60
* @{
*
* @file

4
drivers/enc28j60/include/enc28j60_params.h
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_enc28j60
* @ingroup drivers_enc28j60
* @{
*
* @file
@ -26,7 +26,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the ENC28J60 driver
* @name Set default configuration parameters for the ENC28J60 driver
* @{
*/
#ifndef ENC28J60_PARAM_SPI

64
drivers/enc28j60/include/enc28j60_regs.h
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_enc28j60
* @ingroup drivers_enc28j60
* @{
*
* @file
@ -24,7 +24,7 @@ extern "C" {
#endif
/**
* @brief SPI instruction set
* @name SPI instruction set
* @{
*/
#define CMD_RCR 0x00 /* read control register */
@ -37,7 +37,7 @@ extern "C" {
/** @} */
/**
* @brief Available address pointers
* @name Available address pointers
* @{
*/
#define ADDR_READ_PTR 0x00 /**< Read pointer */
@ -51,7 +51,7 @@ extern "C" {
/** @} */
/**
* @brief Shared registers (accessible on each bank)
* @name Shared registers (accessible on each bank)
* @{
*/
#define REG_EIE 0x1b /**< interrupt enable */
@ -62,7 +62,7 @@ extern "C" {
/** @} */
/**
* @brief Register in bank 0 - Ethernet registers
* @name Register in bank 0 - Ethernet registers
* @{
*/
#define REG_B0_ERDPTL 0x00 /* read data pointer - low byte */
@ -92,7 +92,7 @@ extern "C" {
/** @} */
/**
* @brief Registers in bank 1 - Ethernet registers
* @name Registers in bank 1 - Ethernet registers
* @{
*/
#define REG_B1_EHT0 0x00 /* hash table - byte 0 */
@ -120,7 +120,7 @@ extern "C" {
/** @} */
/**
* @brief Registers in bank 2 - MAC registers
* @name Registers in bank 2 - MAC registers
* @{
*/
#define REG_B2_MACON1 0x00 /* MAC control register 1 */
@ -142,7 +142,7 @@ extern "C" {
/** @} */
/**
* @brief Registers in bank 3 - MIXED registers
* @name Registers in bank 3 - MIXED registers
* @{
*/
#define REG_B3_MAADR5 0x00 /* MAC address - byte 5 */
@ -164,7 +164,7 @@ extern "C" {
/** @} */
/**
* @brief PHY Registers
* @name PHY Registers
* @{
*/
#define REG_PHY_PHCON1 0x00
@ -179,7 +179,7 @@ extern "C" {
/** @} */
/**
* @brief EIE bitfields
* @name EIE bitfields
* @{
*/
#define EIE_INTIE 0x80
@ -192,7 +192,7 @@ extern "C" {
/** @} */
/**
* @brief EIR bitfields
* @name EIR bitfields
* @{
*/
#define EIR_PKTIF 0x40
@ -204,7 +204,7 @@ extern "C" {
/** @} */
/**
* @brief ESTAT bitfields
* @name ESTAT bitfields
* @{
*/
#define ESTAT_INT 0x80
@ -216,7 +216,7 @@ extern "C" {
/** @} */
/**
* @brief ECON1 bitfields
* @name ECON1 bitfields
* @{
*/
#define ECON1_TXRST 0x80
@ -231,7 +231,7 @@ extern "C" {
/** @} */
/**
* @brief ECON2 bitfields
* @name ECON2 bitfields
* @{
*/
#define ECON2_AUTOINC 0x80
@ -241,7 +241,7 @@ extern "C" {
/** @} */
/**
* @brief ERXFCON bitfields
* @name ERXFCON bitfields
* @{
*/
#define ERXFCON_UCEN 0x80
@ -255,7 +255,7 @@ extern "C" {
/** @} */
/**
* @brief MACON1 bitfields
* @name MACON1 bitfields
* @{
*/
#define MACON1_TXPAUS 0x08
@ -265,7 +265,7 @@ extern "C" {
/** @} */
/**
* @brief MACON3 bitfields
* @name MACON3 bitfields
* @{
*/
#define MACON3_PADCFG2 0x80
@ -279,7 +279,7 @@ extern "C" {
/** @} */
/**
* @brief MACON4 bitfields
* @name MACON4 bitfields
* @{
*/
#define MACON4_DEFER 0x40
@ -288,7 +288,7 @@ extern "C" {
/** @} */
/**
* @brief MABBIPG bitfields
* @name MABBIPG bitfields
* @{
*/
#define MABBIPG_FD 0x15
@ -296,14 +296,14 @@ extern "C" {
/** @} */
/**
* @brief MAIPGL bitfields
* @name MAIPGL bitfields
* @{
*/
#define MAIPGL_FD 0x12
/** @} */
/**
* @brief MICMD bitfields
* @name MICMD bitfields
* @{
*/
#define MICMD_MIISCAN 0x02
@ -311,7 +311,7 @@ extern "C" {
/** @} */
/**
* @brief MISTAT bitfields
* @name MISTAT bitfields
* @{
*/
#define MISTAT_NVALID 0x04
@ -320,7 +320,7 @@ extern "C" {
/** @} */
/**
* @brief EFLOCON bitfields
* @name EFLOCON bitfields
* @{
*/
#define EFLOCON_FULDPXS 0x04
@ -331,7 +331,7 @@ extern "C" {
/**
* @brief PHCON1 bitfields
* @name PHCON1 bitfields
* @{
*/
#define PHCON1_PRST 0x8000
@ -341,7 +341,7 @@ extern "C" {
/** @} */
/**
* @brief PHSTAT1 bitfields
* @name PHSTAT1 bitfields
* @{
*/
#define PHSTAT1_PFDPX 0x1000
@ -351,7 +351,7 @@ extern "C" {
/** @} */
/**
* @brief PHCON2 bitfields
* @name PHCON2 bitfields
* @{
*/
#define PHCON2_FRCLNK 0x4000
@ -361,7 +361,7 @@ extern "C" {
/** @} */
/**
* @brief PHSTAT2 bitfields
* @name PHSTAT2 bitfields
* @{
*/
#define PHSTAT2_TXSTAT 0x2000
@ -373,7 +373,7 @@ extern "C" {
/** @} */
/**
* @brief PHIE bitfields
* @name PHIE bitfields
* @{
*/
#define PHIE_PLNKIE 0x0010
@ -381,7 +381,7 @@ extern "C" {
/** @} */
/**
* @brief PHIR bitfields
* @name PHIR bitfields
* @{
*/
#define PHIR_PLNKIF 0x0010
@ -389,7 +389,7 @@ extern "C" {
/** @} */
/**
* @brief PHLCON bitfields
* @name PHLCON bitfields
* @{
*/
#define PHLCON_LACFG(x) ((x & 0xf) << 8)
@ -399,7 +399,7 @@ extern "C" {
/** @} */
/**
* @brief Frame status bitfields
* @name Frame status bitfields
* @{
*/
#define FRAME_4_RECV_OK 0x80
@ -419,7 +419,7 @@ extern "C" {
/** @} */
/**
* @brief TX control byte bitfields
* @name TX control byte bitfields
* @{
*/
#define TX_PHUGEEN 0x08

2
drivers/encx24j600/encx24j600.c
View File

@ -8,7 +8,7 @@
*/
/**
* @ingroup driver_encx24j600
* @ingroup drivers_encx24j600
* @{
*
* @file

2
drivers/encx24j600/include/encx24j600_defines.h
View File

@ -8,7 +8,7 @@
*/
/**
* @ingroup driver_encx24j600
* @ingroup drivers_encx24j600
* @{
*
* @file

2
drivers/encx24j600/include/encx24j600_internal.h
View File

@ -8,7 +8,7 @@
*/
/**
* @ingroup driver_encx24j600
* @ingroup drivers_encx24j600
* @{
*
* @file

2
drivers/ethos/ethos.c
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_ethos
* @ingroup drivers_ethos
* @{
*
* @file

12
drivers/hd44780/include/hd44780_internal.h
View File

@ -24,7 +24,7 @@ extern "C" {
#endif
/**
* @brief HD44780 LCD commands
* @name HD44780 LCD commands
* @{
*/
#define HD44780_CLEARDISPLAY (0x01)
@ -38,7 +38,7 @@ extern "C" {
/** @} */
/**
* @brief HD44780 LCD entry modes flags
* @name HD44780 LCD entry modes flags
* @{
*/
#define HD44780_ENTRYRIGHT (0x00)
@ -48,7 +48,7 @@ extern "C" {
/** @} */
/**
* @brief HD44780 LCD control flags
* @name HD44780 LCD control flags
* @{
*/
#define HD44780_DISPLAYON (0x04)
@ -60,7 +60,7 @@ extern "C" {
/** @} */
/**
* @brief HD44780 display and cursor shift flags
* @name HD44780 display and cursor shift flags
* @{
*/
#define HD44780_DISPLAYMOVE (0x08)
@ -70,7 +70,7 @@ extern "C" {
/**@}*/
/**
* @brief HD44780 LCD functional flags
* @name HD44780 LCD functional flags
* @{
*/
#define HD44780_8BITMODE (0x10)
@ -82,7 +82,7 @@ extern "C" {
/** @} */
/**
* @brief HD44780 LCD timings
* @name HD44780 LCD timings
* @{
*/
#define HD44780_CMD_WAIT (2000U)

2
drivers/hdc1000/hdc1000_saul.c
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_hdc1000
* @ingroup drivers_hdc1000
* @{
*
* @file

2
drivers/hdc1000/include/hdc1000_params.h
View File

@ -28,7 +28,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the HDC1000 driver
* @name Set default configuration parameters for the HDC1000 driver
* @{
*/
#ifndef HDC1000_PARAM_I2C

6
drivers/hdc1000/include/hdc1000_regs.h
View File

@ -27,7 +27,7 @@ extern "C"
#endif
/**
* @brief Manufacturer and Device IDs
* @name Manufacturer and Device IDs
* @{
*/
#define HDC1000_MID_VALUE 0x5449
@ -35,7 +35,7 @@ extern "C"
/** @} */
/**
* @brief Register Map
* @name Register Map
* @{
*/
#define HDC1000_TEMPERATURE (0x00)
@ -49,7 +49,7 @@ extern "C"
/** @} */
/**
* @brief Configuration register bitmap
* @name Configuration register bitmap
* @{
*/
#define HDC1000_RST (1 << 15)

2
drivers/hih6130/hih6130.c
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_hih6130
* @ingroup drivers_hih6130
* @{
*
* @file

2
drivers/ina220/ina220.c
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_ina220
* @ingroup drivers_ina220
* @{
*
* @file

2
drivers/ina220/include/ina220-regs.h
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_ina220
* @ingroup drivers_ina220
* @{
*
* @file

4
drivers/include/adcxx1c.h
View File

@ -30,8 +30,10 @@ extern "C" {
#include "periph/i2c.h"
#include "periph/gpio.h"
/**
* @brief ADCxx1C default address (ADCxx1C021 address)
*/
#ifndef ADCXX1C_I2C_ADDRESS
/** ADCxx1C default address (ADCxx1C021 address) */
#define ADCXX1C_I2C_ADDRESS (0x54)
#endif

22
drivers/include/adt7310.h
View File

@ -71,8 +71,10 @@ typedef struct {
bool high_res; /**< Sensor resolution, true if configured to 16 bit resolution */
} adt7310_t;
/** @name ADT7310 configuration bits */
/** @{ */
/**
* @name ADT7310 configuration bits
* @{
*/
#define ADT7310_CONF_FAULT_QUEUE_MASK (0x03)
#define ADT7310_CONF_FAULT_QUEUE_SHIFT (0)
#define ADT7310_CONF_FAULT_QUEUE(x) (((x) << ADT7310_CONF_FAULT_QUEUE_SHIFT) & ADT7310_CONF_FAULT_QUEUE_MASK)
@ -92,13 +94,21 @@ typedef struct {
#define ADT7310_CONF_RESOLUTION_SHIFT (7)
#define ADT7310_CONF_RESOLUTION(x) (((x) << ADT7310_CONF_RESOLUTION_SHIFT) & ADT7310_CONF_RESOLUTION_MASK)
/** @brief Continuous operation mode */
/**
* @brief Continuous operation mode
*/
#define ADT7310_MODE_CONTINUOUS (ADT7310_CONF_OPERATION_MODE(0))
/** @brief One shot */
/**
* @brief One shot
*/
#define ADT7310_MODE_ONE_SHOT (ADT7310_CONF_OPERATION_MODE(1))
/** @brief 1 sample per second */
/**
* @brief 1 sample per second
*/
#define ADT7310_MODE_1SPS (ADT7310_CONF_OPERATION_MODE(2))
/** @brief Shut down (powersave) */
/**
* @brief Shut down (powersave)
*/
#define ADT7310_MODE_SHUTDOWN (ADT7310_CONF_OPERATION_MODE(3))
/** @} */

1
drivers/include/adxl345.h
View File

@ -87,6 +87,7 @@ enum {
STREAM = 2, /**< FIFO stream mode */
TRIGGER = 3 /**< FIFO trigger mode */
};
/**
* @brief Output Interrupt selection
*/

20
drivers/include/at30tse75x.h
View File

@ -102,18 +102,18 @@ extern "C" {
/**
* @name AT30TSE75x configuration types
*
* @brief Temperature resolution
*
* @{
*/
/**
* @brief Temperature resolution
*/
typedef enum {
AT30TSE75X_RESOLUTION_9BIT = 0,
AT30TSE75X_RESOLUTION_10BIT = 1,
AT30TSE75X_RESOLUTION_11BIT = 2,
AT30TSE75X_RESOLUTION_12BIT = 3
} at30tse75x_resolution_t;
/** @} */
/**
* @brief Operation mode
@ -122,18 +122,15 @@ typedef enum {
* is effectively shutdown and only wakes up to perform a single measurement.
* When in comparator or interrupt mode, the device samples contiously the
* temperature and sets the ALERT pin according to the chosen mode.
* @{
*/
typedef enum {
AT30TSE75X_MODE_COMPARATOR,
AT30TSE75X_MODE_INTERRUPT,
AT30TSE75X_MODE_ONE_SHOT
} at30tse75x_mode_t;
/** @} */
/**
* @brief After how many limit exceeding measurements the ALERT pin is set
* @{
*/
typedef enum {
AT30TSE75X_ALARM_AFTER_1 = 0,
@ -141,27 +138,24 @@ typedef enum {
AT30TSE75X_ALARM_AFTER_4 = 2,
AT30TSE75X_ALARM_AFTER_6 = 3
} at30tse75x_fault_tolerance_t;
/** @} */
/**
* @brief Polarity of the ALERT pin
* @{
*/
typedef enum {
AT30TSE75X_ALARM_ACTIVE_LOW,
AT30TSE75X_ALARM_ACTIVE_HIGH
} at30tse75x_alarm_polatity_t;
/** @} */
/** @} */ /* AT30TSE75x configuration types */
/**
* @brief Device descriptor for a AT30TSE75x device
* @{
*/
typedef struct {
i2c_t i2c; /**< I2C device that sensor is connected to */
uint8_t addr; /**< I2C address of this particular sensor */
} at30tse75x_t;
/** @} */
/**
* @brief Initialize a AT30TSE75x device
@ -308,5 +302,5 @@ int at30tse75x_get_temperature(const at30tse75x_t* dev, float* temperature);
}
#endif
/** @} */
#endif /* AT30TSE75X_H */
/** @} */

12
drivers/include/at86rf2xx.h
View File

@ -49,7 +49,7 @@ extern "C" {
#define AT86RF2XX_MAX_PKT_LENGTH (IEEE802154_FRAME_LEN_MAX)
/**
* @brief Channel configuration
* @name Channel configuration
* @{
*/
#ifdef MODULE_AT86RF212B
@ -92,7 +92,7 @@ extern "C" {
#endif
/**
* @brief Flags for device internal states (see datasheet)
* @name Flags for device internal states (see datasheet)
* @{
*/
#define AT86RF2XX_STATE_P_ON (0x00) /**< initial power on */
@ -108,7 +108,7 @@ extern "C" {
/** @} */
/**
* @brief Internal device option flags
* @name Internal device option flags
*
* `0x00ff` is reserved for general IEEE 802.15.4 flags
* (see @ref netdev_ieee802154_t)
@ -152,10 +152,7 @@ typedef struct at86rf2xx_params {
*/
typedef struct {
netdev_ieee802154_t netdev; /**< netdev parent struct */
/**
* @brief device specific fields
* @{
*/
/* device specific fields */
at86rf2xx_params_t params; /**< parameters for initialization */
uint8_t state; /**< current state of the radio */
uint8_t tx_frame_len; /**< length of the current TX frame */
@ -167,7 +164,6 @@ typedef struct {
uint8_t pending_tx; /**< keep track of pending TX calls
this is required to know when to
return to @ref at86rf2xx_t::idle_state */
/** @} */
} at86rf2xx_t;
/**

3
drivers/include/bh1750fvi.h
View File

@ -28,7 +28,7 @@ extern "C" {
#endif
/**
* @brief Possible I2C bus addresses of the device
* @name Possible I2C bus addresses of the device
*
* The actual address of the device depends on the state of the ADDR pin.
* @{
@ -37,7 +37,6 @@ extern "C" {
#define BH1750FVI_ADDR_PIN_HIGH (0x23) /**< ADDR pin := 1 */
/** @} */
/**
* @brief Default address of BH1750FVI sensors
*/

4
drivers/include/bmp180.h
View File

@ -29,8 +29,7 @@ extern "C" {
#endif
/**
* @name Oversampling modes
* @{
* @brief Oversampling modes
*/
typedef enum {
BMP180_ULTRALOWPOWER = 0,
@ -38,7 +37,6 @@ typedef enum {
BMP180_HIGHRES,
BMP180_ULTRAHIGHRES
} bmp180_oversampling_mode_t;
/** @} */
/**
* @brief Calibration struct for the BMP180 sensor

2
drivers/include/cc110x.h
View File

@ -41,7 +41,7 @@ typedef struct cc110x_params {
} cc110x_params_t;
/**
* @brief forward declaration
* @brief Forward declaration
*/
typedef struct cc110x cc110x_t;

8
drivers/include/cc2420.h
View File

@ -44,7 +44,7 @@ extern "C" {
#define CC2420_PANID_DEFAULT (IEEE802154_DEFAULT_PANID)
/**
* @brief Channel configuration
* @name Channel configuration
* @{
*/
#define CC2420_CHAN_MIN (IEEE802154_CHANNEL_MIN)
@ -53,7 +53,7 @@ extern "C" {
/** @} */
/**
* @brief Default TX power configuration [in dBm]
* @name Default TX power configuration [in dBm]
* @{
*/
#define CC2420_TXPOWER_MIN (-25)
@ -70,7 +70,6 @@ enum {
/**
* @brief Struct holding all parameters needed for device initialization
* @{
*/
typedef struct cc2420_params {
spi_t spi; /**< SPI bus the device is connected to */
@ -83,11 +82,9 @@ typedef struct cc2420_params {
gpio_t pin_vrefen; /**< pin connected to the Vref enable pin */
gpio_t pin_reset; /**< pin connected to the reset pin */
} cc2420_params_t;
/** @} */
/**
* @brief Device descriptor for CC2420 radio devices
* @{
*/
typedef struct {
/* netdev fields */
@ -98,7 +95,6 @@ typedef struct {
uint8_t state; /**< current state of the radio */
uint16_t options; /**< state of used options */
} cc2420_t;
/** @} */
/**
* @brief Setup the device descriptor for the given device

12
drivers/include/dht.h
View File

@ -37,7 +37,7 @@ extern "C" {
#endif
/**
* @brief possible return codes
* @brief Possible return codes
*/
enum {
DHT_OK = 0, /**< all good */
@ -46,7 +46,7 @@ enum {
};
/**
* @brief data type for storing DHT sensor readings
* @brief Data type for storing DHT sensor readings
*/
typedef struct {
uint16_t humidity; /**< relative deca-humidity */
@ -54,7 +54,7 @@ typedef struct {
} dht_data_t;
/**
* @brief device type of the DHT device
* @brief Device type of the DHT device
*/
typedef enum {
DHT11, /**< DHT11 device identifier */
@ -63,7 +63,7 @@ typedef enum {
} dht_type_t;
/**
* @brief device descriptor for DHT sensor devices
* @brief Device descriptor for DHT sensor devices
*/
typedef struct {
gpio_t pin; /**< GPIO pin of the device's data pin */
@ -73,12 +73,12 @@ typedef struct {
} dht_t;
/**
* @brief configuration parameters for DHT devices
* @brief Configuration parameters for DHT devices
*/
typedef dht_t dht_params_t;
/**
* @brief initialize a new DHT device
* @brief Initialize a new DHT device
*
* @param[out] dev device descriptor of a DHT device
* @param[in] params configuration parameters

6
drivers/include/diskio.h
View File

@ -59,15 +59,13 @@ typedef enum {
} diskio_result_t;
/**
* @name Disk Status Bits
* @{
* @brief Disk Status Bits
*/
typedef enum {
DISKIO_STA_NOINIT = 0x01, /**< Drive not initialized */
DISKIO_STA_NODISK = 0x02, /**< No medium in the drive */
DISKIO_STA_PROTECT = 0x04 /**< Write protected */
} diskio_sta_t;
/** @} */
/**
* @name Command code for disk_ioctrl fucntion
@ -162,5 +160,5 @@ diskio_result_t mci_ioctl(unsigned char ctrl, void *buff);
}
#endif
/** @} */
#endif /* DISKIO_H */
/** @} */

4
drivers/include/dsp0401.h
View File

@ -31,8 +31,7 @@ extern "C" {
#endif
/**
* @name Return codes
* @{
* @brief Return codes
*/
enum {
DSP0401_OK = 0, /**< All ok */
@ -41,7 +40,6 @@ enum {
DSP0401_ERR_LAT_GPIO, /**< Something went wrong with LAT GPIO */
DSP0401_ERR_PWM, /**< Something went wrong with PWM */
};
/** @} */
/**
* @brief Device initialization parameters

2
drivers/include/dynamixel.h
View File

@ -9,8 +9,8 @@
/**
* @defgroup drivers_dynamixel Dynamixel driver
* @ingroup drivers_actuators
* @brief Drivers for any device using dynamixel's servomotors communication bus
*
* This module contains drivers for any device using dynamixel's servomotors communication bus.
* The bus is mainly used for servomotors, but a device can be anything : sensors, other actuators.
*
* @{

4
drivers/include/ethos.h
View File

@ -55,7 +55,7 @@ extern "C" {
/** @} */
/**
* @brief enum describing line state
* @brief Enum describing line state
*/
typedef enum {
WAIT_FRAMESTART,
@ -105,7 +105,7 @@ typedef struct {
void ethos_setup(ethos_t *dev, const ethos_params_t *params);
/**
* @brief send frame over serial port using ethos' framing
* @brief Send frame over serial port using ethos' framing
*
* This is used by e.g., stdio over ethos to send text frames.
*

2
drivers/include/feetech.h
View File

@ -9,8 +9,8 @@
/**
* @defgroup drivers_feetech Feetech driver
* @ingroup drivers_actuators
* @brief Drivers for any device using feetech's servomotors communication bus.
*
* This module contains drivers for any device using feetech's servomotors communication bus.
* The bus is mainly used for servomotors, but a device can be anything : sensors, other actuators.
*
* @{

6
drivers/include/hd44780.h
View File

@ -162,21 +162,21 @@ void hd44780_scroll_left(const hd44780_t *dev);
void hd44780_scroll_right(const hd44780_t *dev);
/**
* @brief set display direction left to right
* @brief Set display direction left to right
*
* @param[in] dev device descriptor of LCD
*/
void hd44780_left2right(hd44780_t *dev);
/**
* @brief set display direction right to left
* @brief Set display direction right to left
*
* @param[in] dev device descriptor of LCD
*/
void hd44780_right2left(hd44780_t *dev);
/**
* @brief display autoscroll on or off
* @brief Display autoscroll on or off
*
* @param[in] dev device descriptor of LCD
* @param[in] state scroll on or off

12
drivers/include/ina220.h
View File

@ -40,7 +40,9 @@ typedef struct {
uint8_t addr; /**< the slave address of the sensor on the I2C bus */
} ina220_t;
/** @brief INA220 possible mode settings */
/**
* @brief INA220 possible mode settings
*/
typedef enum ina220_mode {
INA220_MODE_POWERDOWN = 0x0000, /**< Power down */
INA220_MODE_TRIGGER_SHUNT_ONLY = 0x0001, /**< Shunt Voltage, Triggered */
@ -52,7 +54,9 @@ typedef enum ina220_mode {
INA220_MODE_CONTINUOUS_SHUNT_BUS = 0x0007, /**< Shunt and Bus, Continuous, default */
} ina220_mode_t;
/** @brief Shunt voltage measurement range (PGA settings) */
/**
* @brief Shunt voltage measurement range (PGA settings)
*/
typedef enum ina220_range {
INA220_RANGE_40MV = 0x0000, /**< +/- 40 mV range */
INA220_RANGE_80MV = 0x0800, /**< +/- 80 mV range */
@ -60,7 +64,9 @@ typedef enum ina220_range {
INA220_RANGE_320MV = 0x1800, /**< +/- 320 mV range, default */
} ina220_range_t;
/** @brief Bus voltage measurement range */
/**
* @brief Bus voltage measurement range
*/
typedef enum ina220_brng {
INA220_BRNG_16V_FSR = 0x0000, /**< 16 V bus voltage full scale range */
INA220_BRNG_32V_FSR = 0x0200, /**< 32 V bus voltage full scale range, default. */

20
drivers/include/isl29125.h
View File

@ -59,7 +59,7 @@ extern "C" {
#endif
/**
* @brief data type for storing lux RGB sensor readings
* @brief Data type for storing lux RGB sensor readings
*/
typedef struct {
float red; /**< red lux value */
@ -68,7 +68,7 @@ typedef struct {
} isl29125_rgb_t;
/**
* @brief supported operation modes of the ISL29125 sensor's AD
* @brief Supported operation modes of the ISL29125 sensor's AD
* conversion
*/
typedef enum {
@ -83,7 +83,7 @@ typedef enum {
} isl29125_mode_t;
/**
* @brief supported RGB sensing range values of the ISL29125 sensor
* @brief Supported RGB sensing range values of the ISL29125 sensor
*/
typedef enum {
ISL29125_RANGE_375 = 0x00, /**< range: 5.7m - 375 lux */
@ -91,7 +91,7 @@ typedef enum {
} isl29125_range_t;
/**
* @brief supported color resolutions of the ISL29125 sensor's AD
* @brief Supported color resolutions of the ISL29125 sensor's AD
* conversion
*/
typedef enum {
@ -138,7 +138,7 @@ typedef enum {
} isl29125_interrupt_conven_t;
/**
* @brief initialize a new ISL29125 device
* @brief Initialize a new ISL29125 device
*
* @param[in] dev device descriptor of an ISL29125 device
* @param[in] i2c I2C device the sensor is connected to
@ -155,7 +155,7 @@ int isl29125_init(isl29125_t *dev, i2c_t i2c, gpio_t gpio,
isl29125_resolution_t resolution);
/**
* @brief initialize interrupts
* @brief Initialize interrupts
*
* @param[in] dev device descriptor of an ISL29125 device
* @param[in] interrupt_status Interrupt status
@ -176,7 +176,7 @@ int isl29125_init_int(isl29125_t *dev, isl29125_interrupt_status_t interrupt_sta
gpio_cb_t cb, void *arg);
/**
* @brief read RGB values from device
* @brief Read RGB values from device
*
* @param[in] dev device descriptor of an ISL29125 device
* @param[in] dest pointer to lux RGB color object data is written to
@ -184,7 +184,7 @@ int isl29125_init_int(isl29125_t *dev, isl29125_interrupt_status_t interrupt_sta
void isl29125_read_rgb_lux(const isl29125_t *dev, isl29125_rgb_t *dest);
/**
* @brief read color values from device
* @brief Read color values from device
*
* @param[in] dev device descriptor of an ISL29125 device
* @param[in] dest pointer to RGB color object data is written to
@ -192,7 +192,7 @@ void isl29125_read_rgb_lux(const isl29125_t *dev, isl29125_rgb_t *dest);
void isl29125_read_rgb_color(const isl29125_t *dev, color_rgb_t *dest);
/**
* @brief set the device's operation mode
* @brief Set the device's operation mode
*
* @param[in] dev device descriptor of an ISL29125 device
* @param[in] mode operation mode
@ -200,7 +200,7 @@ void isl29125_read_rgb_color(const isl29125_t *dev, color_rgb_t *dest);
void isl29125_set_mode(const isl29125_t *dev, isl29125_mode_t mode);
/**
* @brief read isl29125 interrupt status
* @brief Read isl29125 interrupt status
*
* @param[in] dev device descriptor of an ISL29125 device
*

4
drivers/include/jc42.h
View File

@ -67,7 +67,7 @@ typedef struct {
} jc42_params_t;
/**
* @brief export SAUL endpoint
* @brief Export SAUL endpoint
*/
extern const saul_driver_t jc42_temperature_saul_driver;
@ -121,5 +121,5 @@ int jc42_get_temperature(const jc42_t* dev, int16_t* temperature);
}
#endif
/** @} */
#endif /* JC42_H */
/** @} */

6
drivers/include/kw2xrf.h
View File

@ -47,7 +47,7 @@ extern "C" {
#define KW2XRF_DEFAULT_PANID (IEEE802154_DEFAULT_PANID)
/**
* @brief Default channel used after initialization
* @name Default channel used after initialization
*
* @{
*/
@ -57,7 +57,7 @@ extern "C" {
/** @} */
/**
* @brief Allowed range of channels
* @name Allowed range of channels
*
* @{
*/
@ -109,7 +109,7 @@ extern "C" {
/** @} */
/**
* @brief struct holding all params needed for device initialization
* @brief Struct holding all params needed for device initialization
*/
typedef struct kw2xrf_params {
spi_t spi; /**< SPI bus the device is connected to */

58
drivers/include/led.h
View File

@ -39,65 +39,65 @@ extern "C" {
#endif
/**
* @brief LED fallback macros
* @name LED fallback macros
* @{
*/
#ifndef LED0_ON
#define LED0_ON /* defined empty */
#define LED0_OFF /* defined empty */
#define LED0_TOGGLE /* defined empty */
#define LED0_ON /**< defined empty */
#define LED0_OFF /**< defined empty */
#define LED0_TOGGLE /**< defined empty */
#endif
#ifndef LED1_ON
#define LED1_ON /* defined empty */
#define LED1_OFF /* defined empty */
#define LED1_TOGGLE /* defined empty */
#define LED1_ON /**< defined empty */
#define LED1_OFF /**< defined empty */
#define LED1_TOGGLE /**< defined empty */
#endif
#ifndef LED2_ON
#define LED2_ON /* defined empty */
#define LED2_OFF /* defined empty */
#define LED2_TOGGLE /* defined empty */
#define LED2_ON /**< defined empty */
#define LED2_OFF /**< defined empty */
#define LED2_TOGGLE /**< defined empty */
#endif
#ifndef LED3_ON
#define LED3_ON /* defined empty */
#define LED3_OFF /* defined empty */
#define LED3_TOGGLE /* defined empty */
#define LED3_ON /**< defined empty */
#define LED3_OFF /**< defined empty */
#define LED3_TOGGLE /**< defined empty */
#endif
#ifndef LED4_ON
#define LED4_ON /* defined empty */
#define LED4_OFF /* defined empty */
#define LED4_TOGGLE /* defined empty */
#define LED4_ON /**< defined empty */
#define LED4_OFF /**< defined empty */
#define LED4_TOGGLE /**< defined empty */
#endif
#ifndef LED5_ON
#define LED5_ON /* defined empty */
#define LED5_OFF /* defined empty */
#define LED5_TOGGLE /* defined empty */
#define LED5_ON /**< defined empty */
#define LED5_OFF /**< defined empty */
#define LED5_TOGGLE /**< defined empty */
#endif
#ifndef LED6_ON
#define LED6_ON /* defined empty */
#define LED6_OFF /* defined empty */
#define LED6_TOGGLE /* defined empty */
#define LED6_ON /**< defined empty */
#define LED6_OFF /**< defined empty */
#define LED6_TOGGLE /**< defined empty */
#endif
#ifndef LED7_ON
#define LED7_ON /* defined empty */
#define LED7_OFF /* defined empty */
#define LED7_TOGGLE /* defined empty */
#define LED7_ON /**< defined empty */
#define LED7_OFF /**< defined empty */
#define LED7_TOGGLE /**< defined empty */
#endif
/** @} */
/**
* @brief Convenience LED control macros
* @name Convenience LED control macros
* @{
*/
#define LED_ON(x) LED ## x ##_ON
#define LED_OFF(x) LED ## x ## _OFF
#define LED_TOGGLE(x) LED ## x ##_TOGGLE
#define LED_ON(x) LED ## x ##_ON /**< Turn on led x */
#define LED_OFF(x) LED ## x ## _OFF /**< Turn off led x */
#define LED_TOGGLE(x) LED ## x ##_TOGGLE /**< Toggle led x */
/** @} */
#ifdef __cplusplus

462
drivers/include/lis3dh.h
View File

@ -32,52 +32,54 @@ extern "C" {
#endif
/**
* @brief Identifier register value
*
* The WHO_AM_I register should contain this value in order to correctly
* identify the chip.
*/
#define LIS3DH_WHO_AM_I_RESPONSE (0b00110011)
#define LIS3DH_WHO_AM_I_RESPONSE (0x33)
/**
* @brief LIS3DH hardware register addresses
* @name LIS3DH hardware register addresses
* @{
*/
typedef enum {
LIS3DH_REG_STATUS_AUX = 0x07,
LIS3DH_REG_OUT_AUX_ADC1_L = 0x08,
LIS3DH_REG_OUT_AUX_ADC1_H = 0x09,
LIS3DH_REG_OUT_AUX_ADC2_L = 0x0A,
LIS3DH_REG_OUT_AUX_ADC2_H = 0x0B,
LIS3DH_REG_OUT_AUX_ADC3_L = 0x0C,
LIS3DH_REG_OUT_AUX_ADC3_H = 0x0D,
LIS3DH_REG_INT_COUNTER_REG = 0x0E,
LIS3DH_REG_WHO_AM_I = 0x0F,
LIS3DH_REG_TEMP_CFG_REG = 0x1F,
LIS3DH_REG_CTRL_REG1 = 0x20,
LIS3DH_REG_CTRL_REG2 = 0x21,
LIS3DH_REG_CTRL_REG3 = 0x22,
LIS3DH_REG_CTRL_REG4 = 0x23,
LIS3DH_REG_CTRL_REG5 = 0x24,
LIS3DH_REG_CTRL_REG6 = 0x25,
LIS3DH_REG_REFERENCE = 0x26,
LIS3DH_REG_STATUS_REG = 0x27,
LIS3DH_REG_OUT_X_L = 0x28,
LIS3DH_REG_OUT_X_H = 0x29,
LIS3DH_REG_OUT_Y_L = 0x2A,
LIS3DH_REG_OUT_Y_H = 0x2B,
LIS3DH_REG_OUT_Z_L = 0x2C,
LIS3DH_REG_OUT_Z_H = 0x2D,
LIS3DH_REG_FIFO_CTRL_REG = 0x2E,
LIS3DH_REG_FIFO_SRC_REG = 0x2F,
LIS3DH_REG_INT1_CFG = 0x30,
LIS3DH_REG_INT1_SOURCE = 0x31,
LIS3DH_REG_INT1_THS = 0x32,
LIS3DH_REG_INT1_DURATION = 0x33,
LIS3DH_REG_CLICK_CFG = 0x38,
LIS3DH_REG_CLICK_SRC = 0x39,
LIS3DH_REG_CLICK_THS = 0x3A,
LIS3DH_REG_TIME_LIMIT = 0x3B,
LIS3DH_REG_TIME_LATENCY = 0x3C,
LIS3DH_REG_TIME_WINDOW = 0x3D,
} lis3dh_reg_t;
#define LIS3DH_REG_STATUS_AUX (0x07)
#define LIS3DH_REG_OUT_AUX_ADC1_L (0x08)
#define LIS3DH_REG_OUT_AUX_ADC1_H (0x09)
#define LIS3DH_REG_OUT_AUX_ADC2_L (0x0A)
#define LIS3DH_REG_OUT_AUX_ADC2_H (0x0B)
#define LIS3DH_REG_OUT_AUX_ADC3_L (0x0C)
#define LIS3DH_REG_OUT_AUX_ADC3_H (0x0D)
#define LIS3DH_REG_INT_COUNTER_REG (0x0E)
#define LIS3DH_REG_WHO_AM_I (0x0F)
#define LIS3DH_REG_TEMP_CFG_REG (0x1F)
#define LIS3DH_REG_CTRL_REG1 (0x20)
#define LIS3DH_REG_CTRL_REG2 (0x21)
#define LIS3DH_REG_CTRL_REG3 (0x22)
#define LIS3DH_REG_CTRL_REG4 (0x23)
#define LIS3DH_REG_CTRL_REG5 (0x24)
#define LIS3DH_REG_CTRL_REG6 (0x25)
#define LIS3DH_REG_REFERENCE (0x26)
#define LIS3DH_REG_STATUS_REG (0x27)
#define LIS3DH_REG_OUT_X_L (0x28)
#define LIS3DH_REG_OUT_X_H (0x29)
#define LIS3DH_REG_OUT_Y_L (0x2A)
#define LIS3DH_REG_OUT_Y_H (0x2B)
#define LIS3DH_REG_OUT_Z_L (0x2C)
#define LIS3DH_REG_OUT_Z_H (0x2D)
#define LIS3DH_REG_FIFO_CTRL_REG (0x2E)
#define LIS3DH_REG_FIFO_SRC_REG (0x2F)
#define LIS3DH_REG_INT1_CFG (0x30)
#define LIS3DH_REG_INT1_SOURCE (0x31)
#define LIS3DH_REG_INT1_THS (0x32)
#define LIS3DH_REG_INT1_DURATION (0x33)
#define LIS3DH_REG_CLICK_CFG (0x38)
#define LIS3DH_REG_CLICK_SRC (0x39)
#define LIS3DH_REG_CLICK_THS (0x3A)
#define LIS3DH_REG_TIME_LIMIT (0x3B)
#define LIS3DH_REG_TIME_LATENCY (0x3C)
#define LIS3DH_REG_TIME_WINDOW (0x3D)
/** @} */
/*
* Bit offsets within the individual registers
@ -86,10 +88,8 @@ typedef enum {
/**
* @name TEMP_CFG_REG bitfield macros
* @{
*/
/** @{ */
/**
* @brief ADC enable
*
@ -98,7 +98,6 @@ typedef enum {
* 0: ADC disabled; 1: ADC enabled
*/
#define LIS3DH_TEMP_CFG_REG_ADC_PD_MASK (1 << 7)
/**
* @brief Temperature sensor (T) enable.
*
@ -107,16 +106,34 @@ typedef enum {
* 0: T disabled; 1: T enabled
*/
#define LIS3DH_TEMP_CFG_REG_TEMP_EN_MASK (1 << 6)
/** @} */
/** @} */ /* TEMP_CFG_REG bitfield macros */
/**
* @name CTRL_REG1 bitfield macros
* @{
*/
/** @{ */
/**
* @name Output data rate selection bitfield macros
* @brief ODR global shift
*/
#define LIS3DH_CTRL_REG1_ODR_SHIFT (4)
/**
* @brief ODR fourth bit mask
*/
#define LIS3DH_CTRL_REG1_ODR3_MASK (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 3))
/**
* @brief ODR third bit mask
*/
#define LIS3DH_CTRL_REG1_ODR2_MASK (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 2))
/**
* @brief ODR second bit mask
*/
#define LIS3DH_CTRL_REG1_ODR1_MASK (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 1))
/**
* @brief ODR first bit mask
*/
#define LIS3DH_CTRL_REG1_ODR0_MASK (1 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/**
* @brief Output data rate (ODR) selection bitfield
*
* Default value: 0000
*
@ -124,20 +141,10 @@ typedef enum {
*
* @see LIS3DH data sheet Table 25, “Data rate configuration”
*/
/** @{ */
#define LIS3DH_CTRL_REG1_ODR_SHIFT (4)
#define LIS3DH_CTRL_REG1_ODR3_MASK (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 3))
#define LIS3DH_CTRL_REG1_ODR2_MASK (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 2))
#define LIS3DH_CTRL_REG1_ODR1_MASK (1 << (LIS3DH_CTRL_REG1_ODR_SHIFT + 1))
#define LIS3DH_CTRL_REG1_ODR0_MASK (1 << LIS3DH_CTRL_REG1_ODR_SHIFT)
#define LIS3DH_CTRL_REG1_ODR_MASK (LIS3DH_CTRL_REG1_ODR3_MASK | \
LIS3DH_CTRL_REG1_ODR2_MASK | \
LIS3DH_CTRL_REG1_ODR1_MASK | \
LIS3DH_CTRL_REG1_ODR0_MASK)
/** @} */
/**
* @brief Low power mode enable.
*
@ -147,8 +154,9 @@ typedef enum {
* 1. low power mode
*/
#define LIS3DH_CTRL_REG1_LPEN_MASK (1 << 3)
/** @brief Z enable bit offset */
/**
* @brief Z enable bit offset
*/
#define LIS3DH_CTRL_REG1_ZEN_SHIFT (2)
/**
* @brief Z axis enable.
@ -159,8 +167,9 @@ typedef enum {
* 1. Z axis enabled
*/
#define LIS3DH_CTRL_REG1_ZEN_MASK (1 << LIS3DH_CTRL_REG1_ZEN_SHIFT)
/** @brief Y enable bit offset */
/**
* @brief Y enable bit offset
*/
#define LIS3DH_CTRL_REG1_YEN_SHIFT (1)
/**
* @brief Y axis enable.
@ -171,8 +180,9 @@ typedef enum {
* 1. Y axis enabled
*/
#define LIS3DH_CTRL_REG1_YEN_MASK (1 << LIS3DH_CTRL_REG1_YEN_SHIFT)
/** @brief X enable bit offset */
/**
* @brief X enable bit offset
*/
#define LIS3DH_CTRL_REG1_XEN_SHIFT (0)
/**
* @brief X axis enable.
@ -183,52 +193,63 @@ typedef enum {
* 1. X axis enabled
*/
#define LIS3DH_CTRL_REG1_XEN_MASK (1 << LIS3DH_CTRL_REG1_XEN_SHIFT)
/** @brief XYZ enable bitfield offset */
/**
* @brief XYZ enable bitfield offset
*/
#define LIS3DH_CTRL_REG1_XYZEN_SHIFT (0)
/** @brief X, Y, Z enable bitfield mask */
/**
* @brief X, Y, Z enable bitfield mask
*/
#define LIS3DH_CTRL_REG1_XYZEN_MASK (LIS3DH_CTRL_REG1_XEN_MASK | \
LIS3DH_CTRL_REG1_YEN_MASK | LIS3DH_CTRL_REG1_ZEN_MASK)
/** @} */
/**
* @name Axis selection macros
*
* Use these when calling lis3dh_set_axes()
* @brief enable X axis (Use when calling lis3dh_set_axes())
*/
/** @{ */
#define LIS3DH_AXES_X (LIS3DH_CTRL_REG1_XEN_MASK) /**< enable X axis */
#define LIS3DH_AXES_Y (LIS3DH_CTRL_REG1_YEN_MASK) /**< enable Y axis */
#define LIS3DH_AXES_Z (LIS3DH_CTRL_REG1_ZEN_MASK) /**< enable Z axis */
#define LIS3DH_AXES_X (LIS3DH_CTRL_REG1_XEN_MASK)
/**
* @brief enable Y axis (Use when calling lis3dh_set_axes())
*/
#define LIS3DH_AXES_Y (LIS3DH_CTRL_REG1_YEN_MASK)
/**
* @brief enable Z axis (Use when calling lis3dh_set_axes())
*/
#define LIS3DH_AXES_Z (LIS3DH_CTRL_REG1_ZEN_MASK)
/** @} */ /* CTRL_REG1 bitfield macros */
/**
* @brief Convenience macro for enabling all axes.
*/
#define LIS3DH_AXES_XYZ (LIS3DH_CTRL_REG1_XYZEN_MASK)
/** @} */
/**
* @name CTRL_REG2 bitfield macros
* @{
*/
/** @{ */
/**
* @name High pass filter mode selection
* @brief High pass filter mode selection second bit
*
* Default value: 00
* Default value: 0
*
* @see Refer to Table 29, "High pass filter mode configuration"
*/
/** @{ */
#define LIS3DH_CTRL_REG2_HPM1_MASK (1 << 7)
#define LIS3DH_CTRL_REG2_HPM0_MASK (1 << 6)
/** @} */
/**
* @name High pass filter cut off frequency selection
* @brief High pass filter mode selection first bit
*
* Default value: 0
*
* @see Refer to Table 29, "High pass filter mode configuration"
*/
#define LIS3DH_CTRL_REG2_HPM0_MASK (1 << 6)
/**
* @brief High pass filter cut off frequency selection second bit
*/
/** @{ */
#define LIS3DH_CTRL_REG2_HPCF2_MASK (1 << 5)
/**
* @brief High pass filter cut off frequency selection second bit
*/
#define LIS3DH_CTRL_REG2_HPCF1_MASK (1 << 4)
/** @} */
/**
* @brief Filtered data selection
*
@ -238,7 +259,6 @@ typedef enum {
* 1. data from internal filter sent to output register and FIFO
*/
#define LIS3DH_CTRL_REG2_FDS_MASK (1 << 3)
/**
* @brief High pass filter enabled for CLICK function.
*
@ -246,23 +266,26 @@ typedef enum {
* 1. filter enabled
*/
#define LIS3DH_CTRL_REG2_HPCLICK_MASK (1 << 2)
/**
* @name High pass filter enabled for AOI function on interrupt 2
* @brief High pass filter enabled for AOI function on interrupt 2, second bit
*
* 0. filter bypassed
* 1. filter enabled
*/
/** @{ */
#define LIS3DH_CTRL_REG2_HPIS2_MASK (1 << 1)
/**
* @brief High pass filter enabled for AOI function on interrupt 2, first bit
*
* 0. filter bypassed
* 1. filter enabled
*/
#define LIS3DH_CTRL_REG2_HPIS1_MASK (1 << 0)
/** @} */
/** @} */
/** @} */ /* CTRL_REG2 bitfield macros */
/**
* @name CTRL_REG3 bitfield macros
* @{
*/
/** @{ */
/**
* @brief CLICK interrupt on INT1
*
@ -272,7 +295,6 @@ typedef enum {
* 1. Enable
*/
#define LIS3DH_CTRL_REG3_I1_CLICK_MASK (1 << 7)
/**
* @brief AOI1 interrupt on INT1
*
@ -327,76 +349,75 @@ typedef enum {
* 1. Enable
*/
#define LIS3DH_CTRL_REG3_I1_OVERRUN_MASK (1 << 1)
/** @} */
/** @} */ /* CTRL_REG3 bitfield macros */
/**
* @name CTRL_REG4 bitfield macros
* @{
*/
/** @{ */
/**
* @name Block data update.
* @brief Block data update (BDU) bit mask
*
* Default value: 0
* Default value of BDU: 0
*
* 0. continuous update
* 1. output registers not updated until MSB and LSB reading
*/
/** @{ */
/** @brief BDU bit mask */
#define LIS3DH_CTRL_REG4_BDU_MASK (1 << 7)
/** @brief BDU enable */
#define LIS3DH_CTRL_REG4_BDU_ENABLE (LIS3DH_CTRL_REG4_BDU_MASK)
/** @brief BDU disable */
#define LIS3DH_CTRL_REG4_BDU_DISABLE (0)
/** @} */
/**
* @name Big/little endian data selection
* @brief Block data update (BDU) enable
*/
#define LIS3DH_CTRL_REG4_BDU_ENABLE (LIS3DH_CTRL_REG4_BDU_MASK)
/**
* @brief Block data update (BDU) disable
*/
#define LIS3DH_CTRL_REG4_BDU_DISABLE (0)
/**
* @brief Big/little endian bit mask
*
* Default value 0.
* Default value of BLE: 0.
*
* 0. Data LSB @ lower address
* 1. Data MSB @ lower address
*/
/** @{ */
/** @brief BLE bit mask */
#define LIS3DH_CTRL_REG4_BLE_MASK (1 << 6)
/** @brief BLE little endian mode */
/**
* @brief Big/little endian little endian mode
*/
#define LIS3DH_CTRL_REG4_BLE_LITTLE_ENDIAN (0)
/** @brief BLE big endian mode */
/**
* @brief Big/little endian big endian mode
*/
#define LIS3DH_CTRL_REG4_BLE_BIG_ENDIAN (LIS3DH_CTRL_REG4_BLE_MASK)
/** @} */
/**
* @name Full scale selection.
*
* Default value: 00
*
* - 00: +/- 2G
* - 01: +/- 4G
* - 10: +/- 8G
* - 11: +/- 16G
* @brief Full scale selection mask second bit
*/
/** @{ */
#define LIS3DH_CTRL_REG4_FS1_MASK (1 << 5)
#define LIS3DH_CTRL_REG4_FS0_MASK (1 << 4)
#define LIS3DH_CTRL_REG4_FS_MASK (LIS3DH_CTRL_REG4_FS1_MASK | LIS3DH_CTRL_REG4_FS0_MASK)
/** @} */
/**
* @name Scale register values symbolic names
* @brief Full scale selection mask first bit
*/
#define LIS3DH_CTRL_REG4_FS0_MASK (1 << 4)
/**
* @brief Full scale selection mask
*/
#define LIS3DH_CTRL_REG4_FS_MASK (LIS3DH_CTRL_REG4_FS1_MASK | \
LIS3DH_CTRL_REG4_FS0_MASK)
/**
* @brief Scale register value: +/- 2G
*/
#define LIS3DH_CTRL_REG4_SCALE_2G (0)
/**
* @brief Scale register value: +/- 4G
*/
#define LIS3DH_CTRL_REG4_SCALE_4G (LIS3DH_CTRL_REG4_FS0_MASK)
/**
* @brief Scale register value: +/- 8G
*/
#define LIS3DH_CTRL_REG4_SCALE_8G (LIS3DH_CTRL_REG4_FS1_MASK)
/**
* @brief Scale: +/- 16G
*/
/** @{ */
#define LIS3DH_CTRL_REG4_SCALE_2G (0) /**< Scale: +/- 2G */
#define LIS3DH_CTRL_REG4_SCALE_4G (LIS3DH_CTRL_REG4_FS0_MASK) /**< Scale: +/- 4G */
#define LIS3DH_CTRL_REG4_SCALE_8G (LIS3DH_CTRL_REG4_FS1_MASK) /**< Scale: +/- 8G */
/** Scale: +/- 16G */
#define LIS3DH_CTRL_REG4_SCALE_16G (LIS3DH_CTRL_REG4_FS1_MASK | LIS3DH_CTRL_REG4_FS0_MASK)
/** @} */
/**
* @brief High resolution output mode
*
@ -406,22 +427,21 @@ typedef enum {
* 1. High resolution enable
*/
#define LIS3DH_CTRL_REG4_HR_MASK (1 << 3)
/**
* @name Self test enable
* @brief Self test enable second bit mask
*
* Default value: 00
* Default value of self test: 00
*
* - 00: Self test disabled
* - Other: See Table 34
*
* @see Table 34
*/
/** @{ */
#define LIS3DH_CTRL_REG4_ST1_MASK (1 << 2)
/**
* @brief Self test enable first bit mask
*/
#define LIS3DH_CTRL_REG4_ST0_MASK (1 << 1)
/** @} */
/**
* @brief SPI serial interface mode selection
*
@ -431,7 +451,6 @@ typedef enum {
* 1. 3-wire interface
*/
#define LIS3DH_CTRL_REG4_SIM_MASK (1 << 0)
/**
* @brief Reboot memory content
*
@ -441,7 +460,6 @@ typedef enum {
* 1. reboot memory content
*/
#define LIS3DH_CTRL_REG5_REBOOT_MASK (1 << 7)
/**
* @brief FIFO enable
*
@ -451,7 +469,6 @@ typedef enum {
* 1. FIFO enable
*/
#define LIS3DH_CTRL_REG5_FIFO_EN_MASK (1 << 6)
/**
* @brief Latch interrupt request on INT1
*
@ -464,20 +481,18 @@ typedef enum {
* 1. interrupt request latched
*/
#define LIS3DH_CTRL_REG5_LIR_I1_MASK (1 << 3)
/**
* @brief 4D enable
*
* 4D detection is enabled on INT1 when 6D bit on INT1_CFG is set to 1.
*/
#define LIS3DH_CTRL_REG5_D4D_I1_MASK (1 << 2)
/** @} */
/** @} */ /* CTRL_REG4 bitfield macros */
/**
* @name STATUS_REG bitfield macros
* @{
*/
/** @{ */
/**
* @brief X, Y or Z axis data overrun
*
@ -487,7 +502,6 @@ typedef enum {
* 1. a new set of data has overwritten the previous ones
*/
#define LIS3DH_STATUS_REG_ZYXOR_MASK (1 << 7)
/**
* @brief Z axis data overrun
*
@ -497,7 +511,6 @@ typedef enum {
* 1. a new data for the Z-axis has overwritten the previous one
*/
#define LIS3DH_STATUS_REG_ZOR_MASK (1 << 6)
/**
* @brief Y axis data overrun
*
@ -507,7 +520,6 @@ typedef enum {
* 1. a new data for the Y-axis has overwritten the previous one
*/
#define LIS3DH_STATUS_REG_YOR_MASK (1 << 5)
/**
* @brief X axis data overrun
*
@ -517,7 +529,6 @@ typedef enum {
* 1. a new data for the X-axis has overwritten the previous one
*/
#define LIS3DH_STATUS_REG_XOR_MASK (1 << 4)
/**
* @brief X, Y or Z axis new data available
*
@ -527,7 +538,6 @@ typedef enum {
* 1. a new set of data is available
*/
#define LIS3DH_STATUS_REG_ZYXDA_MASK (1 << 3)
/**
* @brief Z axis new data available
*
@ -537,7 +547,6 @@ typedef enum {
* 1. a new data for the Z-axis is available
*/
#define LIS3DH_STATUS_REG_ZDA_MASK (1 << 2)
/**
* @brief Y axis new data available
*
@ -547,7 +556,6 @@ typedef enum {
* 1. a new data for the Y-axis is available
*/
#define LIS3DH_STATUS_REG_YDA_MASK (1 << 1)
/**
* @brief X axis new data available
*
@ -557,19 +565,17 @@ typedef enum {
* 1. a new data for the X-axis is available
*/
#define LIS3DH_STATUS_REG_XDA_MASK (1 << 0)
/** @} */
/** @} */ /* STATUS_REG bitfield macros */
/**
* @name FIFO_CTRL_REG bitfield macros
* @{
*/
/** @{ */
#define LIS3DH_FIFO_CTRL_REG_FM_SHIFT (6)
#define LIS3DH_FIFO_CTRL_REG_FM1_MASK (1 << 7)
#define LIS3DH_FIFO_CTRL_REG_FM0_MASK (1 << 6)
#define LIS3DH_FIFO_CTRL_REG_FM_MASK (LIS3DH_FIFO_CTRL_REG_FM1_MASK | \
LIS3DH_FIFO_CTRL_REG_FM0_MASK)
#define LIS3DH_FIFO_CTRL_REG_TR_MASK (1 << 5)
#define LIS3DH_FIFO_CTRL_REG_FTH4_MASK (1 << 4)
#define LIS3DH_FIFO_CTRL_REG_FTH3_MASK (1 << 3)
@ -577,18 +583,17 @@ typedef enum {
#define LIS3DH_FIFO_CTRL_REG_FTH1_MASK (1 << 1)
#define LIS3DH_FIFO_CTRL_REG_FTH0_MASK (1 << 0)
#define LIS3DH_FIFO_CTRL_REG_FTH_SHIFT (0)
#define LIS3DH_FIFO_CTRL_REG_FTH_MASK \
(LIS3DH_FIFO_CTRL_REG_FTH0_MASK | \
#define LIS3DH_FIFO_CTRL_REG_FTH_MASK (LIS3DH_FIFO_CTRL_REG_FTH0_MASK | \
LIS3DH_FIFO_CTRL_REG_FTH1_MASK | \
LIS3DH_FIFO_CTRL_REG_FTH2_MASK | \
LIS3DH_FIFO_CTRL_REG_FTH3_MASK | \
LIS3DH_FIFO_CTRL_REG_FTH4_MASK)
/** @} */
/** @} */ /* FIFO_CTRL_REG bitfield macros */
/**
* @name FIFO_SRC_REG bitfield macros
* @{
*/
/** @{ */
#define LIS3DH_FIFO_SRC_REG_WTM_MASK (1 << 7)
#define LIS3DH_FIFO_SRC_REG_OVRN_FIFO_MASK (1 << 6)
#define LIS3DH_FIFO_SRC_REG_EMPTY_MASK (1 << 5)
@ -598,84 +603,122 @@ typedef enum {
#define LIS3DH_FIFO_SRC_REG_FSS1_MASK (1 << 1)
#define LIS3DH_FIFO_SRC_REG_FSS0_MASK (1 << 0)
#define LIS3DH_FIFO_SRC_REG_FSS_SHIFT (0)
#define LIS3DH_FIFO_SRC_REG_FSS_MASK \
(LIS3DH_FIFO_SRC_REG_FSS0_MASK | \
#define LIS3DH_FIFO_SRC_REG_FSS_MASK (LIS3DH_FIFO_SRC_REG_FSS0_MASK | \
LIS3DH_FIFO_SRC_REG_FSS1_MASK | \
LIS3DH_FIFO_SRC_REG_FSS2_MASK | \
LIS3DH_FIFO_SRC_REG_FSS3_MASK | \
LIS3DH_FIFO_SRC_REG_FSS4_MASK)
/** @} */
/** @} */ /* FIFO_CTRL_REG bitfield macros */
/**
* @name Register address bitfield macros
* @{
*/
/** @{ */
/**
* Write to register
* @brief Write to register
*/
#define LIS3DH_SPI_WRITE_MASK (0 << 7)
/**
* The READ bit must be set when reading
* @brief The READ bit must be set when reading
*/
#define LIS3DH_SPI_READ_MASK (1 << 7)
/**
* Multi byte transfers must assert this bit when writing the address.
* @brief Multi byte transfers must assert this bit when writing the address.
*/
#define LIS3DH_SPI_MULTI_MASK (1 << 6)
/**
* Opposite of LIS3DH_SPI_MULTI_MASK.
* @brief Opposite of LIS3DH_SPI_MULTI_MASK.
*/
#define LIS3DH_SPI_SINGLE_MASK (0 << 6)
/**
* Mask of the address bits in the address byte during transfers.
* @brief Mask of the address bits in the address byte during transfers.
*/
#define LIS3DH_SPI_ADDRESS_MASK (0x3F)
/** @} */
/** @} */ /* Register address bitfield macros */
/**
* Length of scalar measurement data in bytes.
* @brief Length of scalar measurement data in bytes.
*/
#define LIS3DH_ADC_DATA_SIZE (2)
/**
* @name Output Data Rates (ODR)
*
* Use these when calling lis3dh_set_odr(odr).
*/
/** @{ */
#define LIS3DH_ODR_POWERDOWN (0x00 << LIS3DH_CTRL_REG1_ODR_SHIFT)
#define LIS3DH_ODR_1Hz (0x01 << LIS3DH_CTRL_REG1_ODR_SHIFT)
#define LIS3DH_ODR_10Hz (0x02 << LIS3DH_CTRL_REG1_ODR_SHIFT)
#define LIS3DH_ODR_25Hz (0x03 << LIS3DH_CTRL_REG1_ODR_SHIFT)
#define LIS3DH_ODR_50Hz (0x04 << LIS3DH_CTRL_REG1_ODR_SHIFT)
#define LIS3DH_ODR_100Hz (0x05 << LIS3DH_CTRL_REG1_ODR_SHIFT)
#define LIS3DH_ODR_200Hz (0x06 << LIS3DH_CTRL_REG1_ODR_SHIFT)
#define LIS3DH_ODR_400Hz (0x07 << LIS3DH_CTRL_REG1_ODR_SHIFT)
#define LIS3DH_ODR_LP1600Hz (0x08 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/* Normal mode 1250 Hz and Low power mode 5000 Hz share the same setting */
#define LIS3DH_ODR_NP1250Hz (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)
#define LIS3DH_ODR_LP5000HZ (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/** @} */
#define LIS3DH_ADC_DATA_SIZE (2U)
/**
* @name FIFO modes.
*
* Used when calling lis3dh_set_fifo()
* @{
*/
/**
* @brief FIFO mode: Bypass
*/
/** @{ */
/** FIFO mode: Bypass */
#define LIS3DH_FIFO_MODE_BYPASS (0x00 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
/** FIFO mode: FIFO */
/**
* @brief FIFO mode: FIFO
*/
#define LIS3DH_FIFO_MODE_FIFO (0x01 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
/** FIFO mode: Stream */
/**
* @brief FIFO mode: Stream
*/
#define LIS3DH_FIFO_MODE_STREAM (0x02 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
/** FIFO mode: Stream to FIFO */
/**
* @brief FIFO mode: Stream to FIFO
*/
#define LIS3DH_FIFO_MODE_STREAM_TO_FIFO (0x03 << LIS3DH_FIFO_CTRL_REG_FM_SHIFT)
/** @} */
/**
* @name Output Data Rates (ODR) macros
*
* Use these when calling lis3dh_set_odr(odr).
* @{
*/
/**
* @brief Powerdown mode
*/
#define LIS3DH_ODR_POWERDOWN (0x00 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/**
* @brief 1Hz mode
*/
#define LIS3DH_ODR_1Hz (0x01 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/**
* @brief 10Hz mode
*/
#define LIS3DH_ODR_10Hz (0x02 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/**
* @brief 25Hz mode
*/
#define LIS3DH_ODR_25Hz (0x03 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/**
* @brief 50Hz mode
*/
#define LIS3DH_ODR_50Hz (0x04 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/**
* @brief 100Hz mode
*/
#define LIS3DH_ODR_100Hz (0x05 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/**
* @brief 200Hz mode
*/
#define LIS3DH_ODR_200Hz (0x06 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/**
* @brief 400Hz mode
*/
#define LIS3DH_ODR_400Hz (0x07 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/**
* @brief Low power 1600Hz mode
*/
#define LIS3DH_ODR_LP1600Hz (0x08 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/**
* @brief Normal mode 1250 Hz
* @note Normal mode 1250 Hz and Low power mode 5000 Hz share the same setting
*/
#define LIS3DH_ODR_NP1250Hz (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/**
* @brief Low power mode 5000 Hz
* @note Normal mode 1250 Hz and Low power mode 5000 Hz share the same setting
*/
#define LIS3DH_ODR_LP5000HZ (0x09 << LIS3DH_CTRL_REG1_ODR_SHIFT)
/** @} */
/**
* @brief Configuration parameters for LIS3DH devices
*/
@ -709,7 +752,6 @@ typedef struct __attribute__((packed))
int16_t acc_z; /**< Acceleration in the Z direction in milli-G */
} lis3dh_data_t;
/**
* @brief Initialize a LIS3DH sensor instance
*
@ -811,7 +853,7 @@ int lis3dh_set_axes(const lis3dh_t *dev, const uint8_t axes);
int lis3dh_set_fifo(const lis3dh_t *dev, const uint8_t mode, const uint8_t watermark);
/**
* Set the output data rate of the sensor.
* @brief Set the output data rate of the sensor.
*
* @param[in] dev Device descriptor of sensor
* @param[in] odr Chosen output data rate.

2
drivers/include/lis3mdl.h
View File

@ -7,7 +7,7 @@
*/
/**
* @defgroup driver_LIS3MDL LIS3MDL 3-axis magnetometer
* @defgroup drivers_lis3mdl LIS3MDL 3-axis magnetometer
* @ingroup drivers_sensors
* @brief Device driver for the LIS3MDL 3-axis magnetometer
* @{

2
drivers/include/lps331ap.h
View File

@ -33,7 +33,7 @@ extern "C" {
/**
* @brief The sensors default I2C address
*/
#define LPS331AP_DEFAULT_ADDRESS 0x5c
#define LPS331AP_DEFAULT_ADDRESS (0x5c)
/**
* @brief Device descriptor for LPS331AP sensors

2
drivers/include/lsm303dlhc.h
View File

@ -30,7 +30,7 @@ extern "C" {
#endif
/**
* @brief The sensors default I2C address
* @name The sensors default I2C address
* @{
*/
#define LSM303DLHC_ACC_DEFAULT_ADDRESS (0x19)

7
drivers/include/mag3110.h
View File

@ -55,6 +55,10 @@ enum {
#define MAG3110_I2C_ADDRESS 0x0E /**< Magnetometer Default Address */
#endif
/**
* @name Output data rate macros
* @{
*/
#define MAG3110_DROS_8000_16 0 /**< Output Rate 80 Hz, Over Sample Ratio 16 */
#define MAG3110_DROS_4000_32 1 /**< Output Rate 40 Hz, Over Sample Ratio 32 */
#define MAG3110_DROS_2000_64 2 /**< Output Rate 20 Hz, Over Sample Ratio 64 */
@ -88,6 +92,7 @@ enum {
#define MAG3110_DROS_0016_64 30 /**< Output Rate 0.16 Hz, Over Sample Ratio 64 */
#define MAG3110_DROS_0008_128 31 /**< Output Rate 0.08 Hz, Over Sample Ratio 128 */
#define MAG3110_DROS_DEFAULT MAG3110_DROS_0125_128 /**< Default Setting for testing */
/** @} */
/**
* @brief Configuration parameters
@ -131,6 +136,7 @@ int mag3110_init(mag3110_t *dev, const mag3110_params_t *params);
/**
* @brief Set user offset correction.
*
* Offset correction register will be erased after accelerometer reset.
*
* @param[out] dev device descriptor of magnetometer
@ -176,6 +182,7 @@ int mag3110_is_ready(const mag3110_t *dev);
/**
* @brief Read magnetometer's data.
*
* To get the actual values for the magnetic field in \f$\mu T\f$,
* one have to divide the returned values from the magnetometer by 10.
*

2
drivers/include/mq3.h
View File

@ -7,7 +7,7 @@
*/
/**
* @defgroup driver_mq3 MQ-3 Alcohol Tester
* @defgroup drivers_mq3 MQ-3 Alcohol Tester
* @ingroup drivers_sensors
* @brief Device driver for the MQ-3 alcohol sensor
* @{

85
drivers/include/mrf24j40.h
View File

@ -14,6 +14,42 @@
* This module contains drivers for radio devices in Microchip MRF24J40 series.
* The driver is aimed to work with all devices of this series.
*
* Default TX power is 0dBm.
*
* TX power mapping:
* * 0 -> -36dB
* * 1 -> -35dB
* * 2 -> -34dB
* * 3 -> -33dB
* * 4 -> -32dB
* * 5 -> -31dB
* * 6 -> -30dB
* * 7 -> -30dB
* * 8 -> -26dB
* * 9 -> -25dB
* * 10 -> -24dB
* * 11 -> -23dB
* * 12 -> -22dB
* * 13 -> -21dB
* * 14 -> -20dB
* * 15 -> -20dB
* * 16 -> -16dB
* * 17 -> -15dB
* * 18 -> -14dB
* * 19 -> -13dB
* * 20 -> -12dB
* * 21 -> -11dB
* * 22 -> -10dB
* * 23 -> -10dB
* * 24 -> -6dB
* * 25 -> -5dB
* * 26 -> -4dB
* * 27 -> -3dB
* * 28 -> -2dB
* * 29 -> -1dB
* * 30 -> -0dB
* * 31 -> -0dB
*
* @{
*
* @file
@ -40,43 +76,7 @@ extern "C" {
#endif
/**
* @brief Default TX power (0dBm)
* 0 -> -36dB
* 1 -> -35dB
* 2 -> -34dB
* 3 -> -33dB
* 4 -> -32dB
* 5 -> -31dB
* 6 -> -30dB
* 7 -> -30dB
* 8 -> -26dB
* 9 -> -25dB
* 10 -> -24dB
* 11 -> -23dB
* 12 -> -22dB
* 13 -> -21dB
* 14 -> -20dB
* 15 -> -20dB
* 16 -> -16dB
* 17 -> -15dB
* 18 -> -14dB
* 19 -> -13dB
* 20 -> -12dB
* 21 -> -11dB
* 22 -> -10dB
* 23 -> -10dB
* 24 -> -6dB
* 25 -> -5dB
* 26 -> -4dB
* 27 -> -3dB
* 28 -> -2dB
* 29 -> -1dB
* 30 -> -0dB
* 31 -> -0dB
*/
/**
* @brief Flags for PSEUDO DEVICE INTERNAL STATES
* @name Flags for pseudo device internal states
* @{
*/
#define MRF24J40_PSEUDO_STATE_IDLE (0x01) /**< Idle, ready to transmit or receive */
@ -85,7 +85,7 @@ extern "C" {
/** @} */
/**
* @brief Internal device option flags
* @name Internal device option flags
*
* `0x00ff` is reserved for general IEEE 802.15.4 flags
* (see @ref netdev_ieee802154_t)
@ -131,17 +131,14 @@ typedef struct mrf24j40_params {
*/
typedef struct {
netdev_ieee802154_t netdev; /**< netdev parent struct */
/**
* @brief device specific fields
* @{
*/
/* device specific fields */
mrf24j40_params_t params; /**< parameters for initialization */
uint8_t state; /**< current state of the radio */
uint8_t idle_state; /**< state to return to after sending */
uint8_t tx_frame_len; /**< length of the current TX frame */
uint8_t header_len;
uint8_t header_len; /**< length of the header */
uint8_t pending; /**< Flags for pending tasks */
uint8_t irq_flag;
uint8_t irq_flag; /**< Flags for IRQs */
} mrf24j40_t;
/**

2
drivers/include/mtd.h
View File

@ -240,5 +240,5 @@ extern const vfs_file_ops_t mtd_vfs_ops;
}
#endif
/** @} */
#endif /* MTD_H */
/** @} */

3
drivers/include/net/netdev.h
View File

@ -392,5 +392,6 @@ typedef struct netdev_driver {
#ifdef __cplusplus
}
#endif
/** @} */
#endif /* NET_NETDEV_H */
/** @} */

3
drivers/include/net/netdev/eth.h
View File

@ -61,5 +61,6 @@ int netdev_eth_set(netdev_t *dev, netopt_t opt, const void *value, size_t value_
#ifdef __cplusplus
}
#endif
/** @} */
#endif /* NET_NETDEV_ETH_H */
/** @} */

6
drivers/include/pcd8544.h
View File

@ -7,7 +7,7 @@
*/
/**
* @defgroup driver_pcd8544 PCD8544 LCD driver
* @defgroup drivers_pcd8544 PCD8544 LCD driver
* @ingroup drivers_actuators
* @brief Driver for PCD8544 LCD displays
*
@ -32,7 +32,7 @@
#endif
/**
* @brief Definition of display dimensions
* @name Definition of display dimensions
* @{
*/
#define PCD8544_RES_X (84U) /**< pixels per row */
@ -42,7 +42,7 @@
/** @} */
/**
* @brief Default values for temperature compensation and contrast
* @name Default values for temperature compensation and contrast
* @{
*/
#define PCD8544_DEFAULT_CONTRAST (45U)

8
drivers/include/periph/adc.h
View File

@ -54,34 +54,27 @@ extern "C" {
/**
* @brief Define default ADC type identifier
* @{
*/
#ifndef HAVE_ADC_T
typedef unsigned int adc_t;
#endif
/** @} */
/**
* @brief Default ADC undefined value
* @{
*/
#ifndef ADC_UNDEF
#define ADC_UNDEF (UINT_MAX)
#endif
/** @} */
/**
* @brief Default ADC line access macro
* @{
*/
#ifndef ADC_LINE
#define ADC_LINE(x) (x)
#endif
/** @} */
/**
* @brief Possible ADC resolution settings
* @{
*/
#ifndef HAVE_ADC_RES_T
typedef enum {
@ -93,7 +86,6 @@ typedef enum {
ADC_RES_16BIT, /**< ADC resolution: 16 bit */
} adc_res_t;
#endif
/** @} */
/**
* @brief Initialize the given ADC line

4
drivers/include/periph/cpuid.h
View File

@ -52,6 +52,4 @@ void cpuid_get(void *id);
#endif
#endif /* PERIPH_CPUID_H */
/**
* @}
*/
/** @} */

6
drivers/include/periph/dac.h
View File

@ -50,12 +50,10 @@ extern "C" {
/**
* @brief Define default DAC type identifier
* @{
*/
#ifndef HAVE_DAC_T
typedef unsigned int dac_t;
#endif
/** @} */
/**
* @brief Return codes used by the DAC driver interface
@ -67,21 +65,17 @@ enum {
/**
* @brief Default DAC undefined value
* @{
*/
#ifndef DAC_UNDEF
#define DAC_UNDEF (UINT_MAX)
#endif
/** @} */
/**
* @brief Default DAC access macro
* @{
*/
#ifndef DAC_LINE
#define DAC_LINE(x) (x)
#endif
/** @} */
/**
* @brief Initialize the given DAC line

2
drivers/include/periph/gpio.h
View File

@ -125,7 +125,6 @@ typedef void (*gpio_cb_t)(void *arg);
/**
* @brief Default interrupt context for GPIO pins
* @{
*/
#ifndef HAVE_GPIO_ISR_CTX_T
typedef struct {
@ -133,7 +132,6 @@ typedef struct {
void *arg; /**< optional argument */
} gpio_isr_ctx_t;
#endif
/** @} */
/**
* @brief Initialize the given pin as general purpose input or output

8
drivers/include/periph/i2c.h
View File

@ -89,34 +89,27 @@ extern "C" {
/**
* @brief Default I2C device access macro
* @{
*/
#ifndef I2C_DEV
#define I2C_DEV(x) (x)
#endif
/** @} */
/**
* @brief Default I2C undefined value
* @{
*/
#ifndef I2C_UNDEF
#define I2C_UNDEF (UINT_MAX)
#endif
/** @} */
/**
* @brief Default i2c_t type definition
* @{
*/
#ifndef HAVE_I2C_T
typedef unsigned int i2c_t;
#endif
/** @} */
/**
* @brief Default mapping of I2C bus speed values
* @{
*/
#ifndef HAVE_I2C_SPEED_T
typedef enum {
@ -127,7 +120,6 @@ typedef enum {
I2C_SPEED_HIGH, /**< high speed mode: ~3.4Mbit/s */
} i2c_speed_t;
#endif
/** @} */
/**
* @brief Initialize an I2C device to run as bus master

8
drivers/include/periph/pwm.h
View File

@ -73,34 +73,27 @@ extern "C" {
/**
* @brief Default PWM access macro
* @{
*/
#ifndef PWM_DEV
#define PWM_DEV(x) (x)
#endif
/** @} */
/**
* @brief Default PWM undefined value
* @{
*/
#ifndef PWM_UNDEF
#define PWM_UNDEF (UINT_MAX)
#endif
/** @} */
/**
* @brief Default PWM type definition
* @{
*/
#ifndef HAVE_PWM_T
typedef unsigned int pwm_t;
#endif
/** @} */
/**
* @brief Default PWM mode definition
* @{
*/
#ifndef HAVE_PWM_MODE_T
typedef enum {
@ -109,7 +102,6 @@ typedef enum {
PWM_CENTER /*< use center aligned PWM */
} pwm_mode_t;
#endif
/** @} */
/**
* @brief Initialize a PWM device

2
drivers/include/periph/timer.h
View File

@ -67,7 +67,6 @@ typedef void (*timer_cb_t)(void *arg, int channel);
/**
* @brief Default interrupt context entry holding callback and argument
* @{
*/
#ifndef HAVE_TIMER_ISR_CTX_T
typedef struct {
@ -75,7 +74,6 @@ typedef struct {
void *arg; /**< optional argument given to that callback */
} timer_isr_ctx_t;
#endif
/** @} */
/**
* @brief Initialize the given timer

8
drivers/include/periph/uart.h
View File

@ -60,30 +60,24 @@ extern "C" {
/**
* @brief Define default UART type identifier
* @{
*/
#ifndef HAVE_UART_T
typedef unsigned int uart_t;
#endif
/** @} */
/**
* @brief Default UART undefined value
* @{
*/
#ifndef UART_UNDEF
#define UART_UNDEF (UINT_MAX)
#endif
/** @} */
/**
* @brief Default UART device access macro
* @{
*/
#ifndef UART_DEV
#define UART_DEV(x) (x)
#endif
/** @} */
/**
* @brief Signature for receive interrupt callback
@ -95,7 +89,6 @@ typedef void(*uart_rx_cb_t)(void *arg, uint8_t data);
/**
* @brief Interrupt context for a UART device
* @{
*/
#ifndef HAVE_UART_ISR_CTX_T
typedef struct {
@ -103,7 +96,6 @@ typedef struct {
void *arg; /**< argument to both callback routines */
} uart_isr_ctx_t;
#endif
/** @} */
/**
* @brief Possible UART return values

2
drivers/include/pir.h
View File

@ -7,7 +7,7 @@
*/
/**
* @defgroup driver_pir PIR Motion Sensor
* @defgroup drivers_pir PIR Motion Sensor
* @ingroup drivers_sensors
* @brief Device driver interface for the PIR motion sensor
* @{

2
drivers/include/pn532.h
View File

@ -84,7 +84,7 @@ typedef struct {
#endif
/**
* @brief Helpers to extract firmware information from word
* @name Helpers to extract firmware information from word
* @{
*/
#define PN532_IC_VERSION(fwver) ((fwver >> 24) & 0xff)

2
drivers/include/rgbled.h
View File

@ -7,7 +7,7 @@
*/
/**
* @defgroup driver_rgbled RGB-LED driver
* @defgroup drivers_rgbled RGB-LED driver
* @ingroup drivers_actuators
* @brief High-level driver for RGB-LEDs
* @{

2
drivers/include/servo.h
View File

@ -8,7 +8,7 @@
*/
/**
* @defgroup driver_servo Servo Motor Driver
* @defgroup drivers_servo Servo Motor Driver
* @ingroup drivers_actuators
* @brief High-level driver for servo motors
* @{

8
drivers/include/sht11.h
View File

@ -6,9 +6,6 @@
* directory for more details.
*/
#ifndef SHT11_H
#define SHT11_H
/**
* @defgroup drivers_sht11 SHT11 Humidity and Temperature Sensor
* @ingroup drivers_sensors
@ -21,6 +18,9 @@
* @author Freie Universität Berlin, Computer Systems & Telematics
*/
#ifndef SHT11_H
#define SHT11_H
#include <stdint.h>
#ifdef __cplusplus
@ -104,5 +104,5 @@ uint8_t sht11_read_status(uint8_t *p_value, uint8_t *p_checksum);
}
#endif
/** @} */
#endif /* SHT11_H */
/** @} */

4
drivers/include/si70xx.h
View File

@ -7,7 +7,7 @@
*/
/**
* @defgroup driver_si70xx Si7006/13/20/21 temperature and humidity sensors
* @defgroup drivers_si70xx Si7006/13/20/21 temperature and humidity sensors
* @ingroup drivers_sensors
* @brief Driver for the Si7006/13/20/21 temperature and humidity sensor.
* @{
@ -29,12 +29,14 @@ extern "C" {
/**
* @name Si70xx chip addresses.
* @{
*/
#define SI70XX_ADDRESS_SI7006 (0x80)
#define SI70XX_ADDRESS_SI7013 (0x80)
#define SI70XX_ADDRESS_SI7013_ALT (0x81)
#define SI70XX_ADDRESS_SI7020 (0x80)
#define SI70XX_ADDRESS_SI7021 (0x80)
/** @} */
/**
* @name Si70xx device commands.

2
drivers/include/srf02.h
View File

@ -8,7 +8,7 @@
*/
/**
* @defgroup driver_srf02 SRF02 ultrasonic range sensor
* @defgroup drivers_srf02 SRF02 ultrasonic range sensor
* @ingroup drivers_sensors
* @brief Driver for the SRF02 ultrasonic range sensor
* @{

2
drivers/include/srf08.h
View File

@ -7,7 +7,7 @@
*/
/**
* @defgroup driver_srf08 SRF08 ultrasonic range sensor
* @defgroup drivers_srf08 SRF08 ultrasonic range sensor
* @ingroup drivers_sensors
* @brief Driver for the SRF08 ultrasonic range sensor
*

3
drivers/include/tsl2561.h
View File

@ -56,7 +56,7 @@ extern "C" {
/** @} */
/**
* @name tsl2561 driver initialization return codes
* @name TSL2561 driver initialization return codes
* @{
*/
#define TSL2561_OK (0)
@ -74,7 +74,6 @@ typedef struct {
uint8_t integration; /**< integration time */
} tsl2561_t;
/**
* @brief Device initialization parameters
*/

4
drivers/include/xbee.h
View File

@ -89,9 +89,7 @@ extern "C" {
* addresses when unset.
*/
#define XBEE_ADDR_FLAGS_LONG (0x80)
/**
* @}
*/
/** @} */
/**
* @brief States of the internal FSM for handling incoming UART frames

2
drivers/io1_xplained/include/io1_xplained_params.h
View File

@ -31,7 +31,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the IO1 Xplained extension
* @name Set default configuration parameters for the IO1 Xplained extension
* @{
*/
#ifndef IO1_XPLAINED_PARAM_ADDR

2
drivers/isl29020/isl29020.c
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_isl29020
* @ingroup drivers_isl29020
* @{
*
* @file

2
drivers/isl29020/isl29020_saul.c
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_isl29020
* @ingroup drivers_isl29020
* @{
*
* @file

2
drivers/isl29125/include/isl29125-internal.h
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_isl29125
* @ingroup drivers_isl29125
* @{
*
* @file

2
drivers/isl29125/isl29125.c
View File

@ -8,7 +8,7 @@
*/
/**
* @ingroup driver_isl29125
* @ingroup drivers_isl29125
* @{
*
* @file

5
drivers/jc42/include/jc42_internal.h
View File

@ -44,12 +44,9 @@ extern "C" {
#define JC42_BUS_FREE_TIME_US (1U)
/** @} */
#ifdef __cplusplus
}
#endif
/** @} */
#endif /* JC42_INTERNAL_H */
/** @} */

2
drivers/jc42/include/jc42_params.h
View File

@ -29,7 +29,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the JC42
* @name Set default configuration parameters for the JC42
* @{
*/
#ifndef JC42_PARAM_I2C_DEV

2
drivers/kw2xrf/include/kw2xrf_params.h
View File

@ -26,7 +26,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters for the KW2XRF driver
* @name Set default configuration parameters for the KW2XRF driver
* @{
*/
#ifndef KW2XRF_PARAM_SPI

2
drivers/l3g4200d/include/l3g4200d-regs.h
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_l3g4200d
* @ingroup drivers_l3g4200d
* @{
*
* @file

2
drivers/l3g4200d/include/l3g4200d_params.h
View File

@ -28,7 +28,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters
* @name Set default configuration parameters
* @{
*/
#ifndef L3G4200D_PARAM_I2C

2
drivers/l3g4200d/l3g4200d.c
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_l3g4200d
* @ingroup drivers_l3g4200d
* @{
*
* @file

2
drivers/l3g4200d/l3g4200d_saul.c
View File

@ -7,7 +7,7 @@
*/
/**
* @ingroup driver_l3g4200d
* @ingroup drivers_l3g4200d
* @{
*
* @file

2
drivers/lis3dh/include/lis3dh_params.h
View File

@ -28,7 +28,7 @@ extern "C" {
#endif
/**
* @brief Set default configuration parameters
* @name Set default configuration parameters
* @{
*/
#ifndef LIS3DH_PARAM_SPI

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