Merge pull request #5425 from locicontrols/cc2538-ldscript
cpu/cc2538: eliminate cc2538.ld and use cortexm_base.ld instead
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commit
9693c3cdf5
@ -1,155 +0,0 @@
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/* ----------------------------------------------------------------------------
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* SAM Software Package License
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* ----------------------------------------------------------------------------
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* Copyright (c) 2012, Atmel Corporation
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following condition is met:
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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OUTPUT_ARCH(arm)
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SEARCH_DIR(.)
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/* Define the default stack size for interrupt mode. As no context is
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saved on this stack and ISRs are supposed to be short, it can be fairly
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small. 512 byte should be a save assumption here */
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STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : 0x200; /* 512 byte */
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/* Section Definitions */
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SECTIONS
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{
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.text :
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{
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. = ALIGN(4);
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_sfixed = .;
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KEEP(*(.vectors .vectors.*))
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*(.text .text.* .gnu.linkonce.t.*)
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*(.glue_7t) *(.glue_7)
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*(.rodata .rodata* .gnu.linkonce.r.*)
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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/* Support C constructors, and C destructors in both user code
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and the C library. This also provides support for C++ code. */
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. = ALIGN(4);
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KEEP(*(.init))
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. = ALIGN(4);
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__preinit_array_start = .;
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KEEP (*(.preinit_array))
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__preinit_array_end = .;
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. = ALIGN(4);
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__init_array_start = .;
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array))
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__init_array_end = .;
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. = ALIGN(0x4);
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*crtend.o(.ctors))
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. = ALIGN(4);
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KEEP(*(.fini))
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. = ALIGN(4);
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__fini_array_start = .;
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KEEP (*(.fini_array))
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KEEP (*(SORT(.fini_array.*)))
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__fini_array_end = .;
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*crtend.o(.dtors))
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. = ALIGN(4);
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_efixed = .; /* End of text section */
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} > rom
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/* .ARM.exidx is sorted, so has to go in its own output section. */
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PROVIDE_HIDDEN (__exidx_start = .);
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > rom
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PROVIDE_HIDDEN (__exidx_end = .);
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/* exception handling */
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. = ALIGN(4);
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.eh_frame :
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{
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KEEP (*(.eh_frame))
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} > rom
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. = ALIGN(4);
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_etext = .;
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.relocate : AT (_etext)
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{
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. = ALIGN(4);
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_srelocate = .;
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*(.ramfunc .ramfunc.*);
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*(.data .data.*);
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. = ALIGN(4);
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_erelocate = .;
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} > ram
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/* .bss section which is used for uninitialized data */
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.bss (NOLOAD) :
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{
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. = ALIGN(4);
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_sbss = . ;
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_szero = .;
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*(.bss .bss.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = . ;
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_ezero = .;
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} > ram
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/* stack section */
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.stack (NOLOAD):
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{
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. = ALIGN(8);
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_sstack = .;
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. = . + STACK_SIZE;
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. = ALIGN(8);
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_estack = .;
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} > ram
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/* heap section */
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. = ALIGN(4);
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_sheap = . ;
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_eheap = ORIGIN(ram) + LENGTH(ram);
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/* Populate information abour ram size */
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_sram = ORIGIN(ram);
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_eram = ORIGIN(ram) + LENGTH(ram);
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.flashcca :
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{
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KEEP(*(.flashcca))
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} > cca
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}
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@ -25,6 +25,15 @@ MEMORY
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ram (rwx) : ORIGIN = 0x20004000, LENGTH = 16K
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ram (rwx) : ORIGIN = 0x20004000, LENGTH = 16K
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}
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}
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INCLUDE cc2538.ld
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/* MCU Specific Section Definitions */
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SECTIONS
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{
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.flashcca :
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{
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KEEP(*(.flashcca))
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} > cca
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}
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INCLUDE cortexm_base.ld
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/* @} */
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/* @} */
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@ -26,6 +26,15 @@ MEMORY
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
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}
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}
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INCLUDE cc2538.ld
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/* MCU Specific Section Definitions */
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SECTIONS
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{
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.flashcca :
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{
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KEEP(*(.flashcca))
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} > cca
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}
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INCLUDE cortexm_base.ld
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/* @} */
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/* @} */
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@ -26,6 +26,15 @@ MEMORY
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
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}
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}
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INCLUDE cc2538.ld
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/* MCU Specific Section Definitions */
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SECTIONS
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{
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.flashcca :
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{
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KEEP(*(.flashcca))
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} > cca
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}
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INCLUDE cortexm_base.ld
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/* @} */
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/* @} */
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@ -24,6 +24,15 @@ MEMORY
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
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ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
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}
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}
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INCLUDE cc2538.ld
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/* MCU Specific Section Definitions */
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SECTIONS
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{
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.flashcca :
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{
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KEEP(*(.flashcca))
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} > cca
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}
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INCLUDE cortexm_base.ld
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/* @} */
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/* @} */
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