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Merge pull request #5127 from malosek/msp430_spi_speed_fix

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msp430 spi speed fix + USIC/USCI cleanup
This commit is contained in:
Hauke Petersen 2016-03-24 11:04:06 +01:00
commit 9854ca684b
3 changed files with 25 additions and 13 deletions
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4
boards/z1/include/periph_conf.h
View File

@ -53,7 +53,7 @@ extern "C" {
#define UART_NUMOF (1U)
#define UART_0_EN (1U)
#define UART_USE_USIC
#define UART_USE_USCI
#define UART_BASE (USCI_0)
#define UART_IE (SFR->IE2)
#define UART_IF (SFR->IFG2)
@ -75,7 +75,7 @@ extern "C" {
#define SPI_0_EN (1U)
/* SPI configuration */
#define SPI_USE_USIC
#define SPI_USE_USCI
#define SPI_DEV (USCI_0_B_SPI)
#define SPI_IE (SFR->IE2)
#define SPI_IF (SFR->IFG2)

32
cpu/msp430fxyz/periph/spi.c
View File

@ -34,7 +34,7 @@
static mutex_t spi_lock = MUTEX_INIT;
/* per default, we use the legacy MSP430 USART module for UART functionality */
#ifndef SPI_USE_USIC
#ifndef SPI_USE_USCI
int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
{
@ -70,20 +70,26 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
switch (speed) {
case SPI_SPEED_100KHZ:
br /= 100000;
break;
case SPI_SPEED_400KHZ:
br /= 400000;
break;
case SPI_SPEED_1MHZ:
br /= 1000000;
break;
case SPI_SPEED_5MHZ:
br /= 5000000;
if (br < 2) { /* make sure the is not smaller then 2 */
br = 2;
}
break;
default:
/* other clock speeds are not supported */
return -1;
}
/* make sure the is not smaller then 2 */
if (br < 2) {
br = 2;
}
SPI_DEV->BR0 = (uint8_t)br;
SPI_DEV->BR1 = (uint8_t)(br >> 8);
SPI_DEV->MCTL = 0;
@ -94,9 +100,9 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
return 0;
}
/* we use alternative SPI code in case the board used the USIC module for SPI
/* we use alternative SPI code in case the board used the USCI module for SPI
* instead of the (older) USART module */
#else /* SPI_USE_USIC */
#else /* SPI_USE_USCI */
int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
{
@ -136,20 +142,26 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
switch (speed) {
case SPI_SPEED_100KHZ:
br /= 100000;
break;
case SPI_SPEED_400KHZ:
br /= 400000;
break;
case SPI_SPEED_1MHZ:
br /= 1000000;
break;
case SPI_SPEED_5MHZ:
br /= 5000000;
if (br < 2) { /* make sure the is not smaller then 2 */
br = 2;
}
break;
default:
/* other clock speeds are not supported */
return -1;
}
/* make sure the is not smaller then 2 */
if (br < 2) {
br = 2;
}
SPI_DEV->BR0 = (uint8_t)br;
SPI_DEV->BR1 = (uint8_t)(br >> 8);
/* release from software reset */
@ -157,7 +169,7 @@ int spi_init_master(spi_t dev, spi_conf_t conf, spi_speed_t speed)
return 0;
}
#endif /* UART_USE_USIC */
#endif /* SPI_USE_USCI */
int spi_init_slave(spi_t dev, spi_conf_t conf, char (*cb)(char data))
{

2
cpu/msp430fxyz/periph/uart.c
View File

@ -34,7 +34,7 @@ static void *ctx_isr_arg;
static int init_base(uart_t uart, uint32_t baudrate);
/* per default, we use the legacy MSP430 USART module for UART functionality */
#ifndef UART_USE_USIC
#ifndef UART_USE_USCI
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
{