cpu/stm32/periph/adc_f3: fix for devices which have only one ADC
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@ -28,6 +28,12 @@
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#define SMP_SLOW (0x2) /*< Sampling time for slow channels
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#define SMP_SLOW (0x2) /*< Sampling time for slow channels
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(0x2 = 4.5 ADC clock cycles) */
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(0x2 = 4.5 ADC clock cycles) */
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#ifdef ADC1_COMMON
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#define ADC_INSTANCE ADC1_COMMON
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#else
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#define ADC_INSTANCE ADC12_COMMON
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#endif
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/**
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/**
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* @brief Allocate locks for all available ADC devices
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* @brief Allocate locks for all available ADC devices
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*/
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*/
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@ -77,11 +83,11 @@ int adc_init(adc_t line)
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* prescaler is 1 */
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* prescaler is 1 */
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if (!(RCC->CFGR & RCC_CFGR_HPRE_3)) {
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if (!(RCC->CFGR & RCC_CFGR_HPRE_3)) {
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/* set ADC clock to HCLK/1 */
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/* set ADC clock to HCLK/1 */
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ADC12_COMMON->CCR |= ADC_CCR_CKMODE_0;
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ADC_INSTANCE->CCR |= ADC_CCR_CKMODE_0;
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}
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}
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else {
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else {
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/* set ADC clock to HCLK/2 otherwise */
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/* set ADC clock to HCLK/2 otherwise */
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ADC12_COMMON->CCR |= ADC_CCR_CKMODE_1;
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ADC_INSTANCE->CCR |= ADC_CCR_CKMODE_1;
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}
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}
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/* Configure the pin */
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/* Configure the pin */
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