diff --git a/cpu/stm32_common/periph/flash_common.c b/cpu/stm32_common/periph/flash_common.c index 61c6d8d10f..e254b99486 100644 --- a/cpu/stm32_common/periph/flash_common.c +++ b/cpu/stm32_common/periph/flash_common.c @@ -31,6 +31,10 @@ #define CNTRL_REG_LOCK (FLASH_PECR_PELOCK) #define KEY_REG (FLASH->PEKEYR) #else +#if defined(CPU_FAM_STM32L4) +#define FLASH_KEY1 ((uint32_t)0x45670123) +#define FLASH_KEY2 ((uint32_t)0xCDEF89AB) +#endif #define CNTRL_REG (FLASH->CR) #define CNTRL_REG_LOCK (FLASH_CR_LOCK) #define KEY_REG (FLASH->KEYR) diff --git a/cpu/stm32_common/periph/flashpage.c b/cpu/stm32_common/periph/flashpage.c index 9bbebd36ad..f7b8296902 100644 --- a/cpu/stm32_common/periph/flashpage.c +++ b/cpu/stm32_common/periph/flashpage.c @@ -41,9 +41,13 @@ #define FLASH_CR_PG (FLASH_PECR_FPRG | FLASH_PECR_PROG) #define FLASHPAGE_DIV (4U) /* write 4 bytes in one go */ #else +#if defined(CPU_FAM_STM32L4) +#define FLASHPAGE_DIV (8U) +#else +#define FLASHPAGE_DIV (2U) +#endif #define CNTRL_REG (FLASH->CR) #define CNTRL_REG_LOCK (FLASH_CR_LOCK) -#define FLASHPAGE_DIV (2U) #endif extern void _lock(void); @@ -78,7 +82,8 @@ static void _wait_for_pending_operations(void) static void _erase_page(void *page_addr) { -#if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) +#if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) || \ + defined(CPU_FAM_STM32L4) uint32_t *dst = page_addr; #else uint16_t *dst = page_addr; @@ -101,7 +106,25 @@ static void _erase_page(void *page_addr) #if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) DEBUG("[flashpage] erase: trigger the page erase\n"); *dst = (uint32_t)0; +#elif defined(CPU_FAM_STM32L4) + DEBUG("[flashpage] erase: setting the page address\n"); + CNTRL_REG |= FLASH_CR_PER; + uint8_t pn; +#if FLASHPAGE_NUMOF <= 256 + pn = (uint8_t)flashpage_page(dst); #else + uint16_t page = flashpage_page(dst); + if (page > 255) { + CNTRL_REG |= FLASH_CR_BKER; + } + else { + CNTRL_REG &= ~FLASH_CR_BKER; + } + pn = (uint8_t)page; +#endif + CNTRL_REG |= (uint32_t)(pn << FLASH_CR_PNB_Pos); + CNTRL_REG |= FLASH_CR_STRT; +#else /* CPU_FAM_STM32F0 || CPU_FAM_STM32F1 */ DEBUG("[flashpage] erase: setting the page address\n"); FLASH->AR = (uint32_t)dst; /* trigger the page erase and wait for it to be finished */ @@ -118,7 +141,8 @@ static void _erase_page(void *page_addr) /* lock the flash module again */ _lock(); -#if !(defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1)) +#if !(defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) || \ + defined(CPU_FAM_STM32L4)) /* restore the HSI state */ if (!hsi_state) { stmclk_disable_hsi(); @@ -143,6 +167,9 @@ void flashpage_write_raw(void *target_addr, const void *data, size_t len) #if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) uint32_t *dst = target_addr; const uint32_t *data_addr = data; +#elif defined(CPU_FAM_STM32L4) + uint64_t *dst = target_addr; + const uint64_t *data_addr = data; #else uint16_t *dst = (uint16_t *)target_addr; const uint16_t *data_addr = data; @@ -174,7 +201,8 @@ void flashpage_write_raw(void *target_addr, const void *data, size_t len) /* lock the flash module again */ _lock(); -#if !(defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1)) +#if !(defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) || \ + defined(CPU_FAM_STM32L4)) /* restore the HSI state */ if (!hsi_state) { stmclk_disable_hsi(); @@ -189,6 +217,8 @@ void flashpage_write(int page, const void *data) #if defined(CPU_FAM_STM32L0) || defined(CPU_FAM_STM32L1) /* STM32L0/L1 only supports word sizes */ uint32_t *page_addr = flashpage_addr(page); +#elif defined(CPU_FAM_STM32L4) + uint64_t *page_addr = flashpage_addr(page); #else /* Default is to support half-word sizes */ uint16_t *page_addr = flashpage_addr(page);