From a0b77de3dc013a35e596a2970a395c0a12fe59b6 Mon Sep 17 00:00:00 2001
From: Gunar Schorcht <gunar@schorcht.net>
Date: Thu, 2 Apr 2020 22:36:36 +0200
Subject: [PATCH] cpu/esp8266: move RTC_BSS_ATTR to cpu/esp_common

Since the attribute is required by EPS8266 as well as ESP32, it is moved to cpu/esp_common.
---
 cpu/esp8266/periph/rtt.c            | 3 +--
 cpu/esp_common/include/esp_common.h | 8 ++++++++
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/cpu/esp8266/periph/rtt.c b/cpu/esp8266/periph/rtt.c
index 482a9c4687..932fe1ee34 100644
--- a/cpu/esp8266/periph/rtt.c
+++ b/cpu/esp8266/periph/rtt.c
@@ -26,6 +26,7 @@
 #include "log.h"
 #include "periph/rtt.h"
 
+#include "esp_common.h"
 #include "esp/common_macros.h"
 #include "esp/dport_regs.h"
 #include "esp/rtc_regs.h"
@@ -33,8 +34,6 @@
 
 #define FRC2_CLK_DIV_256    2   /* divider for the 80 MHz AHB clock */
 
-#define RTC_BSS_ATTR __attribute__((section(".rtc.bss")))
-
 /**
  * FRC2 is a 32-bit countup timer, triggers interrupt when reaches alarm value.
  */
diff --git a/cpu/esp_common/include/esp_common.h b/cpu/esp_common/include/esp_common.h
index 1a855ea729..4190bf2429 100644
--- a/cpu/esp_common/include/esp_common.h
+++ b/cpu/esp_common/include/esp_common.h
@@ -48,6 +48,14 @@ extern "C" {
 #endif
 #endif /* ICACHE_FLASH */
 
+#ifndef RTC_BSS_ATTR
+#define RTC_BSS_ATTR __attribute__((section(".rtc.bss")))
+#endif
+
+#ifndef RTC_DATA_ATTR
+#define RTC_DATA_ATTR __attribute__((section(".rtc.data")))
+#endif
+
 /** Print out a message that function is not yet implementd */
 #define NOT_YET_IMPLEMENTED()     LOG_INFO("%s not yet implemented\n", __func__)
 /** Print out a message that function is not supported */