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Merge pull request #1827 from haukepetersen/fix_nrf_timer

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cpu/nrf51822: fixed timers
This commit is contained in:
Hauke Petersen 2014-11-12 13:21:44 +01:00
commit a3061bccc2
5 changed files with 108 additions and 173 deletions
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4
boards/pca10000/include/periph_conf.h
View File

@ -38,8 +38,8 @@ extern "C" {
/* Timer 0 configuration */ /* Timer 0 configuration */
#define TIMER_0_DEV NRF_TIMER0 #define TIMER_0_DEV NRF_TIMER0
#define TIMER_0_CHANNELS 3 #define TIMER_0_CHANNELS 3
#define TIMER_0_MAX_VALUE (0xffffffff) #define TIMER_0_MAX_VALUE (0xffffff)
#define TIMER_0_BITMODE TIMER_BITMODE_BITMODE_32Bit #define TIMER_0_BITMODE TIMER_BITMODE_BITMODE_24Bit
#define TIMER_0_ISR isr_timer0 #define TIMER_0_ISR isr_timer0
#define TIMER_0_IRQ TIMER0_IRQn #define TIMER_0_IRQ TIMER0_IRQn

4
boards/pca10005/include/periph_conf.h
View File

@ -38,8 +38,8 @@ extern "C" {
/* Timer 0 configuration */ /* Timer 0 configuration */
#define TIMER_0_DEV NRF_TIMER0 #define TIMER_0_DEV NRF_TIMER0
#define TIMER_0_CHANNELS 3 #define TIMER_0_CHANNELS 3
#define TIMER_0_MAX_VALUE (0xffffffff) #define TIMER_0_MAX_VALUE (0xffffff)
#define TIMER_0_BITMODE TIMER_BITMODE_BITMODE_32Bit #define TIMER_0_BITMODE TIMER_BITMODE_BITMODE_24Bit
#define TIMER_0_ISR isr_timer0 #define TIMER_0_ISR isr_timer0
#define TIMER_0_IRQ TIMER0_IRQn #define TIMER_0_IRQ TIMER0_IRQn

4
boards/yunjia-nrf51822/include/periph_conf.h
View File

@ -36,8 +36,8 @@ extern "C" {
/* Timer 0 configuration */ /* Timer 0 configuration */
#define TIMER_0_DEV NRF_TIMER0 #define TIMER_0_DEV NRF_TIMER0
#define TIMER_0_CHANNELS 3 #define TIMER_0_CHANNELS 3
#define TIMER_0_MAX_VALUE (0xffffffff) #define TIMER_0_MAX_VALUE (0xffffff)
#define TIMER_0_BITMODE TIMER_BITMODE_BITMODE_32Bit #define TIMER_0_BITMODE TIMER_BITMODE_BITMODE_24Bit /* only possible value for TIMER0 */
#define TIMER_0_ISR isr_timer0 #define TIMER_0_ISR isr_timer0
#define TIMER_0_IRQ TIMER0_IRQn #define TIMER_0_IRQ TIMER0_IRQn

2
cpu/nrf51822/include/hwtimer_cpu.h
View File

@ -26,7 +26,7 @@
#define HWTIMER_MAXTIMERS 3 /**< the CPU implementation supports 3 HW timers */ #define HWTIMER_MAXTIMERS 3 /**< the CPU implementation supports 3 HW timers */
#define HWTIMER_SPEED 1000000 /**< the HW timer runs with 1MHz */ #define HWTIMER_SPEED 1000000 /**< the HW timer runs with 1MHz */
#define HWTIMER_MAXTICKS (0xFFFFFFFF) /**< 32-bit timer */ #define HWTIMER_MAXTICKS (0xFFFFFF) /**< 24-bit timer -> see PAN note */
/** @} */ /** @} */

247
cpu/nrf51822/periph/timer.c
View File

@ -20,55 +20,79 @@
* @} * @}
*/ */
#include <stdlib.h>
#include <stdio.h>
#include "cpu.h" #include "cpu.h"
#include "board.h" #include "board.h"
#include "sched.h" #include "sched.h"
#include "thread.h" #include "thread.h"
#include "periph_conf.h" #include "periph_conf.h"
#include "periph/timer.h" #include "periph/timer.h"
#include "nrf51.h"
#include "nrf51_bitfields.h"
/**
* @name Flags to mark active channels
* @{
*/
#define TIMER_CH0 0x01
#define TIMER_CH1 0x02
#define TIMER_CH2 0x04
/** @} */
/**
* @brief struct for keeping track of a timer's state
*/
typedef struct { typedef struct {
void (*cb)(int); void (*cb)(int);
uint8_t flags;
} timer_conf_t; } timer_conf_t;
/** /**
* timer state memory * @brief timer state memory
*/ */
static timer_conf_t timer_config[TIMER_NUMOF]; static timer_conf_t timer_config[TIMER_NUMOF];
/**
* @brief static timer mapping
*/
static NRF_TIMER_Type *const timer[] = {
#if TIMER_0_EN
TIMER_0_DEV,
#endif
#if TIMER_1_EN
TIMER_1_DEV,
#endif
#if TIMER_2_EN
TIMER_2_DEV
#endif
};
int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int)) int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int))
{ {
NRF_TIMER_Type *timer; if (dev >= TIMER_NUMOF) {
return -1;
}
/* save callback */
timer_config[dev].cb = callback;
/* power on timer */
timer[dev]->POWER = 1;
switch (dev) { switch (dev) {
#if TIMER_0_EN #if TIMER_0_EN
case TIMER_0: case TIMER_0:
timer = TIMER_0_DEV; TIMER_0_DEV->BITMODE = TIMER_0_BITMODE;
timer->POWER = 1;
timer->BITMODE = TIMER_0_BITMODE;
NVIC_SetPriority(TIMER_0_IRQ, TIMER_IRQ_PRIO); NVIC_SetPriority(TIMER_0_IRQ, TIMER_IRQ_PRIO);
NVIC_EnableIRQ(TIMER_0_IRQ); NVIC_EnableIRQ(TIMER_0_IRQ);
break; break;
#endif #endif
#if TIMER_1_EN #if TIMER_1_EN
case TIMER_1: case TIMER_1:
timer = TIMER_1_DEV; TIMER_1_DEV->BITMODE = TIEMR_1_BITMODE;
timer->POWER = 1;
timer->BITMODE = TIEMR_1_BITMODE;
NVIC_SetPriority(TIMER_1_IRQ, TIMER_IRQ_PRIO); NVIC_SetPriority(TIMER_1_IRQ, TIMER_IRQ_PRIO);
NVIC_EnableIRQ(TIMER_1_IRQ); NVIC_EnableIRQ(TIMER_1_IRQ);
break; break;
#endif #endif
#if TIMER_2_EN #if TIMER_2_EN
case TIMER_2: case TIMER_2:
timer = TIMER_2_DEV; TIMER_2_DEV->BITMODE = TIMER_2_BITMODE;
timer->POWER = 1;
timer->BITMODE = TIMER_2_BITMODE;
NVIC_SetPriority(TIMER_2_IRQ, TIMER_IRQ_PRIO); NVIC_SetPriority(TIMER_2_IRQ, TIMER_IRQ_PRIO);
NVIC_EnableIRQ(TIMER_2_IRQ); NVIC_EnableIRQ(TIMER_2_IRQ);
break; break;
@ -77,43 +101,37 @@ int timer_init(tim_t dev, unsigned int ticks_per_us, void (*callback)(int))
return -1; return -1;
} }
/* save callback */ timer[dev]->TASKS_STOP = 1;
timer_config[dev].cb = callback; timer[dev]->MODE = TIMER_MODE_MODE_Timer; /* set the timer in Timer Mode. */
timer[dev]->TASKS_CLEAR = 1; /* clear the task first to be usable for later. */
timer->TASKS_STOP = 1;
timer->MODE = TIMER_MODE_MODE_Timer; /* set the timer in Timer Mode. */
timer->TASKS_CLEAR = 1; /* clear the task first to be usable for later. */
switch (ticks_per_us) { switch (ticks_per_us) {
case 1: case 1:
timer->PRESCALER = 4; timer[dev]->PRESCALER = 4;
break; break;
case 2: case 2:
timer->PRESCALER = 5; timer[dev]->PRESCALER = 5;
break; break;
case 4: case 4:
timer->PRESCALER = 6; timer[dev]->PRESCALER = 6;
break; break;
case 8: case 8:
timer->PRESCALER = 7; timer[dev]->PRESCALER = 7;
break; break;
case 16: case 16:
timer->PRESCALER = 8; timer[dev]->PRESCALER = 8;
break; break;
default: default:
return -1; return -1;
} }
/* clear all compare channels */ /* reset compare state */
timer->SHORTS = (TIMER_SHORTS_COMPARE0_CLEAR_Enabled << TIMER_SHORTS_COMPARE0_CLEAR_Pos); timer[dev]->EVENTS_COMPARE[0] = 0;
timer->SHORTS = (TIMER_SHORTS_COMPARE1_CLEAR_Enabled << TIMER_SHORTS_COMPARE1_CLEAR_Pos); timer[dev]->EVENTS_COMPARE[1] = 0;
timer->SHORTS = (TIMER_SHORTS_COMPARE2_CLEAR_Enabled << TIMER_SHORTS_COMPARE2_CLEAR_Pos); timer[dev]->EVENTS_COMPARE[2] = 0;
timer->SHORTS = (TIMER_SHORTS_COMPARE3_CLEAR_Enabled << TIMER_SHORTS_COMPARE3_CLEAR_Pos);
/* start the timer */ /* start the timer */
timer->TASKS_START = 1; timer[dev]->TASKS_START = 1;
return 0; return 0;
} }
@ -125,41 +143,25 @@ int timer_set(tim_t dev, int channel, unsigned int timeout)
int timer_set_absolute(tim_t dev, int channel, unsigned int value) int timer_set_absolute(tim_t dev, int channel, unsigned int value)
{ {
volatile NRF_TIMER_Type * timer; if (dev >= TIMER_NUMOF) {
/* get timer base register address */
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
timer = TIMER_0_DEV;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
timer = TIMER_1_DEV;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
timer = TIMER_2_DEV;
break;
#endif
case TIMER_UNDEFINED:
return -1; return -1;
} }
switch (channel) { switch (channel) {
case 0: case 0:
timer->CC[0] = value; timer[dev]->CC[0] = value;
timer->INTENSET |= TIMER_INTENSET_COMPARE0_Msk; timer_config[dev].flags |= TIMER_CH0;
timer[dev]->INTENSET |= TIMER_INTENSET_COMPARE0_Msk;
break; break;
case 1: case 1:
timer->CC[1] = value; timer[dev]->CC[1] = value;
timer->INTENSET |= TIMER_INTENSET_COMPARE1_Msk; timer_config[dev].flags |= TIMER_CH1;
timer[dev]->INTENSET |= TIMER_INTENSET_COMPARE1_Msk;
break; break;
case 2: case 2:
timer->CC[2] = value; timer[dev]->CC[2] = value;
timer->INTENSET |= TIMER_INTENSET_COMPARE2_Msk; timer_config[dev].flags |= TIMER_CH2;
timer[dev]->INTENSET |= TIMER_INTENSET_COMPARE2_Msk;
break; break;
default: default:
return -2; return -2;
@ -170,38 +172,23 @@ int timer_set_absolute(tim_t dev, int channel, unsigned int value)
int timer_clear(tim_t dev, int channel) int timer_clear(tim_t dev, int channel)
{ {
NRF_TIMER_Type *timer; if (dev >= TIMER_NUMOF) {
switch (dev) {
#if TIMER_0_EN
case TIMER_0:
timer = TIMER_0_DEV;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
timer = TIMER_1_DEV;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
timer = TIMER_2_DEV;
break;
#endif
case TIMER_UNDEFINED:
return -1; return -1;
} }
/* set timeout value */ /* set timeout value */
switch (channel) { switch (channel) {
case 0: case 0:
timer->INTENCLR = TIMER_INTENCLR_COMPARE0_Msk; timer_config[dev].flags &= ~TIMER_CH0;
timer[dev]->INTENCLR = TIMER_INTENCLR_COMPARE0_Msk;
break; break;
case 1: case 1:
timer->INTENCLR = TIMER_INTENCLR_COMPARE1_Msk; timer_config[dev].flags &= ~TIMER_CH1;
timer[dev]->INTENCLR = TIMER_INTENCLR_COMPARE1_Msk;
break; break;
case 2: case 2:
timer->INTENCLR = TIMER_INTENCLR_COMPARE2_Msk; timer_config[dev].flags &= ~TIMER_CH2;
timer[dev]->INTENCLR = TIMER_INTENCLR_COMPARE2_Msk;
break; break;
default: default:
return -2; return -2;
@ -212,70 +199,25 @@ int timer_clear(tim_t dev, int channel)
unsigned int timer_read(tim_t dev) unsigned int timer_read(tim_t dev)
{ {
switch (dev) { if (dev >= TIMER_NUMOF) {
#if TIMER_0_EN
case TIMER_0:
TIMER_0_DEV->TASKS_CAPTURE[3] = 1;
return TIMER_0_DEV->CC[3];
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV->TASKS_CAPTURE[3] = 1;
return TIMER_1_DEV->CC[3];
#endif
#if TIMER_2_EN
case TIMER_2:
TIMER_2_DEV->TASKS_CAPTURE[3] = 1;
return TIMER_2_DEV->CC[3];
#endif
case TIMER_UNDEFINED:
default:
return 0; return 0;
} }
timer[dev]->TASKS_CAPTURE[3] = 1;
return timer[dev]->CC[3];
} }
void timer_start(tim_t dev) void timer_start(tim_t dev)
{ {
switch (dev) { if (dev < TIMER_NUMOF) {
#if TIMER_0_EN timer[dev]->TASKS_START = 1;
case TIMER_0:
TIMER_0_DEV->TASKS_START = 1;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV->TASKS_START = 1;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
TIMER_2_DEV->TASKS_START = 1;
break;
#endif
case TIMER_UNDEFINED:
break;
} }
} }
void timer_stop(tim_t dev) { void timer_stop(tim_t dev)
switch (dev) { {
#if TIMER_0_EN if (dev < TIMER_NUMOF) {
case TIMER_0: timer[dev]->TASKS_STOP = 1;
TIMER_0_DEV->TASKS_STOP = 1;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV->TASKS_STOP = 1;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
TIMER_2_DEV->TASKS_STOP = 1;
break;
#endif
case TIMER_UNDEFINED:
break;
} }
} }
@ -327,24 +269,8 @@ void timer_irq_disable(tim_t dev)
void timer_reset(tim_t dev) void timer_reset(tim_t dev)
{ {
switch (dev) { if (dev < TIMER_NUMOF) {
#if TIMER_0_EN timer[dev]->TASKS_CLEAR = 1;
case TIMER_0:
TIMER_0_DEV->TASKS_CLEAR = 1;
break;
#endif
#if TIMER_1_EN
case TIMER_1:
TIMER_1_DEV->TASKS_CLEAR = 1;
break;
#endif
#if TIMER_2_EN
case TIMER_2:
TIMER_2_DEV->TASKS_CLEAR = 1;
break;
#endif
case TIMER_UNDEFINED:
break;
} }
} }
@ -354,10 +280,13 @@ void TIMER_0_ISR(void)
for(int i = 0; i < TIMER_0_CHANNELS; i++){ for(int i = 0; i < TIMER_0_CHANNELS; i++){
if(TIMER_0_DEV->EVENTS_COMPARE[i] == 1){ if(TIMER_0_DEV->EVENTS_COMPARE[i] == 1){
TIMER_0_DEV->EVENTS_COMPARE[i] = 0; TIMER_0_DEV->EVENTS_COMPARE[i] = 0;
if (timer_config[TIMER_0].flags & (1 << i)) {
timer_config[TIMER_0].flags &= ~(1 << i);
TIMER_0_DEV->INTENCLR = (1 << (16 + i)); TIMER_0_DEV->INTENCLR = (1 << (16 + i));
timer_config[TIMER_0].cb(i); timer_config[TIMER_0].cb(i);
} }
} }
}
if (sched_context_switch_request) { if (sched_context_switch_request) {
thread_yield(); thread_yield();
} }
@ -370,10 +299,13 @@ void TIMER_1_ISR(void)
for(int i = 0; i < TIMER_1_CHANNELS; i++){ for(int i = 0; i < TIMER_1_CHANNELS; i++){
if(TIMER_1_DEV->EVENTS_COMPARE[i] == 1){ if(TIMER_1_DEV->EVENTS_COMPARE[i] == 1){
TIMER_1_DEV->EVENTS_COMPARE[i] = 0; TIMER_1_DEV->EVENTS_COMPARE[i] = 0;
if (timer_config[TIMER_1].flags & (1 << i)) {
timer_config[TIMER_1].flags &= ~(1 << i);
TIMER_1_DEV->INTENCLR = (1 << (16 + i)); TIMER_1_DEV->INTENCLR = (1 << (16 + i));
timer_config[TIMER_1].cb(i); timer_config[TIMER_1].cb(i);
} }
} }
}
if (sched_context_switch_request) { if (sched_context_switch_request) {
thread_yield(); thread_yield();
} }
@ -386,10 +318,13 @@ void TIMER_2_ISR(void)
for(int i = 0; i < TIMER_2_CHANNELS; i++){ for(int i = 0; i < TIMER_2_CHANNELS; i++){
if(TIMER_2_DEV->EVENTS_COMPARE[i] == 1){ if(TIMER_2_DEV->EVENTS_COMPARE[i] == 1){
TIMER_2_DEV->EVENTS_COMPARE[i] = 0; TIMER_2_DEV->EVENTS_COMPARE[i] = 0;
if (timer_config[TIMER_2].flags & (1 << i)) {
timer_config[TIMER_2].flags &= ~(1 << i);
TIMER_2_DEV->INTENCLR = (1 << (16 + i)); TIMER_2_DEV->INTENCLR = (1 << (16 + i));
timer_config[TIMER_2].cb(i); timer_config[TIMER_2].cb(i);
} }
} }
}
if (sched_context_switch_request) { if (sched_context_switch_request) {
thread_yield(); thread_yield();
} }