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cpu/sam3: fixed to remove cppcheck warnings

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- fixed gpio driver
- fixed uart driver
This commit is contained in:
Hauke Petersen 2015-06-12 14:41:36 +02:00
parent d41c365632
commit a819fd6474
2 changed files with 12 additions and 6 deletions
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8
cpu/sam3/periph/gpio.c
View File

@ -264,6 +264,8 @@ int gpio_init(gpio_t dev, gpio_dir_t dir, gpio_pp_t pushpull)
PMC->PMC_PCER0 = (1 << GPIO_31_IRQ); PMC->PMC_PCER0 = (1 << GPIO_31_IRQ);
break; break;
#endif #endif
default:
return -2;
} }
/* give the PIO module the power over the corresponding pin */ /* give the PIO module the power over the corresponding pin */
@ -793,6 +795,8 @@ int gpio_read(gpio_t dev)
pin = GPIO_31_PIN; pin = GPIO_31_PIN;
break; break;
#endif #endif
default:
return -1;
} }
if (port->PIO_OSR & pin) { if (port->PIO_OSR & pin) {
@ -1656,6 +1660,7 @@ void isr_pioa(void)
gpio_config[GPIO_A31_MAP].cb(gpio_config[GPIO_A31_MAP].arg); gpio_config[GPIO_A31_MAP].cb(gpio_config[GPIO_A31_MAP].arg);
} }
#endif #endif
(void)status; /* added to suppress cppcheck warnings */
if (sched_context_switch_request) { if (sched_context_switch_request) {
thread_yield(); thread_yield();
} }
@ -1824,6 +1829,7 @@ void isr_piob(void)
gpio_config[GPIO_B31_MAP].cb(gpio_config[GPIO_B31_MAP].arg); gpio_config[GPIO_B31_MAP].cb(gpio_config[GPIO_B31_MAP].arg);
} }
#endif #endif
(void)status; /* added to suppress cppcheck warnings */
if (sched_context_switch_request) { if (sched_context_switch_request) {
thread_yield(); thread_yield();
} }
@ -1992,6 +1998,7 @@ void isr_pioc(void)
gpio_config[GPIO_C31_MAP].cb(gpio_config[GPIO_C31_MAP].arg); gpio_config[GPIO_C31_MAP].cb(gpio_config[GPIO_C31_MAP].arg);
} }
#endif #endif
(void)status; /* added to suppress cppcheck warnings */
if (sched_context_switch_request) { if (sched_context_switch_request) {
thread_yield(); thread_yield();
} }
@ -2160,6 +2167,7 @@ void isr_piod(void)
gpio_config[GPIO_D31_MAP].cb(gpio_config[GPIO_D31_MAP].arg); gpio_config[GPIO_D31_MAP].cb(gpio_config[GPIO_D31_MAP].arg);
} }
#endif #endif
(void)status; /* added to suppress cppcheck warnings */
if (sched_context_switch_request) { if (sched_context_switch_request) {
thread_yield(); thread_yield();
} }

10
cpu/sam3/periph/uart.c
View File

@ -95,8 +95,6 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, uart_tx_cb_t t
int uart_init_blocking(uart_t uart, uint32_t baudrate) int uart_init_blocking(uart_t uart, uint32_t baudrate)
{ {
uint16_t clock_divider = F_CPU / (16 * baudrate);
switch (uart) { switch (uart) {
#if UART_0_EN #if UART_0_EN
case UART_0: case UART_0:
@ -108,7 +106,7 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
UART_0_PORT->PIO_ABSR &= ~UART_0_PINS; /* periph function A */ UART_0_PORT->PIO_ABSR &= ~UART_0_PINS; /* periph function A */
/* set clock divider */ /* set clock divider */
UART_0_DEV->UART_BRGR = clock_divider; UART_0_DEV->UART_BRGR = (F_CPU / (16 * baudrate));
/* set to normal mode without parity */ /* set to normal mode without parity */
UART_0_DEV->UART_MR = UART_MR_PAR_NO | UART_MR_CHMODE_NORMAL; UART_0_DEV->UART_MR = UART_MR_PAR_NO | UART_MR_CHMODE_NORMAL;
/* enable receiver and transmitter and reset status bits */ /* enable receiver and transmitter and reset status bits */
@ -125,7 +123,7 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
UART_1_PORT->PIO_ABSR &= ~UART_1_PINS; /* periph function A */ UART_1_PORT->PIO_ABSR &= ~UART_1_PINS; /* periph function A */
/* set clock divider */ /* set clock divider */
UART_1_DEV->US_BRGR = clock_divider; UART_1_DEV->US_BRGR = (F_CPU / (16 * baudrate));
/* set to normal mode without parity */ /* set to normal mode without parity */
UART_1_DEV->US_MR = US_MR_CHRL_8_BIT | US_MR_PAR_NO; UART_1_DEV->US_MR = US_MR_CHRL_8_BIT | US_MR_PAR_NO;
/* enable receiver and transmitter and reset status bits */ /* enable receiver and transmitter and reset status bits */
@ -142,7 +140,7 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
UART_2_PORT->PIO_ABSR &= ~UART_2_PINS; /* periph function A */ UART_2_PORT->PIO_ABSR &= ~UART_2_PINS; /* periph function A */
/* set clock divider */ /* set clock divider */
UART_2_DEV->US_BRGR = clock_divider; UART_2_DEV->US_BRGR = (F_CPU / (16 * baudrate));
/* set to normal mode without parity */ /* set to normal mode without parity */
UART_2_DEV->US_MR = US_MR_CHRL_8_BIT | US_MR_PAR_NO; UART_2_DEV->US_MR = US_MR_CHRL_8_BIT | US_MR_PAR_NO;
/* enable receiver and transmitter and reset status bits */ /* enable receiver and transmitter and reset status bits */
@ -159,7 +157,7 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
UART_3_PORT->PIO_ABSR |= UART_3_PINS; /* periph function B */ UART_3_PORT->PIO_ABSR |= UART_3_PINS; /* periph function B */
/* set clock divider */ /* set clock divider */
UART_3_DEV->US_BRGR = clock_divider; UART_3_DEV->US_BRGR = (F_CPU / (16 * baudrate));
/* set to normal mode without parity */ /* set to normal mode without parity */
UART_3_DEV->US_MR = US_MR_CHRL_8_BIT | US_MR_PAR_NO; UART_3_DEV->US_MR = US_MR_CHRL_8_BIT | US_MR_PAR_NO;
/* enable receiver and transmitter and reset status bits */ /* enable receiver and transmitter and reset status bits */