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cpu/stm32*/ldscripts: remove all stm32 family linker scripts

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This commit is contained in:
kYc0o 2017-10-13 04:11:36 +02:00
parent 945d7f6887
commit ab60f9dc47
50 changed files with 0 additions and 1375 deletions
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27
cpu/stm32f0/ldscripts/stm32f030r8.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2016 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F030R8
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f0/ldscripts/stm32f031k6.ld
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/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F031K6
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 32K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f0/ldscripts/stm32f042k6.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2016 OTA keys
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F042K6
*
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 32K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 6K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f0/ldscripts/stm32f051r8.ld
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/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F051R8
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f0/ldscripts/stm32f070rb.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2016 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F070RB
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f0/ldscripts/stm32f072rb.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F072RB
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f0/ldscripts/stm32f091rc.ld
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/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f0
* @{
*
* @file
* @brief Memory definitions for the STM32F091RC
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 256K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f1/ldscripts/stm32f103c8.ld
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/*
* Copyright (C) 2015 Alexander Melnikov <avmelnikoff@gmail.com>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief Memory definitions for the STM32F103C8
*
* @author Alexander Melnikov <avmelnikoff@gmail.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld

29
cpu/stm32f1/ldscripts/stm32f103c8_bluepill.ld
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/*
* Copyright (C) 2015 Alexander Melnikov <avmelnikoff@gmail.com>
* 2017 HAW Hamburg
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief Memory definitions for the STM32F103C8
*
* @author Alexander Melnikov <avmelnikoff@gmail.com>
* @author Sebastian Meiling <s@mlng.net>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08002000, LENGTH = 64K-0x2000
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f1/ldscripts/stm32f103cb.ld
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/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief Memory definitions for the STM32F103CB
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f1/ldscripts/stm32f103cb_opencm904.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 INRIA
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief OpenCM9.04 specific definitions for the STM32F103CB
*
* @author Loïc Dauphin <loic.dauphin@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08003000, LENGTH = 128K-0x3000
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f1/ldscripts/stm32f103cb_sparkcore.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief Spark-core specific memory definitions for the STM32F103CB
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08005000, LENGTH = 128K-0x5000
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f1/ldscripts/stm32f103rb.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2015 TriaGnoSys GmbH
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief Memory definitions for the STM32F103RB
*
* @author Victor Ariño <victor.arino@triagnosys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f1/ldscripts/stm32f103re.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f1
* @{
*
* @file
* @brief Memory definitions for the STM32F103RE
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
}
INCLUDE cortexm_base.ld

29
cpu/stm32f2/ldscripts/stm32f205rg.ld
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@ -1,29 +0,0 @@
/*
* Copyright (C) 2015 Engineering-Spirit
* Copyright (C) 2016 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f2
* @{
*
* @file
* @brief Memory definitions for the STM32F205RG
*
* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f2/ldscripts/stm32f207zg.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2015 Engineering-Spirit
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f2
* @{
*
* @file
* @brief Memory definitions for the STM32F207ZG
*
* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld

29
cpu/stm32f2/ldscripts/stm32f215rg.ld
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@ -1,29 +0,0 @@
/*
* Copyright (C) 2015 Engineering-Spirit
* Copyright (C) 2016 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f2
* @{
*
* @file
* @brief Memory definitions for the STM32F215RG
*
* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld

29
cpu/stm32f2/ldscripts/stm32f215ve.ld
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@ -1,29 +0,0 @@
/*
* Copyright (C) 2015 Engineering-Spirit
* Copyright (C) 2016 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f2
* @{
*
* @file
* @brief Memory definitions for the STM32F215VG
*
* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld

29
cpu/stm32f2/ldscripts/stm32f215vg.ld
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@ -1,29 +0,0 @@
/*
* Copyright (C) 2015 Engineering-Spirit
* Copyright (C) 2016 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f2
* @{
*
* @file
* @brief Memory definitions for the STM32F215VG
*
* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld

29
cpu/stm32f2/ldscripts/stm32f217zg.ld
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@ -1,29 +0,0 @@
/*
* Copyright (C) 2015 Engineering-Spirit
* Copyright (C) 2016 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f2
* @{
*
* @file
* @brief Memory definitions for the STM32F217ZG
*
* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f3/ldscripts/stm32f302r8.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f3
* @{
*
* @file
* @brief Memory definitions for the STM32F302R8
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f3/ldscripts/stm32f303k8.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f3
* @{
*
* @file
* @brief Memory definitions for the STM32F303K8
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
}
INCLUDE cortexm_base.ld

30
cpu/stm32f3/ldscripts/stm32f303re.ld
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@ -1,30 +0,0 @@
/*
* Copyright (C) 2015 Freie Universität Berlin
* Copyright (C) 2014 Hamburg University of Applied Sciences
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f3
* @{
*
* @file
* @brief Memory definitions for the STM32F303RE
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Katja Kirstein <katja.kirstein@haw-hamburg.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 16K
}
INCLUDE cortexm_base.ld

28
cpu/stm32f3/ldscripts/stm32f303vc.ld
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@ -1,28 +0,0 @@
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f3
* @{
*
* @file
* @brief Memory definitions for the STM32F303VC
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 256K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 40K
ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 8K
}
INCLUDE cortexm_base.ld

28
cpu/stm32f3/ldscripts/stm32f303ze.ld
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@ -1,28 +0,0 @@
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f3
* @{
*
* @file
* @brief Memory definitions for the STM32F303ZE
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 16K
}
INCLUDE cortexm_base.ld

28
cpu/stm32f3/ldscripts/stm32f334r8.ld
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@ -1,28 +0,0 @@
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f3
* @{
*
* @file
* @brief Memory definitions for the STM32F334R8
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 12K
ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 4K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f4/ldscripts/stm32f401re.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2015 Lari Lehtomäki
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f4
* @{
*
* @file
* @brief Memory definitions for the STM32F401xE
*
* @author Lari Lehtomäki <lari@lehtomaki.fi>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K
}
INCLUDE cortexm_base.ld

28
cpu/stm32f4/ldscripts/stm32f407vg.ld
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@ -1,28 +0,0 @@
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f4
* @{
*
* @file
* @brief Memory definitions for the STM32F407VG
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 64K
}
INCLUDE cortexm_base.ld

29
cpu/stm32f4/ldscripts/stm32f410rb.ld
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@ -1,29 +0,0 @@
/*
* Copyright (C) 2016 Freie Universität Berlin
* 2016 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f4
* @{
*
* @file
* @brief Memory definitions for the STM32F410RB
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f4/ldscripts/stm32f411re.ld
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@ -1,27 +0,0 @@
/*
* Copyright (C) 2016 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f4
* @{
*
* @file
* @brief Memory definitions for the STM32F411RE
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld

29
cpu/stm32f4/ldscripts/stm32f412zg.ld
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@ -1,29 +0,0 @@
/*
* Copyright (C) 2015-2017 Freie Universität Berlin
* 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f4
* @{
*
* @file
* @brief Memory definitions for the STM32F412ZG
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f4/ldscripts/stm32f413vg.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f4
* @{
*
* @file
* @brief Memory definitions for the STM32F413VG
*
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1M
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 320K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f4/ldscripts/stm32f413zh.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f4
* @{
*
* @file
* @brief Memory definitions for the STM32F413ZH
*
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1536K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 320K
}
INCLUDE cortexm_base.ld

28
cpu/stm32f4/ldscripts/stm32f415rg.ld
View File

@ -1,28 +0,0 @@
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f4
* @{
*
* @file
* @brief Memory definitions for the STM32F415RG
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 64K
}
INCLUDE cortexm_base.ld

28
cpu/stm32f4/ldscripts/stm32f429zi.ld
View File

@ -1,28 +0,0 @@
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f4
* @{
*
* @file
* @brief Memory definitions for the STM32F429ZI
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 2M
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 64K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f4/ldscripts/stm32f446re.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2016 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f4
* @{
*
* @file
* @brief Memory definitions for the STM32F446RE
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f4/ldscripts/stm32f446ze.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f4
* @{
*
* @file
* @brief Memory definitions for the STM32F446ZE
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f7/ldscripts/stm32f722ze.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f7
* @{
*
* @file
* @brief Memory definitions for the STM32F722ZE
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 256K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f7/ldscripts/stm32f746zg.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32l4
* @{
*
* @file
* @brief Memory definitions for the STM32F746ZG
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 320K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f7/ldscripts/stm32f767zi.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f7
* @{
*
* @file
* @brief Memory definitions for the STM32F767ZI
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 2M
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 512K
}
INCLUDE cortexm_base.ld

27
cpu/stm32f7/ldscripts/stm32f769ni.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 OTA keys S.A.
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32f7
* @{
*
* @file
* @brief Memory definitions for the STM32F769NI
*
* @author Vincent Dupont <vincent@otakeys.com>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 512K
}
INCLUDE cortexm_base.ld

27
cpu/stm32l0/ldscripts/stm32l031k6.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32l0
* @{
*
* @file
* @brief Memory definitions for the STM32L031K6
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 32K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K
}
INCLUDE cortexm_base.ld

27
cpu/stm32l0/ldscripts/stm32l053r8.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32l0
* @{
*
* @file
* @brief Memory definitions for the STM32L053R8
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K
}
INCLUDE cortexm_base.ld

27
cpu/stm32l0/ldscripts/stm32l072cz.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32l0
* @{
*
* @file
* @brief Memory definitions for the STM32L072CZ
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 192K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld

27
cpu/stm32l0/ldscripts/stm32l073rz.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32l0
* @{
*
* @file
* @brief Memory definitions for the STM32L073RZ
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 192K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
}
INCLUDE cortexm_base.ld

27
cpu/stm32l1/ldscripts/stm32l151rba.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2015 Engineering-Spirit
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32l1
* @{
*
* @file
* @brief Memory definitions for the STM32L151RB-A
*
* @author Nick van IJzendoorn <nijzendoorn@engineering-spirit.nl>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K
ram (rw) : ORIGIN = 0x20000000, LENGTH = 32K
}
INCLUDE cortexm_base.ld

27
cpu/stm32l1/ldscripts/stm32l151rc.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2015 Hamburg University of Applied Sciences
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32l1
* @{
*
* @file
* @brief Memory definitions for the STM32L151RC
*
* @author Katja Kirstein <katja.kirstein@haw-hamburg.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 256K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
}
INCLUDE cortexm_base.ld

27
cpu/stm32l1/ldscripts/stm32l152ret6.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2015 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32l1
* @{
*
* @file
* @brief Memory definitions for the STM32L152RET6
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K
ram (xrw) : ORIGIN = 0x20000000, LENGTH = 80K
}
INCLUDE cortexm_base.ld

27
cpu/stm32l4/ldscripts/stm32l432kc.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32l4
* @{
*
* @file
* @brief Memory definitions for the STM32L432KC
*
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 256K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
}
INCLUDE cortexm_base.ld

27
cpu/stm32l4/ldscripts/stm32l476rg.ld
View File

@ -1,27 +0,0 @@
/*
* Copyright (C) 2017 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @addtogroup cpu_stm32l4
* @{
*
* @file
* @brief Memory definitions for the STM32L476RG
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
MEMORY
{
rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
}
INCLUDE cortexm_base.ld