From 4e9420bffcca2b4d6d5e0ab236f6aeb04ef93ba4 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Wed, 3 Jun 2020 16:44:50 +0200 Subject: [PATCH 1/5] drivers/at86rf215: prefix configuration defines with CONFIG_ --- drivers/at86rf215/at86rf215.c | 16 ++++++++-------- drivers/include/at86rf215.h | 28 ++++++++++++++++++---------- 2 files changed, 26 insertions(+), 18 deletions(-) diff --git a/drivers/at86rf215/at86rf215.c b/drivers/at86rf215/at86rf215.c index c96eae59a2..9f5f9c9f2e 100644 --- a/drivers/at86rf215/at86rf215.c +++ b/drivers/at86rf215/at86rf215.c @@ -66,9 +66,9 @@ void at86rf215_reset_and_cfg(at86rf215_t *dev) luid_get_eui64((eui64_t *)&dev->netdev.long_addr); if (is_subGHz(dev)) { - dev->netdev.chan = AT86RF215_DEFAULT_SUBGHZ_CHANNEL; + dev->netdev.chan = CONFIG_AT86RF215_DEFAULT_SUBGHZ_CHANNEL; } else { - dev->netdev.chan = AT86RF215_DEFAULT_CHANNEL; + dev->netdev.chan = CONFIG_AT86RF215_DEFAULT_CHANNEL; } dev->netdev.pan = CONFIG_IEEE802154_DEFAULT_PANID; @@ -144,14 +144,14 @@ if (!IS_ACTIVE(CONFIG_AT86RF215_USE_CLOCK_OUTPUT)){ at86rf215_reg_write(dev, dev->BBC->RG_AMCS, reg); - if (AT86RF215_DEFAULT_PHY_MODE == IEEE802154_PHY_OQPSK) { + if (CONFIG_AT86RF215_DEFAULT_PHY_MODE == IEEE802154_PHY_OQPSK) { at86rf215_configure_legacy_OQPSK(dev, 0); } - if (AT86RF215_DEFAULT_PHY_MODE == IEEE802154_PHY_MR_OQPSK) { - at86rf215_configure_OQPSK(dev, AT86RF215_DEFAULT_MR_OQPSK_CHIPS, - AT86RF215_DEFAULT_MR_OQPSK_RATE); + if (CONFIG_AT86RF215_DEFAULT_PHY_MODE == IEEE802154_PHY_MR_OQPSK) { + at86rf215_configure_OQPSK(dev, CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS, + CONFIG_AT86RF215_DEFAULT_MR_OQPSK_RATE); } - if (AT86RF215_DEFAULT_PHY_MODE == IEEE802154_PHY_MR_OFDM) { + if (CONFIG_AT86RF215_DEFAULT_PHY_MODE == IEEE802154_PHY_MR_OFDM) { at86rf215_configure_OFDM(dev, CONFIG_AT86RF215_DEFAULT_MR_OFDM_OPT, CONFIG_AT86RF215_DEFAULT_MR_OFDM_MCS); } @@ -169,7 +169,7 @@ if (!IS_ACTIVE(CONFIG_AT86RF215_USE_CLOCK_OUTPUT)){ at86rf215_set_pan(dev, 0, dev->netdev.pan); /* set default TX power */ - at86rf215_set_txpower(dev, AT86RF215_DEFAULT_TXPOWER); + at86rf215_set_txpower(dev, CONFIG_AT86RF215_DEFAULT_TXPOWER); /* start listening for incoming packets */ at86rf215_rf_cmd(dev, CMD_RF_RX); diff --git a/drivers/include/at86rf215.h b/drivers/include/at86rf215.h index fec7f0d76e..4a80d6cbaa 100644 --- a/drivers/include/at86rf215.h +++ b/drivers/include/at86rf215.h @@ -100,22 +100,26 @@ enum { */ #define CONFIG_AT86RF215_TRIM_VAL (0) #endif -/** @} */ /** * @name Channel configuration * @{ */ -#define AT86RF215_DEFAULT_CHANNEL (CONFIG_IEEE802154_DEFAULT_CHANNEL) -#define AT86RF215_DEFAULT_SUBGHZ_CHANNEL (CONFIG_IEEE802154_DEFAULT_SUBGHZ_CHANNEL) +#ifndef CONFIG_AT86RF215_DEFAULT_CHANNEL +#define CONFIG_AT86RF215_DEFAULT_CHANNEL (CONFIG_IEEE802154_DEFAULT_CHANNEL) +#endif + +#ifndef CONFIG_AT86RF215_DEFAULT_SUBGHZ_CHANNEL +#define CONFIG_AT86RF215_DEFAULT_SUBGHZ_CHANNEL (CONFIG_IEEE802154_DEFAULT_SUBGHZ_CHANNEL) +#endif /** @} */ /** * @name Default PHY Mode * @{ */ -#ifndef AT86RF215_DEFAULT_PHY_MODE -#define AT86RF215_DEFAULT_PHY_MODE (IEEE802154_PHY_OQPSK) +#ifndef CONFIG_AT86RF215_DEFAULT_PHY_MODE +#define CONFIG_AT86RF215_DEFAULT_PHY_MODE (IEEE802154_PHY_OQPSK) #endif /** @} */ @@ -123,8 +127,8 @@ enum { * @name Default MR-O-QPSK Chip Rate * @{ */ -#ifndef AT86RF215_DEFAULT_MR_OQPSK_CHIPS -#define AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_1000) +#ifndef CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS +#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_1000) #endif /** @} */ @@ -132,8 +136,8 @@ enum { * @name Default MR-O-QPSK Rate Mode * @{ */ -#ifndef AT86RF215_DEFAULT_MR_OQPSK_RATE -#define AT86RF215_DEFAULT_MR_OQPSK_RATE (2) +#ifndef CONFIG_AT86RF215_DEFAULT_MR_OQPSK_RATE +#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_RATE (2) #endif /** @} */ @@ -158,7 +162,11 @@ enum { /** * @brief Default TX power (0dBm) */ -#define AT86RF215_DEFAULT_TXPOWER (CONFIG_IEEE802154_DEFAULT_TXPOWER) +#ifndef CONFIG_AT86RF215_DEFAULT_TXPOWER +#define CONFIG_AT86RF215_DEFAULT_TXPOWER (CONFIG_IEEE802154_DEFAULT_TXPOWER) +#endif + +/** @} */ /** * @name Flags for device internal states (see datasheet) From feba1d1bcbbb8aa2ef6d7ab4692202a2d5990e99 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Wed, 3 Jun 2020 17:21:22 +0200 Subject: [PATCH 2/5] drivers/at86rf215: don't compile modulations that are not selected Don't compile in code for MR-OFDM, etc if `netdev_ieee802154_mr_oqpsk` is disabled. --- drivers/at86rf215/at86rf215_netdev.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/at86rf215/at86rf215_netdev.c b/drivers/at86rf215/at86rf215_netdev.c index b6facd775b..fe8be05a7b 100644 --- a/drivers/at86rf215/at86rf215_netdev.c +++ b/drivers/at86rf215/at86rf215_netdev.c @@ -394,6 +394,7 @@ static int _get(netdev_t *netdev, netopt_t opt, void *val, size_t max_len) res = max_len; break; +#ifdef MODULE_NETDEV_IEEE802154_MR_OFDM case NETOPT_MR_OFDM_OPTION: assert(max_len >= sizeof(int8_t)); *((int8_t *)val) = at86rf215_OFDM_get_option(dev); @@ -405,7 +406,8 @@ static int _get(netdev_t *netdev, netopt_t opt, void *val, size_t max_len) *((int8_t *)val) = at86rf215_OFDM_get_scheme(dev); res = max_len; break; - +#endif /* MODULE_NETDEV_IEEE802154_MR_OFDM */ +#ifdef MODULE_NETDEV_IEEE802154_MR_OQPSK case NETOPT_MR_OQPSK_CHIPS: assert(max_len >= sizeof(int16_t)); switch (at86rf215_OQPSK_get_chips(dev)) { @@ -422,13 +424,14 @@ static int _get(netdev_t *netdev, netopt_t opt, void *val, size_t max_len) *((int8_t *)val) = at86rf215_OQPSK_get_mode(dev); res = max_len; break; - +#endif /* MODULE_NETDEV_IEEE802154_MR_OQPSK */ +#ifdef MODULE_NETDEV_IEEE802154_OQPSK case NETOPT_OQPSK_RATE: assert(max_len >= sizeof(int8_t)); *((int8_t *)val) = at86rf215_OQPSK_get_mode_legacy(dev); res = max_len; break; - +#endif /* MODULE_NETDEV_IEEE802154_OQPSK */ default: res = -ENOTSUP; break; @@ -576,27 +579,34 @@ static int _set(netdev_t *netdev, netopt_t opt, const void *val, size_t len) case NETOPT_IEEE802154_PHY: assert(len <= sizeof(uint8_t)); switch (*(uint8_t *)val) { +#ifdef MODULE_NETDEV_IEEE802154_OQPSK case IEEE802154_PHY_OQPSK: at86rf215_configure_legacy_OQPSK(dev, at86rf215_OQPSK_get_mode_legacy(dev)); res = sizeof(uint8_t); break; +#endif /* MODULE_NETDEV_IEEE802154_OQPSK */ +#ifdef MODULE_NETDEV_IEEE802154_MR_OQPSK case IEEE802154_PHY_MR_OQPSK: at86rf215_configure_OQPSK(dev, at86rf215_OQPSK_get_chips(dev), at86rf215_OQPSK_get_mode(dev)); res = sizeof(uint8_t); break; +#endif /* MODULE_NETDEV_IEEE802154_MR_OQPSK */ +#ifdef MODULE_NETDEV_IEEE802154_MR_OFDM case IEEE802154_PHY_MR_OFDM: at86rf215_configure_OFDM(dev, at86rf215_OFDM_get_option(dev), at86rf215_OFDM_get_scheme(dev)); res = sizeof(uint8_t); break; +#endif /* MODULE_NETDEV_IEEE802154_MR_OFDM */ default: return -ENOTSUP; } break; +#ifdef MODULE_NETDEV_IEEE802154_MR_OFDM case NETOPT_MR_OFDM_OPTION: if (at86rf215_get_phy_mode(dev) != IEEE802154_PHY_MR_OFDM) { return -ENOTSUP; @@ -622,7 +632,8 @@ static int _set(netdev_t *netdev, netopt_t opt, const void *val, size_t len) res = -ERANGE; } break; - +#endif /* MODULE_NETDEV_IEEE802154_MR_OFDM */ +#ifdef MODULE_NETDEV_IEEE802154_MR_OQPSK case NETOPT_MR_OQPSK_CHIPS: if (at86rf215_get_phy_mode(dev) != IEEE802154_PHY_MR_OQPSK) { return -ENOTSUP; @@ -662,7 +673,8 @@ static int _set(netdev_t *netdev, netopt_t opt, const void *val, size_t len) res = -ERANGE; } break; - +#endif /* MODULE_NETDEV_IEEE802154_MR_OQPSK */ +#ifdef MODULE_NETDEV_IEEE802154_OQPSK case NETOPT_OQPSK_RATE: if (at86rf215_get_phy_mode(dev) != IEEE802154_PHY_OQPSK) { return -ENOTSUP; @@ -675,7 +687,7 @@ static int _set(netdev_t *netdev, netopt_t opt, const void *val, size_t len) res = -ERANGE; } break; - +#endif /* MODULE_NETDEV_IEEE802154_OQPSK */ default: break; } From 1ab35b16aeb4e571721a5d9a97b09c313a00f03b Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Thu, 4 Jun 2020 18:26:54 +0200 Subject: [PATCH 3/5] drivers/at86rf215: include board.h Board-specific configuration is typically defined in board.h, so include it here so it gets applied. --- drivers/at86rf215/at86rf215.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/at86rf215/at86rf215.c b/drivers/at86rf215/at86rf215.c index 9f5f9c9f2e..9b24876f62 100644 --- a/drivers/at86rf215/at86rf215.c +++ b/drivers/at86rf215/at86rf215.c @@ -18,6 +18,7 @@ */ #include "luid.h" +#include "board.h" #include "byteorder.h" #include "net/ieee802154.h" #include "net/gnrc.h" From 6a2d9f9762a3b00d5828f10ae2f74038ec5ba285 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Mon, 8 Jun 2020 20:43:41 +0200 Subject: [PATCH 4/5] drivers/at86rf215: make default O-QPSK rate configutable --- drivers/at86rf215/at86rf215.c | 2 +- drivers/include/at86rf215.h | 10 ++++++++++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/at86rf215/at86rf215.c b/drivers/at86rf215/at86rf215.c index 9b24876f62..df78e98d70 100644 --- a/drivers/at86rf215/at86rf215.c +++ b/drivers/at86rf215/at86rf215.c @@ -146,7 +146,7 @@ if (!IS_ACTIVE(CONFIG_AT86RF215_USE_CLOCK_OUTPUT)){ at86rf215_reg_write(dev, dev->BBC->RG_AMCS, reg); if (CONFIG_AT86RF215_DEFAULT_PHY_MODE == IEEE802154_PHY_OQPSK) { - at86rf215_configure_legacy_OQPSK(dev, 0); + at86rf215_configure_legacy_OQPSK(dev, CONFIG_AT86RF215_DEFAULT_OQPSK_RATE); } if (CONFIG_AT86RF215_DEFAULT_PHY_MODE == IEEE802154_PHY_MR_OQPSK) { at86rf215_configure_OQPSK(dev, CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS, diff --git a/drivers/include/at86rf215.h b/drivers/include/at86rf215.h index 4a80d6cbaa..9db34dd2bd 100644 --- a/drivers/include/at86rf215.h +++ b/drivers/include/at86rf215.h @@ -123,6 +123,16 @@ enum { #endif /** @} */ +/** + * @name Default O-QPSK Rate Mode + * Non-zero value enables proprietary high data rate by default + * @{ + */ +#ifndef CONFIG_AT86RF215_DEFAULT_OQPSK_RATE +#define CONFIG_AT86RF215_DEFAULT_OQPSK_RATE (0) +#endif +/** @} */ + /** * @name Default MR-O-QPSK Chip Rate * @{ From 93236e0f2c58d223a37f253dfa997397173dd133 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Mon, 8 Jun 2020 23:04:50 +0200 Subject: [PATCH 5/5] drivers/at86rf215: add modulation config to KConfig --- drivers/at86rf215/Kconfig | 94 +++++++++++++++++++++++++++++++++++++ drivers/include/at86rf215.h | 20 +++++++- 2 files changed, 113 insertions(+), 1 deletion(-) diff --git a/drivers/at86rf215/Kconfig b/drivers/at86rf215/Kconfig index d82d6d43ca..063bd09ab2 100644 --- a/drivers/at86rf215/Kconfig +++ b/drivers/at86rf215/Kconfig @@ -38,4 +38,98 @@ config AT86RF215_TRIM_VAL 26 MHz the best. For more information Refer Table 6-25 TRIM in Datasheet +choice + prompt "Default Modulation" + +config AT86RF215_DEFAULT_LEGACY_OQPSK + bool "legacy O-QPSK" + help + O-QPSK compatible with IEEE 802.15.4-2003 devices + +config AT86RF215_DEFAULT_MR_OQPSK + bool "MR-O-QPSK" + help + MR-O-QPSK according to IEEE 802.15.4g + +config AT86RF215_DEFAULT_MR_OFDM + bool "MR-OFDM" + help + MR-O-OFDM according to IEEE 802.15.4g + +endchoice + +menu "O-QPSK (802.15.4) configuration" + depends on AT86RF215_DEFAULT_LEGACY_OQPSK + +config AT86RF215_DEFAULT_OQPSK_RATE + int "Default (legacy) O-QPSK rate mode" + range 0 1 + default 0 + help + The at86rf215 supports proprietary high data rates that are compatible + with the at86rf2xx parts. + Set this to 1 to configure the proprietary high-data rate option as default. + If unsure, leave this at 0. + +endmenu # legacy O-QPSK + +menu "MR-O-QPSK (802.15.4g) configuration" + depends on AT86RF215_DEFAULT_MR_OQPSK + +config AT86RF215_DEFAULT_MR_OQPSK_RATE + int "Default MR-O-QPSK rate mode" + range 0 3 + default 2 + help + Default Rate Mode of the MR-O-QPSK PHY + Each increment doubles the PSDU data rate. + +choice + prompt "Default MR-O-QPSK Chip Rate" + +config AT86RF215_DEFAULT_MR_OQPSK_CHIPS_100 + bool "100 kchip/s" + +config AT86RF215_DEFAULT_MR_OQPSK_CHIPS_200 + bool "200 kchip/s" + +config AT86RF215_DEFAULT_MR_OQPSK_CHIPS_1000 + bool "1000 kchip/s" + +config AT86RF215_DEFAULT_MR_OQPSK_CHIPS_2000 + bool "2000 kchip/s" + +endchoice + +endmenu # MR-O-QPSK + +menu "MR-OFDM (802.15.4g) configuration" + depends on AT86RF215_DEFAULT_MR_OFDM + +config AT86RF215_DEFAULT_MR_OFDM_OPT + int "Default MR-OFDM option" + range 1 4 + default 2 + help + Default Option of the MR-OFDM PHY + Each increment halves the PSDU data rate. + +config AT86RF215_DEFAULT_MR_OFDM_MCS + int "Default MR-OFDM Modulation & Coding Scheme" + range 0 6 + default 2 + help + Default Modulation & Coding Scheme of the MR-OFDM PHY. + Higher schemes correspond to higher data rates and lower range. + + 0: BPSK, rate 1⁄2, 4 x frequency repetition + 1: BPSK, rate 1⁄2, 2 x frequency repetition + 2: QPSK, rate 1⁄2, 2 x frequency repetition + 3: QPSK, rate 1⁄2 + 4: QPSK, rate 3⁄4 + 5: 16-QAM, rate 1⁄2 + 6: 16-QAM, rate 3⁄4 + +endmenu + endif # KCONFIG_MODULE_AT86RF215 diff --git a/drivers/include/at86rf215.h b/drivers/include/at86rf215.h index 9db34dd2bd..2171ac1272 100644 --- a/drivers/include/at86rf215.h +++ b/drivers/include/at86rf215.h @@ -118,8 +118,16 @@ enum { * @name Default PHY Mode * @{ */ +#if IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_LEGACY_OQPSK) +#define CONFIG_AT86RF215_DEFAULT_PHY_MODE (IEEE802154_PHY_OQPSK) +#elif IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_MR_OQPSK) +#define CONFIG_AT86RF215_DEFAULT_PHY_MODE (IEEE802154_PHY_MR_OQPSK) +#elif IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_MR_OFDM) +#define CONFIG_AT86RF215_DEFAULT_PHY_MODE (IEEE802154_PHY_MR_OFDM) +#endif + #ifndef CONFIG_AT86RF215_DEFAULT_PHY_MODE -#define CONFIG_AT86RF215_DEFAULT_PHY_MODE (IEEE802154_PHY_OQPSK) +#define CONFIG_AT86RF215_DEFAULT_PHY_MODE (IEEE802154_PHY_OQPSK) #endif /** @} */ @@ -137,6 +145,16 @@ enum { * @name Default MR-O-QPSK Chip Rate * @{ */ +#if IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS_100) +#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_100) +#elif IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS_200) +#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_200) +#elif IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS_1000) +#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_1000) +#elif IS_ACTIVE(CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS_2000) +#define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_2000) +#endif + #ifndef CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS #define CONFIG_AT86RF215_DEFAULT_MR_OQPSK_CHIPS (AT86RF215_FCHIP_1000) #endif