From a90016740c8a5c2af2c644b08dd88e59bca3c8e4 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Thu, 29 Oct 2020 17:30:22 +0100 Subject: [PATCH 1/5] cpu/stm32/clk/f2f4f7: add config for 25 MHz HSE --- cpu/stm32/include/clk/f2f4f7/cfg_clock_default_84.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_84.h b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_84.h index c38f4ccbf3..502755302d 100644 --- a/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_84.h +++ b/cpu/stm32/include/clk/f2f4f7/cfg_clock_default_84.h @@ -33,14 +33,20 @@ extern "C" { * @name Clock PLL settings (84MHz) * @{ */ -/* The following parameters configure a 84MHz system clock with HSE (8MHz or - 16MHz) or HSI (16MHz) as PLL input clock */ +/* The following parameters configure a 84MHz system clock with HSE (8MHz, 16MHz + or 25MHz) or HSI (16MHz) as PLL input clock */ #ifndef CONFIG_CLOCK_PLL_M +#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25)) +#define CONFIG_CLOCK_PLL_M (25) +#else #define CONFIG_CLOCK_PLL_M (4) #endif +#endif #ifndef CONFIG_CLOCK_PLL_N #if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(8)) #define CONFIG_CLOCK_PLL_N (168) +#elif IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(25)) +#define CONFIG_CLOCK_PLL_N (336) #else #define CONFIG_CLOCK_PLL_N (84) #endif From e200d009ad8767901110d2d6ac4a4950cd8f85f1 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Thu, 8 Oct 2020 20:53:56 +0200 Subject: [PATCH 2/5] boards/common/weact-f4x1cx: create common WeAct boards dir --- boards/common/weact-f4x1cx/Kconfig | 19 ++ boards/common/weact-f4x1cx/Makefile | 3 + boards/common/weact-f4x1cx/Makefile.dep | 15 ++ boards/common/weact-f4x1cx/Makefile.features | 14 ++ boards/common/weact-f4x1cx/Makefile.include | 15 ++ boards/common/weact-f4x1cx/board.c | 64 ++++++ boards/common/weact-f4x1cx/doc.txt | 6 + boards/common/weact-f4x1cx/include/board.h | 94 +++++++++ .../common/weact-f4x1cx/include/gpio_params.h | 53 +++++ .../common/weact-f4x1cx/include/periph_conf.h | 192 ++++++++++++++++++ 10 files changed, 475 insertions(+) create mode 100644 boards/common/weact-f4x1cx/Kconfig create mode 100644 boards/common/weact-f4x1cx/Makefile create mode 100644 boards/common/weact-f4x1cx/Makefile.dep create mode 100644 boards/common/weact-f4x1cx/Makefile.features create mode 100644 boards/common/weact-f4x1cx/Makefile.include create mode 100644 boards/common/weact-f4x1cx/board.c create mode 100644 boards/common/weact-f4x1cx/doc.txt create mode 100644 boards/common/weact-f4x1cx/include/board.h create mode 100644 boards/common/weact-f4x1cx/include/gpio_params.h create mode 100644 boards/common/weact-f4x1cx/include/periph_conf.h diff --git a/boards/common/weact-f4x1cx/Kconfig b/boards/common/weact-f4x1cx/Kconfig new file mode 100644 index 0000000000..0671430d6b --- /dev/null +++ b/boards/common/weact-f4x1cx/Kconfig @@ -0,0 +1,19 @@ +# Copyright (c) 2020 Benjamin Valentin +# +# This file is subject to the terms and conditions of the GNU Lesser +# General Public License v2.1. See the file LICENSE in the top level +# directory for more details. +# + +config BOARD_COMMON_WEACT_F41XCX + bool + # Put defined MCU peripherals here (in alphabetical order) + select HAS_PERIPH_ADC + select HAS_PERIPH_I2C + select HAS_PERIPH_PWM + select HAS_PERIPH_RTC + select HAS_PERIPH_SPI + select HAS_PERIPH_TIMER + select HAS_PERIPH_UART + select HAS_PERIPH_USBDEV + select HAS_HIGHLEVEL_STDIO diff --git a/boards/common/weact-f4x1cx/Makefile b/boards/common/weact-f4x1cx/Makefile new file mode 100644 index 0000000000..efd298c0b6 --- /dev/null +++ b/boards/common/weact-f4x1cx/Makefile @@ -0,0 +1,3 @@ +MODULE = boards_common_weact-f4x1cx + +include $(RIOTBASE)/Makefile.base diff --git a/boards/common/weact-f4x1cx/Makefile.dep b/boards/common/weact-f4x1cx/Makefile.dep new file mode 100644 index 0000000000..b20039bc5f --- /dev/null +++ b/boards/common/weact-f4x1cx/Makefile.dep @@ -0,0 +1,15 @@ +ifneq (,$(filter saul_default,$(USEMODULE))) + USEMODULE += saul_gpio +endif + +include $(RIOTBOARD)/common/makefiles/stdio_cdc_acm.dep.mk + +ifneq (,$(filter stdio_cdc_acm,$(USEMODULE))) + # The Mask-ROM bootloader provides USB-DFU capability + FEATURES_REQUIRED += bootloader_stm32 + USEMODULE += usb_board_reset +endif + +ifneq (,$(filter mtd,$(USEMODULE))) + USEMODULE += mtd_spi_nor +endif diff --git a/boards/common/weact-f4x1cx/Makefile.features b/boards/common/weact-f4x1cx/Makefile.features new file mode 100644 index 0000000000..d2d81aba42 --- /dev/null +++ b/boards/common/weact-f4x1cx/Makefile.features @@ -0,0 +1,14 @@ +CPU = stm32 + +# Put defined MCU peripherals here (in alphabetical order) +FEATURES_PROVIDED += periph_adc +FEATURES_PROVIDED += periph_i2c +FEATURES_PROVIDED += periph_pwm +FEATURES_PROVIDED += periph_rtc +FEATURES_PROVIDED += periph_spi +FEATURES_PROVIDED += periph_timer +FEATURES_PROVIDED += periph_uart +FEATURES_PROVIDED += periph_usbdev + +# Various other features (if any) +FEATURES_PROVIDED += highlevel_stdio diff --git a/boards/common/weact-f4x1cx/Makefile.include b/boards/common/weact-f4x1cx/Makefile.include new file mode 100644 index 0000000000..5e89e89ab5 --- /dev/null +++ b/boards/common/weact-f4x1cx/Makefile.include @@ -0,0 +1,15 @@ +INCLUDES += -I$(RIOTBOARD)/common/stm32/include +INCLUDES += -I$(RIOTBOARD)/common/weact-f4x1cx/include + +# default to flashing over USB +PROGRAMMER ?= dfu-util +DFU_USB_ID ?= 0483:df11 +DFU_FLAGS ?= -a 0 -s 0x08000000:leave +ROM_OFFSET ?= 0x0 + +# CDC ACM is available faster on STM32 +TERM_DELAY ?= 1 + +# Setup of programmer and serial is shared between STM32 based boards +include $(RIOTMAKE)/boards/stm32.inc.mk +include $(RIOTMAKE)/tools/usb_board_reset.mk diff --git a/boards/common/weact-f4x1cx/board.c b/boards/common/weact-f4x1cx/board.c new file mode 100644 index 0000000000..6acbb13c2b --- /dev/null +++ b/boards/common/weact-f4x1cx/board.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2019 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_weact-f4x1cx + * @{ + * + * @file + * @brief Board initialization code for the WeAct-F4x1Cx board. + * + * @author Benjamin Valentin + * + * @} + */ + +#include "board.h" +#include "cpu.h" +#include "mtd.h" +#include "mtd_spi_nor.h" +#include "periph/gpio.h" +#include "timex.h" + +#ifdef MODULE_MTD +/* AT25SF041 */ +static const mtd_spi_nor_params_t _weact_nor_params = { + .opcode = &mtd_spi_nor_opcode_default, + .wait_chip_erase = 4800LU * US_PER_MS, + .wait_32k_erase = 300LU * US_PER_MS, + .wait_sector_erase = 70LU * US_PER_MS, + .wait_chip_wake_up = 1LU * US_PER_MS, + .clk = WEACT_4X1CX_NOR_SPI_CLK, + .flag = WEACT_4X1CX_NOR_FLAGS, + .spi = WEACT_4X1CX_NOR_SPI_DEV, + .mode = WEACT_4X1CX_NOR_SPI_MODE, + .cs = WEACT_4X1CX_NOR_SPI_CS, + .wp = GPIO_UNDEF, + .hold = GPIO_UNDEF, + .addr_width = 3, +}; + +static mtd_spi_nor_t weact_nor_dev = { + .base = { + .driver = &mtd_spi_nor_driver, + .page_size = WEACT_4X1CX_NOR_PAGE_SIZE, + .pages_per_sector = WEACT_4X1CX_NOR_PAGES_PER_SECTOR, + }, + .params = &_weact_nor_params, +}; + +mtd_dev_t *mtd0 = (mtd_dev_t *)&weact_nor_dev; +#endif /* MODULE_MTD */ + +void board_init(void) +{ + cpu_init(); + + gpio_init(LED0_PIN, GPIO_OUT); + LED0_OFF; +} diff --git a/boards/common/weact-f4x1cx/doc.txt b/boards/common/weact-f4x1cx/doc.txt new file mode 100644 index 0000000000..7d1afedabc --- /dev/null +++ b/boards/common/weact-f4x1cx/doc.txt @@ -0,0 +1,6 @@ +/** +@defgroup boards_common_weact-f4x1cx WeAct-F4x1Cx common code +@ingroup boards_common +@brief Support for cheap stm32f401/stm32f411 based boards by WeAct. + + */ diff --git a/boards/common/weact-f4x1cx/include/board.h b/boards/common/weact-f4x1cx/include/board.h new file mode 100644 index 0000000000..34757c802a --- /dev/null +++ b/boards/common/weact-f4x1cx/include/board.h @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2019 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_weact-f4x1cx + * + * @brief Support for the WeAct-F4x1Cx Board + * @{ + * + * @file + * @brief Pin definitions and board configuration options + * + * @author Benjamin Valentin + */ + +#ifndef BOARD_H +#define BOARD_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "mtd.h" +#include "periph_cpu.h" + +/** + * @name xtimer configuration + * @{ + */ +#define XTIMER_BACKOFF (8) +#define XTIMER_OVERHEAD (6) +/** @} */ + +/** + * @name LED pin definition and handlers + * @{ + */ +#define LED0_PORT GPIOC +#define LED0_PIN GPIO_PIN(PORT_C, 13) +#define LED0_MASK (1 << 13) + +#define LED0_ON (LED0_PORT->BSRR = (LED0_MASK << 16)) +#define LED0_OFF (LED0_PORT->BSRR = (LED0_MASK << 0)) +#define LED0_TOGGLE (LED0_PORT->ODR ^= LED0_MASK) +/** @} */ + +/** + * @name User button pin definition + * @{ + */ +#define BTN0_PIN GPIO_PIN(PORT_A, 0) +#define BTN0_MODE GPIO_IN_PU +/** @} */ + +/** + * @name WeAct-F4X1CX NOR flash hardware configuration + * + * The pad for the NOR Flash (U3) is not populated. + * You have to solder a serial flash yourself and adjust the parameters. + * @{ + */ +#define WEACT_4X1CX_NOR_PAGE_SIZE (256) +#define WEACT_4X1CX_NOR_PAGES_PER_SECTOR (16) +#define WEACT_4X1CX_NOR_FLAGS (SPI_NOR_F_SECT_4K | SPI_NOR_F_SECT_32K) +#define WEACT_4X1CX_NOR_SPI_DEV SPI_DEV(0) +#define WEACT_4X1CX_NOR_SPI_CLK SPI_CLK_10MHZ +#define WEACT_4X1CX_NOR_SPI_CS GPIO_PIN(PORT_A, 4) +#define WEACT_4X1CX_NOR_SPI_MODE SPI_MODE_0 +/** @} */ + +/** + * @name MTD configuration + * @{ + */ +extern mtd_dev_t *mtd0; +#define MTD_0 mtd0 +/** @} */ + +/** + * @brief Initialize board specific hardware, including clock, LEDs and std-IO + */ +void board_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H */ +/** @} */ diff --git a/boards/common/weact-f4x1cx/include/gpio_params.h b/boards/common/weact-f4x1cx/include/gpio_params.h new file mode 100644 index 0000000000..a3948f2cfd --- /dev/null +++ b/boards/common/weact-f4x1cx/include/gpio_params.h @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2019 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_weact-f4x1cx + * @{ + * + * @file + * @brief Board specific configuration of direct mapped GPIOs + * + * @author Benjamin Valentin + */ + +#ifndef GPIO_PARAMS_H +#define GPIO_PARAMS_H + +#include "board.h" +#include "saul/periph.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief GPIO pin configuration + */ +static const saul_gpio_params_t saul_gpio_params[] = +{ + { + .name = "LED", + .pin = LED0_PIN, + .mode = GPIO_OUT, + .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR) + }, + { + .name = "KEY", + .pin = BTN0_PIN, + .mode = BTN0_MODE, + .flags = SAUL_GPIO_INVERTED + }, +}; + +#ifdef __cplusplus +} +#endif + +#endif /* GPIO_PARAMS_H */ +/** @} */ diff --git a/boards/common/weact-f4x1cx/include/periph_conf.h b/boards/common/weact-f4x1cx/include/periph_conf.h new file mode 100644 index 0000000000..37537b72e0 --- /dev/null +++ b/boards/common/weact-f4x1cx/include/periph_conf.h @@ -0,0 +1,192 @@ +/* + * Copyright (C) 2019 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_weact-f4x1cx + * @{ + * + * @file + * @brief Peripheral MCU configuration for the WeAct-F4X1CX Board + * + * @author Hauke Petersen + * @author José Ignacio Alamos + * @author Alexandre Abadie + * @author Benjamin Valentin + */ + +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +/* This board provides an LSE */ +#ifndef CONFIG_BOARD_HAS_LSE +#define CONFIG_BOARD_HAS_LSE 1 +#endif + +/* This board provides an HSE */ +#ifndef CONFIG_BOARD_HAS_HSE +#define CONFIG_BOARD_HAS_HSE 1 +#endif + +/* The HSE provides a 25MHz clock */ +#define CLOCK_HSE MHZ(25) + +#include "clk_conf.h" +#include "cfg_i2c1_pb8_pb9.h" +#include "cfg_timer_tim5.h" +#include "cfg_usb_otg_fs.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name UART configuration + * @{ + */ +static const uart_conf_t uart_config[] = { + { + .dev = USART2, + .rcc_mask = RCC_APB1ENR_USART2EN, + .rx_pin = GPIO_PIN(PORT_A, 3), + .tx_pin = GPIO_PIN(PORT_A, 2), + .rx_af = GPIO_AF7, + .tx_af = GPIO_AF7, + .bus = APB1, + .irqn = USART2_IRQn, +#ifdef MODULE_PERIPH_DMA + .dma = DMA_STREAM_UNDEF, + .dma_chan = UINT8_MAX, +#endif + }, + { + .dev = USART1, + .rcc_mask = RCC_APB2ENR_USART1EN, + .rx_pin = GPIO_PIN(PORT_A, 10), + .tx_pin = GPIO_PIN(PORT_A, 9), + .rx_af = GPIO_AF7, + .tx_af = GPIO_AF7, + .bus = APB2, + .irqn = USART1_IRQn, +#ifdef MODULE_PERIPH_DMA + .dma = DMA_STREAM_UNDEF, + .dma_chan = UINT8_MAX, +#endif + }, +}; + +/* assign ISR vector names */ +#define UART_0_ISR isr_usart2 +#define UART_1_ISR isr_usart1 + +/* deduct number of defined UART interfaces */ +#define UART_NUMOF ARRAY_SIZE(uart_config) +/** @} */ + +/** @name PWM configuration + * @{ + */ +static const pwm_conf_t pwm_config[] = { + { + .dev = TIM2, + .rcc_mask = RCC_APB1ENR_TIM2EN, + .chan = { { .pin = GPIO_PIN(PORT_A, 15), .cc_chan = 0 }, + { .pin = GPIO_PIN(PORT_B, 3), /* D3 */ .cc_chan = 1 }, + { .pin = GPIO_PIN(PORT_B, 10), /* D6 */ .cc_chan = 2 }, + { .pin = GPIO_UNDEF, .cc_chan = 0 } }, + .af = GPIO_AF1, + .bus = APB1 + }, + { + .dev = TIM3, + .rcc_mask = RCC_APB1ENR_TIM3EN, + .chan = { { .pin = GPIO_PIN(PORT_B, 4), /* D5 */ .cc_chan = 0 }, + { .pin = GPIO_PIN(PORT_C, 7), /* D9 */ .cc_chan = 1 }, + { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 }, + { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } }, + .af = GPIO_AF2, + .bus = APB1 + }, +}; + +#define PWM_NUMOF ARRAY_SIZE(pwm_config) +/** @} */ + +/** + * @name SPI configuration + * @{ + */ +static const spi_conf_t spi_config[] = { + { /* U3 - SPI flash */ + .dev = SPI1, + .mosi_pin = GPIO_PIN(PORT_A, 7), + .miso_pin = GPIO_PIN(PORT_A, 6), + .sclk_pin = GPIO_PIN(PORT_A, 5), + .cs_pin = GPIO_PIN(PORT_A, 4), + .mosi_af = GPIO_AF5, + .miso_af = GPIO_AF5, + .sclk_af = GPIO_AF5, + .cs_af = GPIO_AF5, + .rccmask = RCC_APB2ENR_SPI1EN, + .apbbus = APB2 + }, + { + .dev = SPI2, + .mosi_pin = GPIO_PIN(PORT_B, 15), + .miso_pin = GPIO_PIN(PORT_B, 14), + .sclk_pin = GPIO_PIN(PORT_B, 13), + .cs_pin = GPIO_PIN(PORT_B, 12), + .mosi_af = GPIO_AF5, + .miso_af = GPIO_AF5, + .sclk_af = GPIO_AF5, + .cs_af = GPIO_AF5, + .rccmask = RCC_APB1ENR_SPI2EN, + .apbbus = APB1 + }, + { + .dev = SPI3, + .mosi_pin = GPIO_PIN(PORT_B, 5), + .miso_pin = GPIO_PIN(PORT_B, 4), + .sclk_pin = GPIO_PIN(PORT_B, 3), + .cs_pin = GPIO_PIN(PORT_A, 15), + .mosi_af = GPIO_AF6, + .miso_af = GPIO_AF6, + .sclk_af = GPIO_AF6, + .cs_af = GPIO_AF6, + .rccmask = RCC_APB1ENR_SPI3EN, + .apbbus = APB1 + }, +}; + +#define SPI_NUMOF ARRAY_SIZE(spi_config) +/** @} */ + +/** + * @name ADC configuration + * + * Note that we do not configure all ADC channels, + * and not in the STM32F4x1 order. + * Feel free to add more if needed. + * + * @{ + */ +static const adc_conf_t adc_config[] = { + {GPIO_PIN(PORT_A, 0), 0, 0}, + {GPIO_PIN(PORT_A, 1), 0, 1}, + {GPIO_PIN(PORT_A, 4), 0, 4}, + {GPIO_PIN(PORT_B, 0), 0, 8}, +}; + +#define ADC_NUMOF ARRAY_SIZE(adc_config) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* PERIPH_CONF_H */ +/** @} */ From 26a907576c490e2dca989d7af8aae0e1d0254651 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Thu, 8 Oct 2020 21:04:39 +0200 Subject: [PATCH 3/5] boards/weact-f411ce: add WeAct-f411ce --- boards/weact-f411ce/Kconfig | 16 +- boards/weact-f411ce/Makefile | 2 + boards/weact-f411ce/Makefile.dep | 16 +- boards/weact-f411ce/Makefile.features | 13 +- boards/weact-f411ce/Makefile.include | 17 +- boards/weact-f411ce/board.c | 64 ------- boards/weact-f411ce/include/board.h | 103 ------------ boards/weact-f411ce/include/gpio_params.h | 53 ------ boards/weact-f411ce/include/periph_conf.h | 193 ---------------------- 9 files changed, 12 insertions(+), 465 deletions(-) delete mode 100644 boards/weact-f411ce/board.c delete mode 100644 boards/weact-f411ce/include/board.h delete mode 100644 boards/weact-f411ce/include/gpio_params.h delete mode 100644 boards/weact-f411ce/include/periph_conf.h diff --git a/boards/weact-f411ce/Kconfig b/boards/weact-f411ce/Kconfig index c6efb0e783..54247795ba 100644 --- a/boards/weact-f411ce/Kconfig +++ b/boards/weact-f411ce/Kconfig @@ -1,4 +1,4 @@ -# Copyright (c) 2020 Inria +# Copyright (c) 2020 Benjamin Valentin # # This file is subject to the terms and conditions of the GNU Lesser # General Public License v2.1. See the file LICENSE in the top level @@ -11,17 +11,7 @@ config BOARD config BOARD_WEACT_F411CE bool default y + select BOARD_COMMON_WEACT_F41XCX select CPU_MODEL_STM32F411CE - # Put defined MCU peripherals here (in alphabetical order) - select HAS_PERIPH_ADC - select HAS_PERIPH_I2C - select HAS_PERIPH_PWM - select HAS_PERIPH_RTC - select HAS_PERIPH_SPI - select HAS_PERIPH_TIMER - select HAS_PERIPH_UART - select HAS_PERIPH_USBDEV - - # Put other features for this board (in alphabetical order) - select HAS_HIGHLEVEL_STDIO +source "$(RIOTBOARD)/common/weact-f4x1cx/Kconfig" diff --git a/boards/weact-f411ce/Makefile b/boards/weact-f411ce/Makefile index f8fcbb53a0..82b562c121 100644 --- a/boards/weact-f411ce/Makefile +++ b/boards/weact-f411ce/Makefile @@ -1,3 +1,5 @@ MODULE = board +DIRS = $(RIOTBOARD)/common/weact-f4x1cx + include $(RIOTBASE)/Makefile.base diff --git a/boards/weact-f411ce/Makefile.dep b/boards/weact-f411ce/Makefile.dep index b20039bc5f..1087582e39 100644 --- a/boards/weact-f411ce/Makefile.dep +++ b/boards/weact-f411ce/Makefile.dep @@ -1,15 +1,3 @@ -ifneq (,$(filter saul_default,$(USEMODULE))) - USEMODULE += saul_gpio -endif +USEMODULE += boards_common_weact-f4x1cx -include $(RIOTBOARD)/common/makefiles/stdio_cdc_acm.dep.mk - -ifneq (,$(filter stdio_cdc_acm,$(USEMODULE))) - # The Mask-ROM bootloader provides USB-DFU capability - FEATURES_REQUIRED += bootloader_stm32 - USEMODULE += usb_board_reset -endif - -ifneq (,$(filter mtd,$(USEMODULE))) - USEMODULE += mtd_spi_nor -endif +include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.dep diff --git a/boards/weact-f411ce/Makefile.features b/boards/weact-f411ce/Makefile.features index 19e8cb8315..464bf16c20 100644 --- a/boards/weact-f411ce/Makefile.features +++ b/boards/weact-f411ce/Makefile.features @@ -1,14 +1,3 @@ -CPU = stm32 CPU_MODEL = stm32f411ce -# Put defined MCU peripherals here (in alphabetical order) -FEATURES_PROVIDED += periph_adc -FEATURES_PROVIDED += periph_i2c -FEATURES_PROVIDED += periph_pwm -FEATURES_PROVIDED += periph_rtc -FEATURES_PROVIDED += periph_spi -FEATURES_PROVIDED += periph_timer -FEATURES_PROVIDED += periph_uart -FEATURES_PROVIDED += periph_usbdev - -FEATURES_PROVIDED += highlevel_stdio +include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.features diff --git a/boards/weact-f411ce/Makefile.include b/boards/weact-f411ce/Makefile.include index 520cd052eb..f280095ec8 100644 --- a/boards/weact-f411ce/Makefile.include +++ b/boards/weact-f411ce/Makefile.include @@ -1,14 +1,5 @@ -INCLUDES += -I$(RIOTBOARD)/common/stm32/include +# Product & Vendor ID taken from example firmware that the board was shipped with. +CFLAGS += -DINTERNAL_PERIPHERAL_VID=0x0483 +CFLAGS += -DINTERNAL_PERIPHERAL_PID=0x5740 -# default to flashing over USB -PROGRAMMER ?= dfu-util -DFU_USB_ID ?= 0483:df11 -DFU_FLAGS ?= -a 0 -s 0x08000000:leave -ROM_OFFSET ?= 0x0 - -# CDC ACM is available faster on STM32 -TERM_DELAY ?= 1 - -# Setup of programmer and serial is shared between STM32 based boards -include $(RIOTMAKE)/boards/stm32.inc.mk -include $(RIOTMAKE)/tools/usb_board_reset.mk +include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.include diff --git a/boards/weact-f411ce/board.c b/boards/weact-f411ce/board.c deleted file mode 100644 index 99512c226b..0000000000 --- a/boards/weact-f411ce/board.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * Copyright (C) 2019 Benjamin Valentin - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @ingroup boards_weact-f411ce - * @{ - * - * @file - * @brief Board initialization code for the WeAct-F411CE board. - * - * @author Benjamin Valentin - * - * @} - */ - -#include "board.h" -#include "cpu.h" -#include "mtd.h" -#include "timex.h" -#include "mtd_spi_nor.h" -#include "periph/gpio.h" - -#ifdef MODULE_MTD -/* AT25SF041 */ -static const mtd_spi_nor_params_t _weact_nor_params = { - .opcode = &mtd_spi_nor_opcode_default, - .wait_chip_erase = 4800LU * US_PER_MS, - .wait_32k_erase = 300LU * US_PER_MS, - .wait_sector_erase = 70LU * US_PER_MS, - .wait_chip_wake_up = 1LU * US_PER_MS, - .clk = WEACT_411CE_NOR_SPI_CLK, - .flag = WEACT_411CE_NOR_FLAGS, - .spi = WEACT_411CE_NOR_SPI_DEV, - .mode = WEACT_411CE_NOR_SPI_MODE, - .cs = WEACT_411CE_NOR_SPI_CS, - .wp = GPIO_UNDEF, - .hold = GPIO_UNDEF, - .addr_width = 3, -}; - -static mtd_spi_nor_t weact_nor_dev = { - .base = { - .driver = &mtd_spi_nor_driver, - .page_size = WEACT_411CE_NOR_PAGE_SIZE, - .pages_per_sector = WEACT_411CE_NOR_PAGES_PER_SECTOR, - }, - .params = &_weact_nor_params, -}; - -mtd_dev_t *mtd0 = (mtd_dev_t *)&weact_nor_dev; -#endif /* MODULE_MTD */ - -void board_init(void) -{ - cpu_init(); - - gpio_init(LED0_PIN, GPIO_OUT); - LED0_OFF; -} diff --git a/boards/weact-f411ce/include/board.h b/boards/weact-f411ce/include/board.h deleted file mode 100644 index 1a66833fa7..0000000000 --- a/boards/weact-f411ce/include/board.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Copyright (C) 2019 Benjamin Valentin - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @ingroup boards_weact-f411ce - * - * @brief Support for the WeAct-F411CE Board - * @{ - * - * @file - * @brief Pin definitions and board configuration options - * - * @author Benjamin Valentin - */ - -#ifndef BOARD_H -#define BOARD_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "mtd.h" -#include "periph_cpu.h" - -/** - * @name Xtimer configuration - * @{ - */ -#define XTIMER_BACKOFF (8) -#define XTIMER_OVERHEAD (6) -/** @} */ - -/** - * @brief Product & Vendor ID taken from example firmware - * that the board was shipped with. - * @{ - */ -#define INTERNAL_PERIPHERAL_VID (0x0483) -#define INTERNAL_PERIPHERAL_PID (0x5740) -/** @} */ - -/** - * @name LED pin definition and handlers - * @{ - */ -#define LED0_PORT GPIOC -#define LED0_PIN GPIO_PIN(PORT_C, 13) -#define LED0_MASK (1 << 13) - -#define LED0_ON (LED0_PORT->BSRR = (LED0_MASK << 16)) -#define LED0_OFF (LED0_PORT->BSRR = (LED0_MASK << 0)) -#define LED0_TOGGLE (LED0_PORT->ODR ^= LED0_MASK) -/** @} */ - -/** - * @name User button pin definition - * @{ - */ -#define BTN0_PIN GPIO_PIN(PORT_A, 0) -#define BTN0_MODE GPIO_IN_PU -/** @} */ - -/** - * @name WeAct-F411CE NOR flash hardware configuration - * - * The pad for the NOR Flash (U3) is not populated. - * You have to solder a serial flash yourself and adjust the parameters. - * @{ - */ -#define WEACT_411CE_NOR_PAGE_SIZE (256) -#define WEACT_411CE_NOR_PAGES_PER_SECTOR (16) -#define WEACT_411CE_NOR_FLAGS (SPI_NOR_F_SECT_4K | SPI_NOR_F_SECT_32K) -#define WEACT_411CE_NOR_SPI_DEV SPI_DEV(0) -#define WEACT_411CE_NOR_SPI_CLK SPI_CLK_10MHZ -#define WEACT_411CE_NOR_SPI_CS GPIO_PIN(PORT_A, 4) -#define WEACT_411CE_NOR_SPI_MODE SPI_MODE_0 -/** @} */ - -/** - * @name MTD configuration - * @{ - */ -extern mtd_dev_t *mtd0; -#define MTD_0 mtd0 -/** @} */ - -/** - * @brief Initialize board specific hardware, including clock, LEDs and std-IO - */ -void board_init(void); - -#ifdef __cplusplus -} -#endif - -#endif /* BOARD_H */ -/** @} */ diff --git a/boards/weact-f411ce/include/gpio_params.h b/boards/weact-f411ce/include/gpio_params.h deleted file mode 100644 index 9bb2e7baf3..0000000000 --- a/boards/weact-f411ce/include/gpio_params.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (C) 2019 Benjamin Valentin - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @ingroup boards_weact-f411ce - * @{ - * - * @file - * @brief Board specific configuration of direct mapped GPIOs - * - * @author Benjamin Valentin - */ - -#ifndef GPIO_PARAMS_H -#define GPIO_PARAMS_H - -#include "board.h" -#include "saul/periph.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @brief GPIO pin configuration - */ -static const saul_gpio_params_t saul_gpio_params[] = -{ - { - .name = "LED", - .pin = LED0_PIN, - .mode = GPIO_OUT, - .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR) - }, - { - .name = "KEY", - .pin = BTN0_PIN, - .mode = BTN0_MODE, - .flags = SAUL_GPIO_INVERTED - }, -}; - -#ifdef __cplusplus -} -#endif - -#endif /* GPIO_PARAMS_H */ -/** @} */ diff --git a/boards/weact-f411ce/include/periph_conf.h b/boards/weact-f411ce/include/periph_conf.h deleted file mode 100644 index ba066653fb..0000000000 --- a/boards/weact-f411ce/include/periph_conf.h +++ /dev/null @@ -1,193 +0,0 @@ -/* - * Copyright (C) 2019 Benjamin Valentin - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @ingroup boards_weact-f411ce - * @{ - * - * @file - * @brief Peripheral MCU configuration for the WeAct-F411CE Board - * - * @author Hauke Petersen - * @author José Ignacio Alamos - * @author Alexandre Abadie - * @author Benjamin Valentin - */ - -#ifndef PERIPH_CONF_H -#define PERIPH_CONF_H - -/* This board provides an LSE */ -#ifndef CONFIG_BOARD_HAS_LSE -#define CONFIG_BOARD_HAS_LSE 1 -#endif - -/* This board provides an HSE */ -#ifndef CONFIG_BOARD_HAS_HSE -#define CONFIG_BOARD_HAS_HSE 1 -#endif - -/* The HSE provides a 25MHz clock */ -#define CLOCK_HSE MHZ(25) - -#include "periph_cpu.h" -#include "clk_conf.h" -#include "cfg_i2c1_pb8_pb9.h" -#include "cfg_timer_tim5.h" -#include "cfg_usb_otg_fs.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @name UART configuration - * @{ - */ -static const uart_conf_t uart_config[] = { - { - .dev = USART2, - .rcc_mask = RCC_APB1ENR_USART2EN, - .rx_pin = GPIO_PIN(PORT_A, 3), - .tx_pin = GPIO_PIN(PORT_A, 2), - .rx_af = GPIO_AF7, - .tx_af = GPIO_AF7, - .bus = APB1, - .irqn = USART2_IRQn, -#ifdef MODULE_PERIPH_DMA - .dma = DMA_STREAM_UNDEF, - .dma_chan = UINT8_MAX, -#endif - }, - { - .dev = USART1, - .rcc_mask = RCC_APB2ENR_USART1EN, - .rx_pin = GPIO_PIN(PORT_A, 10), - .tx_pin = GPIO_PIN(PORT_A, 9), - .rx_af = GPIO_AF7, - .tx_af = GPIO_AF7, - .bus = APB2, - .irqn = USART1_IRQn, -#ifdef MODULE_PERIPH_DMA - .dma = DMA_STREAM_UNDEF, - .dma_chan = UINT8_MAX, -#endif - }, -}; - -/* assign ISR vector names */ -#define UART_0_ISR isr_usart2 -#define UART_1_ISR isr_usart1 - -/* deduct number of defined UART interfaces */ -#define UART_NUMOF ARRAY_SIZE(uart_config) -/** @} */ - -/** @name PWM configuration - * @{ - */ -static const pwm_conf_t pwm_config[] = { - { - .dev = TIM2, - .rcc_mask = RCC_APB1ENR_TIM2EN, - .chan = { { .pin = GPIO_PIN(PORT_A, 15), .cc_chan = 0 }, - { .pin = GPIO_PIN(PORT_B, 3), /* D3 */ .cc_chan = 1 }, - { .pin = GPIO_PIN(PORT_B, 10), /* D6 */ .cc_chan = 2 }, - { .pin = GPIO_UNDEF, .cc_chan = 0 } }, - .af = GPIO_AF1, - .bus = APB1 - }, - { - .dev = TIM3, - .rcc_mask = RCC_APB1ENR_TIM3EN, - .chan = { { .pin = GPIO_PIN(PORT_B, 4), /* D5 */ .cc_chan = 0 }, - { .pin = GPIO_PIN(PORT_C, 7), /* D9 */ .cc_chan = 1 }, - { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 }, - { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } }, - .af = GPIO_AF2, - .bus = APB1 - }, -}; - -#define PWM_NUMOF ARRAY_SIZE(pwm_config) -/** @} */ - -/** - * @name SPI configuration - * @{ - */ -static const spi_conf_t spi_config[] = { - { /* U3 - SPI flash */ - .dev = SPI1, - .mosi_pin = GPIO_PIN(PORT_A, 7), - .miso_pin = GPIO_PIN(PORT_A, 6), - .sclk_pin = GPIO_PIN(PORT_A, 5), - .cs_pin = GPIO_PIN(PORT_A, 4), - .mosi_af = GPIO_AF5, - .miso_af = GPIO_AF5, - .sclk_af = GPIO_AF5, - .cs_af = GPIO_AF5, - .rccmask = RCC_APB2ENR_SPI1EN, - .apbbus = APB2 - }, - { - .dev = SPI2, - .mosi_pin = GPIO_PIN(PORT_B, 15), - .miso_pin = GPIO_PIN(PORT_B, 14), - .sclk_pin = GPIO_PIN(PORT_B, 13), - .cs_pin = GPIO_PIN(PORT_B, 12), - .mosi_af = GPIO_AF5, - .miso_af = GPIO_AF5, - .sclk_af = GPIO_AF5, - .cs_af = GPIO_AF5, - .rccmask = RCC_APB1ENR_SPI2EN, - .apbbus = APB1 - }, - { - .dev = SPI3, - .mosi_pin = GPIO_PIN(PORT_B, 5), - .miso_pin = GPIO_PIN(PORT_B, 4), - .sclk_pin = GPIO_PIN(PORT_B, 3), - .cs_pin = GPIO_PIN(PORT_A, 15), - .mosi_af = GPIO_AF6, - .miso_af = GPIO_AF6, - .sclk_af = GPIO_AF6, - .cs_af = GPIO_AF6, - .rccmask = RCC_APB1ENR_SPI3EN, - .apbbus = APB1 - }, -}; - -#define SPI_NUMOF ARRAY_SIZE(spi_config) -/** @} */ - -/** - * @name ADC configuration - * - * Note that we do not configure all ADC channels, - * and not in the STM32F411 order. - * Feel free to add more if needed. - * - * @{ - */ -static const adc_conf_t adc_config[] = { - {GPIO_PIN(PORT_A, 0), 0, 0}, - {GPIO_PIN(PORT_A, 1), 0, 1}, - {GPIO_PIN(PORT_A, 4), 0, 4}, - {GPIO_PIN(PORT_B, 0), 0, 8}, -}; - -#define ADC_NUMOF ARRAY_SIZE(adc_config) -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* PERIPH_CONF_H */ -/** @} */ From 84b62aa12b42bc1e46f5fe29aa0c3fc635204cef Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Thu, 8 Oct 2020 20:56:00 +0200 Subject: [PATCH 4/5] boards/weact-f401ce: add WeAct-f401ce --- boards/weact-f401ce/Kconfig | 17 +++++++ boards/weact-f401ce/Makefile | 5 ++ boards/weact-f401ce/Makefile.dep | 3 ++ boards/weact-f401ce/Makefile.features | 3 ++ boards/weact-f401ce/Makefile.include | 5 ++ boards/weact-f401ce/doc.txt | 70 +++++++++++++++++++++++++++ 6 files changed, 103 insertions(+) create mode 100644 boards/weact-f401ce/Kconfig create mode 100644 boards/weact-f401ce/Makefile create mode 100644 boards/weact-f401ce/Makefile.dep create mode 100644 boards/weact-f401ce/Makefile.features create mode 100644 boards/weact-f401ce/Makefile.include create mode 100644 boards/weact-f401ce/doc.txt diff --git a/boards/weact-f401ce/Kconfig b/boards/weact-f401ce/Kconfig new file mode 100644 index 0000000000..c5a2bf848d --- /dev/null +++ b/boards/weact-f401ce/Kconfig @@ -0,0 +1,17 @@ +# Copyright (c) 2020 Benjamin Valentin +# +# This file is subject to the terms and conditions of the GNU Lesser +# General Public License v2.1. See the file LICENSE in the top level +# directory for more details. +# + +config BOARD + default "weact-f401ce" if BOARD_WEACT_F401CE + +config BOARD_WEACT_F401CE + bool + default y + select BOARD_COMMON_WEACT_F41XCX + select CPU_MODEL_STM32F401CE + +source "$(RIOTBOARD)/common/weact-f4x1cx/Kconfig" diff --git a/boards/weact-f401ce/Makefile b/boards/weact-f401ce/Makefile new file mode 100644 index 0000000000..82b562c121 --- /dev/null +++ b/boards/weact-f401ce/Makefile @@ -0,0 +1,5 @@ +MODULE = board + +DIRS = $(RIOTBOARD)/common/weact-f4x1cx + +include $(RIOTBASE)/Makefile.base diff --git a/boards/weact-f401ce/Makefile.dep b/boards/weact-f401ce/Makefile.dep new file mode 100644 index 0000000000..1087582e39 --- /dev/null +++ b/boards/weact-f401ce/Makefile.dep @@ -0,0 +1,3 @@ +USEMODULE += boards_common_weact-f4x1cx + +include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.dep diff --git a/boards/weact-f401ce/Makefile.features b/boards/weact-f401ce/Makefile.features new file mode 100644 index 0000000000..1417cb4e9d --- /dev/null +++ b/boards/weact-f401ce/Makefile.features @@ -0,0 +1,3 @@ +CPU_MODEL = stm32f401ce + +include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.features diff --git a/boards/weact-f401ce/Makefile.include b/boards/weact-f401ce/Makefile.include new file mode 100644 index 0000000000..67070fd104 --- /dev/null +++ b/boards/weact-f401ce/Makefile.include @@ -0,0 +1,5 @@ +# Product & Vendor ID taken from example firmware that the board was shipped with. +CFLAGS += -DINTERNAL_PERIPHERAL_VID=0x0483 +CFLAGS += -DINTERNAL_PERIPHERAL_PID=0x572a + +include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.include diff --git a/boards/weact-f401ce/doc.txt b/boards/weact-f401ce/doc.txt new file mode 100644 index 0000000000..ea8fbf3df3 --- /dev/null +++ b/boards/weact-f401ce/doc.txt @@ -0,0 +1,70 @@ +/** +@defgroup boards_weact-f401ce WeAct-F401CE board +@ingroup boards +@brief Support for the WeAct-F401CE Board + +## Overview + +WeAct-F401CE is a board with the same form-factor as the blue/blackpill, +but with an STM32F401CEU6 and a USB-C connector. + +It is available on sites like AliExpress for less than 3€. + +## Hardware + +![WeAct-F401CE](https://user-images.githubusercontent.com/1301112/69389644-eb5fb080-0ccc-11ea-8002-67d3db851250.png) + +### MCU +| MCU | STM32F401CEU6 | +|:---------------- |:--------------------- | +| Family | ARM Cortex-M4F | +| Vendor | ST Microelectronics | +| RAM | 96KiB | +| Flash | 512KiB | +| Frequency | up to 84MHz | +| FPU | yes | +| Timers | 8 (2x watchdog, 1 SysTick, 6x 16-bit, 2x 32-bit) | +| ADCs | 1x 12-bit | +| UARTs | 3 | +| SPIs | 4 | +| I2Cs | 3 | +| RTC | 1 | +| Vcc | 2.0V - 3.6V | +| Datasheet | [Datasheet](https://www.st.com/resource/en/datasheet/stm32f401ce.pdf) | +| Reference Manual | [Reference Manual](https://www.st.com/content/ccc/resource/technical/document/reference_manual/9b/53/39/1c/f7/01/4a/79/DM00119316.pdf/files/DM00119316.pdf/jcr:content/translations/en.DM00119316.pdf) | + +## Flashing the device +The device comes with a bootloader that allows flashing via `dfu-util`. + +If RIOT is already running on the board, you can upload your RIOT-firmware by typing + +``` +make BOARD=weact-f401ce flash +``` + +RIOT will make sure to enter the bootloader automatically. + +If RIOT crashed or you have the plain board with the stock firmware, you have to enter +the bootloader manually. + +There are two buttons on the board labeled `BOOT0` and `NRST`. + + - Hold down `BOOT0` + - Shortly press `NRST` to reset the CPU while keeping `BOOT0` held down + +The board will now show up as `0483:df11` - `STM32 BOOTLOADER` and will accept +firmware using the DFU protocol. + +*Note:* You need to have write permissions to the device. +On Linux you could add yourself to the `plugdev` group and store the following as `/etc/udev/rules.d/99-weact-f401ce.rules`: + +``` +SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="df11", GROUP="plugdev", MODE="660" +``` + +## UART + +stdio is provided through USB CDC ACM so the board can be used +without any extra hardware, save for a USB-C cable. + + */ From 851e2c5a9a16e0d8635ae5b9cbfb8b28bdcdf9e3 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Thu, 8 Oct 2020 21:06:25 +0200 Subject: [PATCH 5/5] boards/weact-f401cc: add WeAct-f401cc --- boards/weact-f401cc/Kconfig | 17 +++++++ boards/weact-f401cc/Makefile | 5 ++ boards/weact-f401cc/Makefile.dep | 3 ++ boards/weact-f401cc/Makefile.features | 3 ++ boards/weact-f401cc/Makefile.include | 1 + boards/weact-f401cc/doc.txt | 70 +++++++++++++++++++++++++++ tests/unittests/Makefile.ci | 1 + 7 files changed, 100 insertions(+) create mode 100644 boards/weact-f401cc/Kconfig create mode 100644 boards/weact-f401cc/Makefile create mode 100644 boards/weact-f401cc/Makefile.dep create mode 100644 boards/weact-f401cc/Makefile.features create mode 100644 boards/weact-f401cc/Makefile.include create mode 100644 boards/weact-f401cc/doc.txt diff --git a/boards/weact-f401cc/Kconfig b/boards/weact-f401cc/Kconfig new file mode 100644 index 0000000000..44b01a5f83 --- /dev/null +++ b/boards/weact-f401cc/Kconfig @@ -0,0 +1,17 @@ +# Copyright (c) 2020 Benjamin Valentin +# +# This file is subject to the terms and conditions of the GNU Lesser +# General Public License v2.1. See the file LICENSE in the top level +# directory for more details. +# + +config BOARD + default "weact-f401cc" if BOARD_WEACT_F401CC + +config BOARD_WEACT_F401CC + bool + default y + select BOARD_COMMON_WEACT_F41XCX + select CPU_MODEL_STM32F401CC + +source "$(RIOTBOARD)/common/weact-f4x1cx/Kconfig" diff --git a/boards/weact-f401cc/Makefile b/boards/weact-f401cc/Makefile new file mode 100644 index 0000000000..82b562c121 --- /dev/null +++ b/boards/weact-f401cc/Makefile @@ -0,0 +1,5 @@ +MODULE = board + +DIRS = $(RIOTBOARD)/common/weact-f4x1cx + +include $(RIOTBASE)/Makefile.base diff --git a/boards/weact-f401cc/Makefile.dep b/boards/weact-f401cc/Makefile.dep new file mode 100644 index 0000000000..1087582e39 --- /dev/null +++ b/boards/weact-f401cc/Makefile.dep @@ -0,0 +1,3 @@ +USEMODULE += boards_common_weact-f4x1cx + +include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.dep diff --git a/boards/weact-f401cc/Makefile.features b/boards/weact-f401cc/Makefile.features new file mode 100644 index 0000000000..49c258a11a --- /dev/null +++ b/boards/weact-f401cc/Makefile.features @@ -0,0 +1,3 @@ +CPU_MODEL = stm32f401cc + +include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.features diff --git a/boards/weact-f401cc/Makefile.include b/boards/weact-f401cc/Makefile.include new file mode 100644 index 0000000000..9d911ae4e5 --- /dev/null +++ b/boards/weact-f401cc/Makefile.include @@ -0,0 +1 @@ +include $(RIOTBOARD)/common/weact-f4x1cx/Makefile.include diff --git a/boards/weact-f401cc/doc.txt b/boards/weact-f401cc/doc.txt new file mode 100644 index 0000000000..b6c452992b --- /dev/null +++ b/boards/weact-f401cc/doc.txt @@ -0,0 +1,70 @@ +/** +@defgroup boards_weact-f401cc WeAct-F401CC board +@ingroup boards +@brief Support for the WeAct-F401CC Board + +## Overview + +WeAct-F401CC is a board with the same form-factor as the blue/blackpill, +but with an STM32F401CCU6 and a USB-C connector. + +It is available on sites like AliExpress for less than 3€. + +## Hardware + +![WeAct-F401CC](https://user-images.githubusercontent.com/1301112/69389644-eb5fb080-0ccc-11ea-8002-67d3db851250.png) + +### MCU +| MCU | STM32F401CCU6 | +|:---------------- |:--------------------- | +| Family | ARM Cortex-M4F | +| Vendor | ST Microelectronics | +| RAM | 64KiB | +| Flash | 256KiB | +| Frequency | up to 84MHz | +| FPU | yes | +| Timers | 8 (2x watchdog, 1 SysTick, 6x 16-bit) | +| ADCs | 1x 12-bit | +| UARTs | 3 | +| SPIs | 4 | +| I2Cs | 3 | +| RTC | 1 | +| Vcc | 2.0V - 3.6V | +| Datasheet | [Datasheet](https://www.st.com/resource/en/datasheet/stm32f401cc.pdf) | +| Reference Manual | [Reference Manual](https://www.st.com/content/ccc/resource/technical/document/reference_manual/9b/53/39/1c/f7/01/4a/79/DM00119316.pdf/files/DM00119316.pdf/jcr:content/translations/en.DM00119316.pdf) | + +## Flashing the device +The device comes with a bootloader that allows flashing via `dfu-util`. + +If RIOT is already running on the board, you can upload your RIOT-firmware by typing + +``` +make BOARD=weact-f401cc flash +``` + +RIOT will make sure to enter the bootloader automatically. + +If RIOT crashed or you have the plain board with the stock firmware, you have to enter +the bootloader manually. + +There are two buttons on the board labeled `BOOT0` and `NRST`. + + - Hold down `BOOT0` + - Shortly press `NRST` to reset the CPU while keeping `BOOT0` held down + +The board will now show up as `0483:df11` - `STM32 BOOTLOADER` and will accept +firmware using the DFU protocol. + +*Note:* You need to have write permissions to the device. +On Linux you could add yourself to the `plugdev` group and store the following as `/etc/udev/rules.d/99-weact-f401cc.rules`: + +``` +SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="df11", GROUP="plugdev", MODE="660" +``` + +## UART + +stdio is provided through USB CDC ACM so the board can be used +without any extra hardware, save for a USB-C cable. + + */ diff --git a/tests/unittests/Makefile.ci b/tests/unittests/Makefile.ci index f148d5c04f..4d5790d173 100644 --- a/tests/unittests/Makefile.ci +++ b/tests/unittests/Makefile.ci @@ -99,6 +99,7 @@ BOARD_INSUFFICIENT_MEMORY := \ teensy31 \ telosb \ waspmote-pro \ + weact-f401cc \ yarm \ yunjia-nrf51822 \ z1 \