cpu/cc430: timer: s/TIMER_DEV/TIMER_BASE/
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@ -37,7 +37,7 @@ static void (*isr_cb)(int chan);
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int timer_init(tim_t dev, unsigned int us_per_tick, void (*callback)(int))
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int timer_init(tim_t dev, unsigned int us_per_tick, void (*callback)(int))
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{
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{
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/* using fixed TIMER_DEV for now */
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/* using fixed TIMER_BASE for now */
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if (dev != 0) {
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if (dev != 0) {
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return -1;
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return -1;
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}
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}
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@ -47,23 +47,23 @@ int timer_init(tim_t dev, unsigned int us_per_tick, void (*callback)(int))
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}
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}
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/* reset the timer A configuration */
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/* reset the timer A configuration */
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TIMER_DEV->CTL = CTL_CLR;
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TIMER_BASE->CTL = CTL_CLR;
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/* save callback */
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/* save callback */
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isr_cb = callback;
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isr_cb = callback;
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/* configure timer to use the SMCLK with prescaler of 8 */
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/* configure timer to use the SMCLK with prescaler of 8 */
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TIMER_DEV->CTL = (CTL_TASSEL_SMCLK | CTL_ID_DIV8);
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TIMER_BASE->CTL = (CTL_TASSEL_SMCLK | CTL_ID_DIV8);
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/* configure CC channels */
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/* configure CC channels */
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for (int i = 0; i < TIMER_CHAN; i++) {
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for (int i = 0; i < TIMER_CHAN; i++) {
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TIMER_DEV->CCTL[i] = 0;
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TIMER_BASE->CCTL[i] = 0;
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}
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}
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/* start the timer in continuous mode */
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/* start the timer in continuous mode */
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TIMER_DEV->CTL |= CTL_MC_CONT;
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TIMER_BASE->CTL |= CTL_MC_CONT;
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return 0;
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return 0;
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}
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}
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int timer_set(tim_t dev, int channel, unsigned int timeout)
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int timer_set(tim_t dev, int channel, unsigned int timeout)
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{
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{
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uint16_t target = TIMER_DEV->R + (uint16_t)timeout;
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uint16_t target = TIMER_BASE->R + (uint16_t)timeout;
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return timer_set_absolute(dev, channel, (unsigned int)target);
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return timer_set_absolute(dev, channel, (unsigned int)target);
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}
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}
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@ -72,9 +72,9 @@ int timer_set_absolute(tim_t dev, int channel, unsigned int value)
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if (dev != 0 || channel > TIMER_CHAN) {
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if (dev != 0 || channel > TIMER_CHAN) {
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return -1;
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return -1;
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}
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}
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TIMER_DEV->CCR[channel] = value;
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TIMER_BASE->CCR[channel] = value;
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TIMER_DEV->CCTL[channel] &= ~(CCTL_CCIFG);
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TIMER_BASE->CCTL[channel] &= ~(CCTL_CCIFG);
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TIMER_DEV->CCTL[channel] |= (CCTL_CCIE);
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TIMER_BASE->CCTL[channel] |= (CCTL_CCIE);
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return 0;
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return 0;
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}
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}
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@ -83,23 +83,23 @@ int timer_clear(tim_t dev, int channel)
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if (dev != 0 || channel > TIMER_CHAN) {
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if (dev != 0 || channel > TIMER_CHAN) {
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return -1;
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return -1;
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}
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}
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TIMER_DEV->CCTL[channel] &= ~(CCTL_CCIE);
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TIMER_BASE->CCTL[channel] &= ~(CCTL_CCIE);
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return 0;
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return 0;
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}
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}
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unsigned int timer_read(tim_t dev)
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unsigned int timer_read(tim_t dev)
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{
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{
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return (unsigned int)TIMER_DEV->R;
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return (unsigned int)TIMER_BASE->R;
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}
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}
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void timer_start(tim_t dev)
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void timer_start(tim_t dev)
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{
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{
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TIMER_DEV->CTL |= CTL_MC_CONT;
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TIMER_BASE->CTL |= CTL_MC_CONT;
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}
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}
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void timer_stop(tim_t dev)
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void timer_stop(tim_t dev)
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{
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{
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TIMER_DEV->CTL &= ~(CTL_MC_MASK);
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TIMER_BASE->CTL &= ~(CTL_MC_MASK);
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}
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}
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void timer_irq_enable(tim_t dev)
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void timer_irq_enable(tim_t dev)
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@ -121,14 +121,14 @@ void timer_irq_disable(tim_t dev)
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void timer_reset(tim_t dev)
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void timer_reset(tim_t dev)
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{
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{
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TIMER_DEV->R = 0;
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TIMER_BASE->R = 0;
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}
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}
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ISR(TIMER_ISR_CC0, isr_timer_a_cc0)
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ISR(TIMER_ISR_CC0, isr_timer_a_cc0)
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{
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{
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__enter_isr();
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__enter_isr();
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TIMER_DEV->CCTL[0] &= ~(CCTL_CCIE);
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TIMER_BASE->CCTL[0] &= ~(CCTL_CCIE);
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isr_cb(0);
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isr_cb(0);
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__exit_isr();
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__exit_isr();
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@ -138,8 +138,8 @@ ISR(TIMER_ISR_CCX, isr_timer_a_ccx_isr)
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{
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{
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__enter_isr();
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__enter_isr();
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int chan = (int)(TIMER_DEV->IV >> 1);
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int chan = (int)(TIMER_BASE->IV >> 1);
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TIMER_DEV->CCTL[chan] &= ~(CCTL_CCIE);
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TIMER_BASE->CCTL[chan] &= ~(CCTL_CCIE);
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isr_cb(chan);
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isr_cb(chan);
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__exit_isr();
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__exit_isr();
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