diff --git a/boards/nucleo-wl55jc/Kconfig b/boards/nucleo-wl55jc/Kconfig
new file mode 100644
index 0000000000..1cc002dbe7
--- /dev/null
+++ b/boards/nucleo-wl55jc/Kconfig
@@ -0,0 +1,28 @@
+# Copyright (c) 2021 Freie Universität Berlin
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config BOARD
+    default "nucleo-wl55jc" if BOARD_NUCLEO_WL55JC
+
+config BOARD_NUCLEO_WL55JC
+    bool
+    default y
+    select BOARD_COMMON_NUCLEO64
+    select CPU_MODEL_STM32WL55JC
+
+    # Put defined MCU peripherals here (in alphabetical order)
+    select HAS_PERIPH_I2C
+    select HAS_PERIPH_LPUART
+    select HAS_PERIPH_RTT
+    select HAS_PERIPH_SPI
+    select HAS_PERIPH_TIMER
+    select HAS_PERIPH_UART
+
+    # Put other features for this board (in alphabetical order)
+    select HAS_RIOTBOOT
+
+source "$(RIOTBOARD)/common/nucleo64/Kconfig"
diff --git a/cpu/stm32/kconfigs/wl/Kconfig b/cpu/stm32/kconfigs/wl/Kconfig
new file mode 100644
index 0000000000..8729dbb112
--- /dev/null
+++ b/cpu/stm32/kconfigs/wl/Kconfig
@@ -0,0 +1,24 @@
+# Copyright (c) 2021 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+config CPU_FAM_WL
+    bool
+    select CPU_STM32
+    select CPU_CORE_CORTEX_M4
+    select HAS_CPU_STM32WL
+    select HAS_PERIPH_FLASHPAGE
+    select HAS_PERIPH_FLASHPAGE_PAGEWISE
+    select HAS_PERIPH_WDT
+    select HAS_BOOTLOADER_STM32
+
+config CPU_FAM
+    default "wl" if CPU_FAM_WL
+
+config HAS_CPU_STM32WL
+    bool
+    help
+        Indicates that the cpu being used belongs to the 'stm32wl' family.
diff --git a/cpu/stm32/kconfigs/wl/Kconfig.lines b/cpu/stm32/kconfigs/wl/Kconfig.lines
new file mode 100644
index 0000000000..c8f60d632f
--- /dev/null
+++ b/cpu/stm32/kconfigs/wl/Kconfig.lines
@@ -0,0 +1,27 @@
+# Copyright (c) 2021 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# This file was auto-generated from ST ProductsList.xlsx sheet using the
+# script in cpu/stm32/dist/kconfig/gen_kconfig.py
+# See cpu/stm32/dist/kconfig/README.md for details
+
+# CPU lines
+config CPU_LINE_STM32WL54XX
+    bool
+    select CPU_FAM_WL
+
+config CPU_LINE_STM32WL55XX
+    bool
+    select CPU_FAM_WL
+
+config CPU_LINE_STM32WLE4XX
+    bool
+    select CPU_FAM_WL
+
+config CPU_LINE_STM32WLE5XX
+    bool
+    select CPU_FAM_WL
diff --git a/cpu/stm32/kconfigs/wl/Kconfig.models b/cpu/stm32/kconfigs/wl/Kconfig.models
new file mode 100644
index 0000000000..113c7bf36d
--- /dev/null
+++ b/cpu/stm32/kconfigs/wl/Kconfig.models
@@ -0,0 +1,74 @@
+# Copyright (c) 2021 Inria
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+#
+
+# This file was auto-generated from ST ProductsList.xlsx sheet using the
+# script in cpu/stm32/dist/kconfig/gen_kconfig.py
+# See cpu/stm32/dist/kconfig/README.md for details
+
+# CPU models
+config CPU_MODEL_STM32WL54CC
+    bool
+    select CPU_LINE_STM32WL54XX
+
+config CPU_MODEL_STM32WL54JC
+    bool
+    select CPU_LINE_STM32WL54XX
+
+config CPU_MODEL_STM32WL55CC
+    bool
+    select CPU_LINE_STM32WL55XX
+
+config CPU_MODEL_STM32WL55JC
+    bool
+    select CPU_LINE_STM32WL55XX
+
+config CPU_MODEL_STM32WLE4CC
+    bool
+    select CPU_LINE_STM32WLE4XX
+
+config CPU_MODEL_STM32WLE4JC
+    bool
+    select CPU_LINE_STM32WLE4XX
+
+config CPU_MODEL_STM32WLE5C8
+    bool
+    select CPU_LINE_STM32WLE5XX
+
+config CPU_MODEL_STM32WLE5CB
+    bool
+    select CPU_LINE_STM32WLE5XX
+
+config CPU_MODEL_STM32WLE5CC
+    bool
+    select CPU_LINE_STM32WLE5XX
+
+config CPU_MODEL_STM32WLE5J8
+    bool
+    select CPU_LINE_STM32WLE5XX
+
+config CPU_MODEL_STM32WLE5JB
+    bool
+    select CPU_LINE_STM32WLE5XX
+
+config CPU_MODEL_STM32WLE5JC
+    bool
+    select CPU_LINE_STM32WLE5XX
+
+# Configure CPU model
+config CPU_MODEL
+    default "stm32wl54cc" if CPU_MODEL_STM32WL54CC
+    default "stm32wl54jc" if CPU_MODEL_STM32WL54JC
+    default "stm32wl55cc" if CPU_MODEL_STM32WL55CC
+    default "stm32wl55jc" if CPU_MODEL_STM32WL55JC
+    default "stm32wle4cc" if CPU_MODEL_STM32WLE4CC
+    default "stm32wle4jc" if CPU_MODEL_STM32WLE4JC
+    default "stm32wle5c8" if CPU_MODEL_STM32WLE5C8
+    default "stm32wle5cb" if CPU_MODEL_STM32WLE5CB
+    default "stm32wle5cc" if CPU_MODEL_STM32WLE5CC
+    default "stm32wle5j8" if CPU_MODEL_STM32WLE5J8
+    default "stm32wle5jb" if CPU_MODEL_STM32WLE5JB
+    default "stm32wle5jc" if CPU_MODEL_STM32WLE5JC