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cpu/ezr32: adapted GPIO driver

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This commit is contained in:
Hauke Petersen 2016-02-20 13:55:41 +01:00
parent cfed0e33cc
commit ba13a74a7e
3 changed files with 23 additions and 36 deletions
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26
cpu/ezr32wg/include/periph_cpu.h
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@ -89,26 +89,18 @@ enum {
};
/**
* @brief Override direction values
* @brief Override GPIO modes
* @{
*/
#define HAVE_GPIO_DIR_T
#define HAVE_GPIO_MODE_T
typedef enum {
GPIO_DIR_IN = 0, /**< configure pin as input */
GPIO_DIR_OUT = 4, /**< configure pin as output */
} gpio_dir_t;
/** @} */
/**
* @brief Override pull register configuration values
* @{
*/
#define HAVE_GPIO_PP_T
typedef enum {
GPIO_NOPULL = 1, /**< do not use internal pull resistors */
GPIO_PULLUP = 6, /**< enable internal pull-up resistor */
GPIO_PULLDOWN = 2 /**< enable internal pull-down resistor */
} gpio_pp_t;
GPIO_IN = _GPIO_P_MODEL_MODE0_INPUT, /**< IN */
GPIO_IN_PD = _GPIO_P_MODEL_MODE0_INPUTPULL, /**< IN with pull-down */
GPIO_IN_PU = _GPIO_P_MODEL_MODE0_INPUTPULL, /**< IN with pull-up */
GPIO_OUT = _GPIO_P_MODEL_MODE0_PUSHPULL, /**< OUT (push-pull) */
GPIO_OD = _GPIO_P_MODEL_MODE0_WIREDAND, /**< OD */
GPIO_OD_PU = _GPIO_P_MODEL_MODE0_WIREDANDPULLUP /**< OD with pull-up */
} gpio_mode_t;
/** @} */
/**

29
cpu/ezr32wg/periph/gpio.c
View File

@ -56,43 +56,38 @@ static inline int _pin_mask(gpio_t pin)
return (1 << _pin_pos(pin));
}
int gpio_init(gpio_t pin, gpio_dir_t dir, gpio_pp_t pushpull)
int gpio_init(gpio_t pin, gpio_mode_t mode)
{
GPIO_P_TypeDef *port = _port(pin);
uint32_t pin_pos = _pin_pos(pin);
uint32_t mode;
/* enable power for the GPIO module */
CMU->HFPERCLKEN0 |= CMU_HFPERCLKEN0_GPIO;
/* if configured as output, no pull resistors are supported */
if ((dir == GPIO_DIR_OUT) && (pushpull != GPIO_NOPULL)) {
return -1;
}
/* configure the pin mode:
* case output: no pull resistors available, use default drive strength
* case input: use input without filter, set pull-up, pull-down or no-pull
* as given */
mode = (dir | (pushpull & 0x3));
/* configure the mode */
port->MODE[pin_pos >> 3] &= ~(0xf << ((pin_pos & 0x7) * 4));
port->MODE[pin_pos >> 3] |= (mode << ((pin_pos & 0x7) * 4));
port->CTRL = GPIO_P_CTRL_DRIVEMODE_DEFAULT;
port->DOUT |= (((pushpull >> 2) & 0x1) << pin_pos);
/* reset output register */
port->DOUTCLR = (1 << pin_pos);
/* if input with pull-up, set the data out register */
if (mode == GPIO_IN_PU) {
port->DOUTSET = (1 << pin_pos);
}
return 0;
}
int gpio_init_int(gpio_t pin, gpio_pp_t pullup, gpio_flank_t flank,
int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
gpio_cb_t cb, void *arg)
{
uint32_t pin_pos = _pin_pos(pin);
/* configure as input */
gpio_init(pin, GPIO_DIR_IN, pullup);
gpio_init(pin, mode);
/* just in case, disable interrupt for this channel */
GPIO->IEN &= ~(1 << pin_pos);
// /* save callback */
/* save callback */
isr_ctx[pin_pos].cb = cb;
isr_ctx[pin_pos].arg = arg;
/* configure interrupt */

4
cpu/ezr32wg/periph/uart.c
View File

@ -67,8 +67,8 @@ int uart_init(uart_t dev, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
* the division afterwards... */
uart->CLKDIV = (((CLOCK_HFPERCLK << 5) / (16 * baudrate) - 32) << 3);
/* configure the pins */
gpio_init(uart_config[dev].rx_pin, GPIO_DIR_IN, GPIO_NOPULL);
gpio_init(uart_config[dev].tx_pin, GPIO_DIR_OUT, GPIO_NOPULL);
gpio_init(uart_config[dev].rx_pin, GPIO_IN);
gpio_init(uart_config[dev].tx_pin, GPIO_OUT);
uart->ROUTE = ((uart_config[dev].loc << _USART_ROUTE_LOCATION_SHIFT) |
USART_ROUTE_RXPEN | USART_ROUTE_TXPEN);
/* enable RX interrupt */