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sam0/uart: add support for hardware flow control

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This commit is contained in:
dylad 2019-12-20 21:19:44 +01:00
parent c9955f9c74
commit bd06772980
3 changed files with 20 additions and 0 deletions
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3
cpu/sam0_common/Makefile.include
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@ -28,6 +28,9 @@ CFLAGS += -DDONT_USE_PREDEFINED_PERIPHERALS_HANDLERS
# For Cortex-M cpu we use the common cortexm.ld linker script
LINKER_SCRIPT ?= cortexm.ld
# define sam0 specific pseudomodules
PSEUDOMODULES += sam0_periph_uart_hw_fc
# include sam0 common periph drivers
USEMODULE += sam0_common_periph

4
cpu/sam0_common/include/periph_cpu_common.h
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@ -211,6 +211,10 @@ typedef struct {
SercomUsart *dev; /**< pointer to the used UART device */
gpio_t rx_pin; /**< pin used for RX */
gpio_t tx_pin; /**< pin used for TX */
#ifdef MODULE_SAM0_PERIPH_UART_HW_FC
gpio_t rts_pin; /**< pin used for RTS */
gpio_t cts_pin; /**< pin used for CTS */
#endif
gpio_mux_t mux; /**< alternative function for pins */
uart_rxpad_t rx_pad; /**< pad selection for RX line */
uart_txpad_t tx_pad; /**< pad selection for TX line */

13
cpu/sam0_common/periph/uart.c
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@ -80,6 +80,19 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
gpio_set(uart_config[uart].tx_pin);
gpio_init_mux(uart_config[uart].tx_pin, uart_config[uart].mux);
#ifdef MODULE_SAM0_PERIPH_UART_HW_FC
/* If RTS/CTS needed, enable them */
if (uart_config[uart].tx_pad == UART_PAD_TX_0_RTS_2_CTS_3) {
/* Ensure RTS is defined */
if (uart_config[uart].rts_pin != GPIO_UNDEF) {
gpio_init_mux(uart_config[uart].rts_pin, uart_config[uart].mux);
}
/* Ensure CTS is defined */
if (uart_config[uart].cts_pin != GPIO_UNDEF) {
gpio_init_mux(uart_config[uart].cts_pin, uart_config[uart].mux);
}
}
#endif
/* enable peripheral clock */
sercom_clk_en(dev(uart));