diff --git a/cpu/fe310/Makefile.dep b/cpu/fe310/Makefile.dep
index 9d1c9bdb2a..ff4abe1366 100644
--- a/cpu/fe310/Makefile.dep
+++ b/cpu/fe310/Makefile.dep
@@ -10,6 +10,8 @@ USEMODULE += sifive_drivers_fe310
 USEMODULE += periph
 USEMODULE += periph_pm
 
+FEATURES_REQUIRED += periph_plic
+
 ifneq (,$(filter periph_rtc,$(USEMODULE)))
   FEATURES_REQUIRED += periph_rtt
 endif
diff --git a/cpu/fe310/irq_arch.c b/cpu/fe310/irq_arch.c
index 53931a5eb3..85bbbd0b18 100644
--- a/cpu/fe310/irq_arch.c
+++ b/cpu/fe310/irq_arch.c
@@ -28,6 +28,7 @@
 #include "irq_arch.h"
 #include "panic.h"
 #include "sched.h"
+#include "plic.h"
 
 #include "vendor/encoding.h"
 #include "vendor/platform.h"
@@ -38,9 +39,6 @@
 
 volatile int fe310_in_isr = 0;
 
-/* PLIC external ISR function list */
-static external_isr_ptr_t _ext_isrs[PLIC_NUM_INTERRUPTS];
-
 /**
  * @brief   ISR trap vector
  */
@@ -60,7 +58,9 @@ void irq_init(void)
     write_csr(mie, 0);
 
     /* Initial PLIC external interrupt controller */
-    PLIC_init(PLIC_CTRL_ADDR, PLIC_NUM_INTERRUPTS, PLIC_NUM_PRIORITIES);
+    if (IS_ACTIVE(MODULE_PERIPH_PLIC)) {
+        plic_init();
+    }
 
     /* Enable SW and external interrupts */
     set_csr(mie, MIP_MSIP);
@@ -70,30 +70,6 @@ void irq_init(void)
     set_csr(mstatus, MSTATUS_DEFAULT);
 }
 
-/**
- * @brief   Set External ISR callback
- */
-void set_external_isr_cb(int intNum, external_isr_ptr_t cbFunc)
-{
-    assert((intNum > 0) && (intNum < PLIC_NUM_INTERRUPTS));
-
-    _ext_isrs[intNum] = cbFunc;
-}
-
-/**
- * @brief External interrupt handler
- */
-void external_isr(void)
-{
-    uint32_t intNum = (uint32_t)PLIC_claim_interrupt();
-
-    if ((intNum > 0) && (intNum < PLIC_NUM_INTERRUPTS) && (_ext_isrs[intNum] != NULL)) {
-        _ext_isrs[intNum](intNum);
-    }
-
-    PLIC_complete_interrupt(intNum);
-}
-
 /**
  * @brief Global trap and interrupt handler
  */
@@ -121,7 +97,9 @@ void handle_trap(uint32_t mcause)
 #endif
             case IRQ_M_EXT:
                 /* Handle external interrupt */
-                external_isr();
+                if (IS_ACTIVE(MODULE_PERIPH_PLIC)) {
+                    plic_isr_handler();
+                }
                 break;
 
             default:
diff --git a/cpu/fe310/periph/gpio.c b/cpu/fe310/periph/gpio.c
index 1255bc0fda..2709403e2b 100644
--- a/cpu/fe310/periph/gpio.c
+++ b/cpu/fe310/periph/gpio.c
@@ -25,6 +25,7 @@
 #include "periph_cpu.h"
 #include "periph_conf.h"
 #include "periph/gpio.h"
+#include "plic.h"
 #include "vendor/encoding.h"
 #include "vendor/platform.h"
 #include "vendor/plic_driver.h"
@@ -144,9 +145,9 @@ int gpio_init_int(gpio_t pin, gpio_mode_t mode, gpio_flank_t flank,
     clear_csr(mie, MIP_MEIP);
 
     /* Configure GPIO ISR with PLIC */
-    set_external_isr_cb(INT_GPIO_BASE + pin, gpio_isr);
-    PLIC_enable_interrupt(INT_GPIO_BASE + pin);
-    PLIC_set_priority(INT_GPIO_BASE + pin, GPIO_INTR_PRIORITY);
+    plic_set_isr_cb(INT_GPIO_BASE + pin, gpio_isr);
+    plic_enable_interrupt(INT_GPIO_BASE + pin);
+    plic_set_priority(INT_GPIO_BASE + pin, GPIO_INTR_PRIORITY);
 
     /*  Configure the active flank(s) */
     gpio_irq_enable(pin);
diff --git a/cpu/fe310/periph/rtt.c b/cpu/fe310/periph/rtt.c
index 9c8d68d966..e758d3aba5 100644
--- a/cpu/fe310/periph/rtt.c
+++ b/cpu/fe310/periph/rtt.c
@@ -29,6 +29,7 @@
 #include "periph_cpu.h"
 #include "periph_conf.h"
 #include "periph/rtt.h"
+#include "plic.h"
 #include "vendor/encoding.h"
 #include "vendor/platform.h"
 #include "vendor/plic_driver.h"
@@ -76,9 +77,9 @@ void rtt_init(void)
     clear_csr(mie, MIP_MEIP);
 
     /* Configure RTC ISR with PLIC */
-    set_external_isr_cb(INT_RTCCMP, rtt_isr);
-    PLIC_enable_interrupt(INT_RTCCMP);
-    PLIC_set_priority(INT_RTCCMP, RTT_INTR_PRIORITY);
+    plic_set_isr_cb(INT_RTCCMP, rtt_isr);
+    plic_enable_interrupt(INT_RTCCMP);
+    plic_set_priority(INT_RTCCMP, RTT_INTR_PRIORITY);
 
     /*  Configure RTC scaler, etc... */
     AON_REG(AON_RTCCFG) = RTT_SCALE;
diff --git a/cpu/fe310/periph/uart.c b/cpu/fe310/periph/uart.c
index 7cc2581d74..8f5567370d 100644
--- a/cpu/fe310/periph/uart.c
+++ b/cpu/fe310/periph/uart.c
@@ -25,6 +25,7 @@
 #include "irq.h"
 #include "cpu.h"
 #include "periph/uart.h"
+#include "plic.h"
 #include "vendor/encoding.h"
 #include "vendor/platform.h"
 #include "vendor/plic_driver.h"
@@ -111,9 +112,9 @@ int uart_init(uart_t dev, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
         clear_csr(mie, MIP_MEIP);
 
         /* Configure UART ISR with PLIC */
-        set_external_isr_cb(uart_config[dev].isr_num, uart_isr);
-        PLIC_enable_interrupt(uart_config[dev].isr_num);
-        PLIC_set_priority(uart_config[dev].isr_num, UART_ISR_PRIO);
+        plic_set_isr_cb(uart_config[dev].isr_num, uart_isr);
+        plic_enable_interrupt(uart_config[dev].isr_num);
+        plic_set_priority(uart_config[dev].isr_num, UART_ISR_PRIO);
 
         /* avoid trap by emptying RX FIFO */
         _drain(dev);