cpu/cortexm_common: flush pipeline before disabling interrupts in idle

When enabling & disabling interrupts back-to-back pending interrupts
are not serviced on Cortex-M23/M33.

Flush the pipeline to give interrupts a chance of executing in `sched_arch_idle()`.

This fixes `no_idle_thread` on Cortex-M23.

cpu/cortexm_common/thread_arch.c

@@ -510,5 +510,6 @@ void sched_arch_idle(void)
     /* Briefly re-enable IRQs to allow pending interrupts to be serviced and
      * have them update the runqueue */
     __enable_irq();
+    __ISB();
     __disable_irq();
 }