diff --git a/boards/common/nrf52/Makefile.dep b/boards/common/nrf52/Makefile.dep new file mode 100644 index 0000000000..b9f6fc79e5 --- /dev/null +++ b/boards/common/nrf52/Makefile.dep @@ -0,0 +1,3 @@ +ifneq (,$(filter skald,$(USEMODULE))) + USEMODULE += nrfble +endif diff --git a/boards/common/nrf52/Makefile.features b/boards/common/nrf52/Makefile.features new file mode 100644 index 0000000000..4b34874d16 --- /dev/null +++ b/boards/common/nrf52/Makefile.features @@ -0,0 +1,10 @@ +# Put defined MCU peripherals here (in alphabetical order) +FEATURES_PROVIDED += periph_gpio periph_gpio_irq +FEATURES_PROVIDED += periph_rtt +FEATURES_PROVIDED += periph_timer + +# Various other features (if any) +FEATURES_PROVIDED += radio_ble +FEATURES_PROVIDED += radio_nrfble + +include $(RIOTCPU)/nrf52/Makefile.features diff --git a/boards/common/nrf52/Makefile.include b/boards/common/nrf52/Makefile.include new file mode 100644 index 0000000000..269a84f145 --- /dev/null +++ b/boards/common/nrf52/Makefile.include @@ -0,0 +1,32 @@ +# this module contains shared code for all boards using the nrf52 CPU +export CPU = nrf52 + +# include this module into the build +INCLUDES += -I$(RIOTBOARD)/common/nrf52/include + +# set default port depending on operating system +PORT_LINUX ?= /dev/ttyACM0 +PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*))) +include $(RIOTMAKE)/tools/serial.inc.mk + +# define jlink as default programmer, but overridable +PROGRAMMER ?= jlink + +ifeq (jlink,$(PROGRAMMER)) + # setup JLink for flashing + export JLINK_DEVICE := nrf52 + + # The following configuration is dependencies specific + # but they are resolved later + # Hack to know now if 'nordic_softdevice_ble' is used + include $(RIOTBOARD)/$(BOARD)/Makefile.dep + + # special options when using SoftDevice + ifneq (,$(filter nordic_softdevice_ble,$(USEPKG))) + export JLINK_PRE_FLASH := erase\nloadfile $(BINDIR)/softdevice.hex + export FLASH_ADDR := 0x1f000 + export LINKER_SCRIPT ?= $(RIOTCPU)/$(CPU)/ldscripts/$(CPU_MODEL)_sd.ld + endif + + include $(RIOTMAKE)/tools/jlink.inc.mk +endif diff --git a/boards/common/nrf52xxxdk/include/board_common.h b/boards/common/nrf52/include/board_common.h similarity index 100% rename from boards/common/nrf52xxxdk/include/board_common.h rename to boards/common/nrf52/include/board_common.h diff --git a/boards/common/nrf52/include/cfg_clock_32_1.h b/boards/common/nrf52/include/cfg_clock_32_1.h new file mode 100644 index 0000000000..5ad7f2c5e8 --- /dev/null +++ b/boards/common/nrf52/include/cfg_clock_32_1.h @@ -0,0 +1,46 @@ +/* + * Copyright (C) 2018 Inria + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_nrf52 + * @{ + * + * @file + * @brief Common clock configuration for the nRF52 based boards + * + * @author Alexandre Abadie + * + */ + +#ifndef CFG_CLOCK_32_1_H +#define CFG_CLOCK_32_1_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name Clock configuration + * + * @note The radio will not work with the internal RC oscillator! + * + * @{ + */ +#define CLOCK_HFCLK (32U) /* set to 0: internal RC oscillator + * 32: 32MHz crystal */ +#define CLOCK_LFCLK (1) /* set to 0: internal RC oscillator + * 1: 32.768 kHz crystal + * 2: derived from HFCLK */ +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* CFG_CLOCK_32_1_H */ +/** @} */ diff --git a/boards/common/nrf52/include/cfg_rtt_default.h b/boards/common/nrf52/include/cfg_rtt_default.h new file mode 100644 index 0000000000..a2ef264ef8 --- /dev/null +++ b/boards/common/nrf52/include/cfg_rtt_default.h @@ -0,0 +1,42 @@ +/* + * Copyright (C) 2018 Inria + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_nrf52 + * @{ + * + * @file + * @brief Default RTT configuration for nRF52 based boards + * + * @author Alexandre Abadie + * + */ + +#ifndef CFG_RTT_DEFAULT_H +#define CFG_RTT_DEFAULT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name Real time counter configuration + * @{ + */ +#define RTT_NUMOF (1U) +#define RTT_DEV (1) /* NRF_RTC1 */ +#define RTT_MAX_VALUE (0x00ffffff) +#define RTT_FREQUENCY (1024) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* CFG_RTT_DEFAULT_H */ +/** @} */ \ No newline at end of file diff --git a/boards/common/nrf52/include/cfg_timer_default.h b/boards/common/nrf52/include/cfg_timer_default.h new file mode 100644 index 0000000000..43f61d1a6a --- /dev/null +++ b/boards/common/nrf52/include/cfg_timer_default.h @@ -0,0 +1,52 @@ +/* + * Copyright (C) 2018 Inria + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_nrf52 + * @{ + * + * @file + * @brief Default timer configuration for nRF52 based boards + * + * @author Alexandre Abadie + * + */ + +#ifndef CFG_TIMER_DEFAULT_H +#define CFG_TIMER_DEFAULT_H + +#include "periph_cpu.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name Timer configuration + * @{ + */ +static const timer_conf_t timer_config[] = { + { + .dev = NRF_TIMER1, + .channels = 3, + .bitmode = TIMER_BITMODE_BITMODE_32Bit, + .irqn = TIMER1_IRQn + } +}; + +#define TIMER_0_ISR isr_timer1 + +#define TIMER_NUMOF (sizeof(timer_config) / sizeof(timer_config[0])) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* CFG_TIMER_DEFAULT_H */ +/** @} */