Merge pull request #14319 from benpicco/cpu/ezr32wg/TIMER_CHANNELS
cpu/ezr32wg: define TIMER_CHANNEL_NUMOF
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cdacdd79e6
@ -38,6 +38,11 @@ extern "C" {
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typedef uint32_t tim_t;
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typedef uint32_t tim_t;
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/** @} */
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/** @} */
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/**
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* @brief This timer implementation has three available channels
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*/
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#define TIMER_CHANNEL_NUMOF (3)
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/**
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/**
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* @brief Starting offset of CPU_ID
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* @brief Starting offset of CPU_ID
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*/
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*/
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@ -26,11 +26,6 @@
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#define ENABLE_DEBUG (0)
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#include "debug.h"
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/**
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* @brief This timer implementation has three available channels
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*/
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#define CC_CHANNELS (3U)
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/**
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/**
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* @brief Timer state memory
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* @brief Timer state memory
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*/
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*/
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@ -87,7 +82,7 @@ int timer_set_absolute(tim_t dev, int channel, unsigned int value)
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{
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{
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TIMER_TypeDef *tim;
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TIMER_TypeDef *tim;
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if ((channel < 0) || (channel >= (int)CC_CHANNELS)) {
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if ((channel < 0) || (channel >= TIMER_CHANNEL_NUMOF)) {
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return -1;
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return -1;
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}
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}
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@ -99,7 +94,7 @@ int timer_set_absolute(tim_t dev, int channel, unsigned int value)
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int timer_clear(tim_t dev, int channel)
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int timer_clear(tim_t dev, int channel)
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{
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{
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if ((channel < 0) || (channel >= (int)CC_CHANNELS)) {
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if ((channel < 0) || (channel >= TIMER_CHANNEL_NUMOF)) {
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return -1;
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return -1;
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}
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}
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@ -131,7 +126,7 @@ void timer_reset(tim_t dev)
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void TIMER_0_ISR(void)
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void TIMER_0_ISR(void)
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{
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{
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TIMER_TypeDef *tim = timer_config[0].timer;
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TIMER_TypeDef *tim = timer_config[0].timer;
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for (unsigned i = 0; i < CC_CHANNELS; i++) {
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for (int i = 0; i < TIMER_CHANNEL_NUMOF; i++) {
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if (tim->IF & (TIMER_IF_CC0 << i)) {
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if (tim->IF & (TIMER_IF_CC0 << i)) {
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tim->CC[i].CTRL = _TIMER_CC_CTRL_MODE_OFF;
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tim->CC[i].CTRL = _TIMER_CC_CTRL_MODE_OFF;
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tim->IFC = (TIMER_IFC_CC0 << i);
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tim->IFC = (TIMER_IFC_CC0 << i);
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