diff --git a/cpu/cc26x2_cc13x2/include/cc26x2_cc13x2_prcm.h b/cpu/cc26x2_cc13x2/include/cc26x2_cc13x2_prcm.h index a8865d3085..c79b683318 100644 --- a/cpu/cc26x2_cc13x2/include/cc26x2_cc13x2_prcm.h +++ b/cpu/cc26x2_cc13x2/include/cc26x2_cc13x2_prcm.h @@ -47,6 +47,30 @@ typedef struct { reg32_t STAT2; /**< Status 2 */ } ddi0_osc_regs_t; +/** + * @brief DDI_0_OSC registers with masked 16-bit access + */ +typedef struct { + reg32_m16_t CTL0; /**< Control 0 */ + reg32_m16_t CTL1; /**< Control 1 */ + reg32_m16_t RADCEXTCFG; /**< RADC External Configuration */ + reg32_m16_t AMPCOMPCTL; /**< Amplitude Compensation Control */ + reg32_m16_t AMPCOMPTH1; /**< Amplitude Compensation Threshold 1 */ + reg32_m16_t AMPCOMPTH2; /**< Amplitude Compensation Threshold 2 */ + reg32_m16_t ANABYPASSVAL1; /**< Analog Bypass Values 1 */ + reg32_m16_t ANABYPASSVAL2; /**< Internal */ + reg32_m16_t ATESTCTL; /**< Analog Test Control */ + reg32_m16_t ADCDOUBLERNANOAMPCTL; /**< ADC Doubler Nanoamp Control */ + reg32_m16_t XOSCHFCTL; /**< XOSCHF Control */ + reg32_m16_t LFOSCCTL; /**< Low Frequency Oscillator Control */ + reg32_m16_t RCOSCHFCTL; /**< RCOSCHF Control */ + reg32_m16_t RCOSCMFCTL; /**< RCOSC_MF Control */ + reg32_m16_t __reserved1; /**< Reserved */ + reg32_m16_t STAT0; /**< Status 0 */ + reg32_m16_t STAT1; /**< Status 1 */ + reg32_m16_t STAT2; /**< Status 2 */ +} ddi0_osc_regs_m16_t; + /** * @brief DDI_0_OSC register values * @{ @@ -71,16 +95,30 @@ typedef struct { * @ingroup cpu_cc26x2_cc13x2_peripheral_memory_map * @{ */ +#define DDI_DIR 0x00000000 +#define DDI_SET 0x00000080 +#define DDI_CLR 0x00000100 +#define DDI_MASK4B 0x00000200 +#define DDI_MASK8B 0x00000300 +#define DDI_MASK16B 0x00000400 /** * @brief DDI0_OSC base address */ #define DDI0_OSC_BASE (PERIPH_BASE + 0xCA000) +/** + * @brief DDI0_OSC 16-bit masked access base address + */ +#define DDI0_OSC_BASE_M16 (DDI0_OSC_BASE + DDI_MASK16B) /** @} */ /** * @brief DDI_0_OSC register bank */ #define DDI_0_OSC ((ddi0_osc_regs_t *) (DDI0_OSC_BASE)) +/** + * @brief DDI_0_OSC 16-bit masked access register bank + */ +#define DDI_0_OSC_M16 ((ddi0_osc_regs_m16_t *) (DDI0_OSC_BASE_M16)) /** * AON_PMCTL registers diff --git a/cpu/cc26xx_cc13xx/include/cc26xx_cc13xx.h b/cpu/cc26xx_cc13xx/include/cc26xx_cc13xx.h index 150560d9e8..fc8d2c6c5b 100644 --- a/cpu/cc26xx_cc13xx/include/cc26xx_cc13xx.h +++ b/cpu/cc26xx_cc13xx/include/cc26xx_cc13xx.h @@ -27,8 +27,30 @@ extern "C" { #endif typedef volatile uint8_t reg8_t; +typedef volatile uint16_t reg16_t; typedef volatile uint32_t reg32_t; +/** + * @brief Masked 8-bit register + */ +typedef struct { + reg8_t LOW; /**< Low 4-bit half */ + reg8_t HIGH; /**< High 4-bit half */ +} reg8_m4_t; + +/** + * @brief Masked 8-bit register + */ +typedef reg16_t reg8_m8_t; + +/** + * @brief Masked 32-bit register + */ +typedef struct { + reg32_t LOW; /**< Low 16-bit half */ + reg32_t HIGH; /**< High 16-bit half */ +} reg32_m16_t; + /** @addtogroup CC13x2_cmsis CMSIS Definitions */ /*@{*/