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cpu/stm32f3: adapted to PWM interface changes

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Hauke Petersen 2015-10-21 12:42:52 +02:00 committed by Joakim Nohlgård
parent 41cbc35b73
commit cf7299c09e
1 changed files with 34 additions and 24 deletions
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58
cpu/stm32f3/periph/pwm.c
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@ -22,13 +22,16 @@
#include <string.h> #include <string.h>
#include "cpu.h" #include "cpu.h"
#include "periph/pwm.h"
#include "periph_conf.h" #include "periph_conf.h"
/* ignore file in case no PWM devices are defined */ /* guard file in case no PWM device is defined */
#if PWM_0_EN || PWM_1_EN #if (PWM_0_EN || PWM_1_EN)
int pwm_init(pwm_t dev, pwm_mode_t mode, unsigned int frequency, unsigned int resolution) /* pull the PWM header inside the guards for now. Guards will be removed on
* adapting this driver implementation... */
#include "periph/pwm.h"
uint32_t pwm_init(pwm_t dev, pwm_mode_t mode, uint32_t freq, uint16_t res)
{ {
TIM_TypeDef *tim = NULL; TIM_TypeDef *tim = NULL;
GPIO_TypeDef *port = NULL; GPIO_TypeDef *port = NULL;
@ -70,7 +73,7 @@ int pwm_init(pwm_t dev, pwm_mode_t mode, unsigned int frequency, unsigned int re
#endif #endif
default: default:
pwm_poweroff(dev); pwm_poweroff(dev);
return -1; return 0;
} }
/* setup pins: alternate function */ /* setup pins: alternate function */
@ -94,12 +97,12 @@ int pwm_init(pwm_t dev, pwm_mode_t mode, unsigned int frequency, unsigned int re
tim->CCMR2 = 0; tim->CCMR2 = 0;
/* set prescale and auto-reload registers to matching values for resolution and frequency */ /* set prescale and auto-reload registers to matching values for resolution and frequency */
if ((resolution > 0xffff) || ((resolution * frequency) > pwm_clk)) { if ((res > 0xffff) || ((res * freq) > pwm_clk)) {
return -2; return 0;
} }
tim->PSC = (pwm_clk / (resolution * frequency)) - 1; tim->PSC = (pwm_clk / (res * freq)) - 1;
tim->ARR = resolution - 1; tim->ARR = res - 1;
frequency = (pwm_clk / (resolution * (tim->PSC + 1))); freq = (pwm_clk / (res * (tim->PSC + 1)));
/* set PWM mode */ /* set PWM mode */
switch (mode) { switch (mode) {
@ -126,10 +129,26 @@ int pwm_init(pwm_t dev, pwm_mode_t mode, unsigned int frequency, unsigned int re
/* enable PWM generation */ /* enable PWM generation */
pwm_start(dev); pwm_start(dev);
return frequency; return freq;
} }
int pwm_set(pwm_t dev, int channel, unsigned int value) uint8_t pwm_channels(pwm_t dev)
{
switch (dev) {
#if PWM_0_EN
case PWM_0:
return PWM_0_CHANNELS;
#endif
#if PWM_1_EN
case PWM_1:
return PWM_1_CHANNELS;
#endif
default:
return 0;
}
}
void pwm_set(pwm_t dev, uint8_t channel, uint16_t value)
{ {
TIM_TypeDef *tim = NULL; TIM_TypeDef *tim = NULL;
@ -145,14 +164,7 @@ int pwm_set(pwm_t dev, int channel, unsigned int value)
break; break;
#endif #endif
default: default:
return -1; return;
}
/* norm value to maximum possible value
* Caution! A duty cycle exceeding the period length can lead to unexpected
* behaviour on other MCUs. */
if (value > 0xffff) {
value = 0xffff;
} }
switch (channel) { switch (channel) {
@ -169,10 +181,8 @@ int pwm_set(pwm_t dev, int channel, unsigned int value)
tim->CCR4 = value; tim->CCR4 = value;
break; break;
default: default:
return -2; return;
} }
return 0;
} }
void pwm_start(pwm_t dev) void pwm_start(pwm_t dev)
@ -239,4 +249,4 @@ void pwm_poweroff(pwm_t dev)
} }
} }
#endif /* PWM_0_EN || PWM_1_EN */ #endif /* (PWM_0_EN || PWM_1_EN) */