cpu/stm32: do not build bootloader for mp1

The stm32mp1 family has no flash. The firmware is loaded directly in
RAM by stlink programmer or by Cortex-A7 bootloader/OS.
Thus bootloader is useless for this family, disable it.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
This commit is contained in:
Gilles DOFFE 2020-08-03 00:31:59 +02:00
parent 4f0fd9cf95
commit d173097d7f
15 changed files with 20 additions and 2 deletions

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@ -8,7 +8,6 @@
config CPU_STM32
bool
select HAS_CPU_STM32
select HAS_BOOTLOADER_STM32
select HAS_PERIPH_CPUID
select HAS_PERIPH_GPIO
select HAS_PERIPH_GPIO_IRQ

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@ -1,6 +1,8 @@
include $(RIOTCPU)/stm32/stm32_info.mk
FEATURES_PROVIDED += bootloader_stm32
ifneq (mp1,$(CPU_FAM))
FEATURES_PROVIDED += bootloader_stm32
endif
FEATURES_PROVIDED += cpu_stm32$(CPU_FAM)
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_gpio periph_gpio_irq

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@ -15,6 +15,8 @@ config CPU_FAM_F0
select HAS_CPU_STM32F0
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_FLASHPAGE_RAW
select HAS_BOOTLOADER_STM32
config HAS_CPU_STM32F0
bool

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@ -12,6 +12,8 @@ config CPU_FAM_F1
select HAS_CPU_STM32F1
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_FLASHPAGE_RAW
select HAS_BOOTLOADER_STM32
config CPU_FAM
default "f1" if CPU_FAM_F1

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@ -12,6 +12,7 @@ config CPU_FAM_F2
select HAS_CPU_STM32F2
select HAS_CORTEXM_MPU
select HAS_PERIPH_HWRNG
select HAS_BOOTLOADER_STM32
config CPU_FAM
default "f2" if CPU_FAM_F2

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@ -12,6 +12,8 @@ config CPU_FAM_F3
select HAS_CPU_STM32F3
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_FLASHPAGE_RAW
select HAS_BOOTLOADER_STM32
config CPU_FAM
default "f3" if CPU_FAM_F3

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@ -11,6 +11,7 @@ config CPU_FAM_F4
select CPU_CORE_CORTEX_M4F
select HAS_CPU_STM32F4
select HAS_CORTEXM_MPU
select HAS_BOOTLOADER_STM32
config CPU_FAM
default "f4" if CPU_FAM_F4

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@ -12,6 +12,7 @@ config CPU_FAM_F7
select HAS_CPU_STM32F7
select HAS_CORTEXM_MPU
select HAS_PERIPH_HWRNG
select HAS_BOOTLOADER_STM32
config CPU_FAM
default "f7" if CPU_FAM_F7

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@ -12,6 +12,8 @@ config CPU_FAM_G0
select HAS_CPU_STM32G0
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_FLASHPAGE_RAW
select HAS_BOOTLOADER_STM32
config CPU_FAM
default "g0" if CPU_FAM_G0

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@ -14,6 +14,7 @@ config CPU_FAM_G4
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_HWRNG
select HAS_BOOTLOADER_STM32
config CPU_FAM
default "g4" if CPU_FAM_G4

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@ -13,6 +13,7 @@ config CPU_FAM_L0
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_EEPROM
select HAS_BOOTLOADER_STM32
config CPU_FAM
default "l0" if CPU_FAM_L0

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@ -14,6 +14,7 @@ config CPU_FAM_L1
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_EEPROM
select HAS_BOOTLOADER_STM32
config CPU_FAM
default "l1" if CPU_FAM_L1

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@ -14,6 +14,7 @@ config CPU_FAM_L4
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_HWRNG
select HAS_BOOTLOADER_STM32
config CPU_FAM
default "l4" if CPU_FAM_L4

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@ -13,6 +13,7 @@ config CPU_FAM_L5
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_HWRNG
select HAS_BOOTLOADER_STM32
config CPU_FAM
default "l5" if CPU_FAM_L5

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@ -13,6 +13,7 @@ config CPU_FAM_WB
select HAS_PERIPH_FLASHPAGE
select HAS_PERIPH_FLASHPAGE_PAGEWISE
select HAS_PERIPH_HWRNG
select HAS_BOOTLOADER_STM32
config CPU_FAM
default "wb" if CPU_FAM_WB