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cpu/sam21_common: remove define of LITTLE_ENDIAN

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This define conflicts with LITTLE_ENDIAN defined in
include/machine/endian.h which is part of gcc-arm-none-eabi.

Also, the define does not seem to be used by the ASF included files.
This commit is contained in:
Kees Bakker 2016-09-06 21:03:30 +02:00
parent e118525731
commit d367090c44
7 changed files with 12 additions and 6 deletions
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12
cpu/sam21_common/include/cmsis/samr21/README.md
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@ -13,3 +13,15 @@ the trailing white space had to be removed. Please take this into account
when comparing to the original ASF distribution.
find include/ -name '*.h' -exec sed -i 's/\s*$//' '{}' +
## LITTLE_ENDIAN
These include files define `LITTLE_ENDIAN`. But we think this is wrong. It
seems more logical to let the compiler decide in which mode the ARM code is
to be translated. In include/machine/endian.h there is already a define of
`LITTLE_ENDIAN` (and `BIG_ENDIAN`) for a different purpose.
So, we decided to remove the define from the ASF CMSIS files. The command
for it (running from this directory) is:
find include/ -name '*.h' -exec sed -i '/^#define\s\s*LITTLE_ENDIAN/d' '{}' +

1
cpu/sam21_common/include/cmsis/samr21/include/samr21e16a.h
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@ -229,7 +229,6 @@ void I2S_Handler ( void );
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
*/
#define LITTLE_ENDIAN 1
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
#define __MPU_PRESENT 0 /*!< MPU present or not */
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */

1
cpu/sam21_common/include/cmsis/samr21/include/samr21e17a.h
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@ -229,7 +229,6 @@ void I2S_Handler ( void );
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
*/
#define LITTLE_ENDIAN 1
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
#define __MPU_PRESENT 0 /*!< MPU present or not */
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */

1
cpu/sam21_common/include/cmsis/samr21/include/samr21e18a.h
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@ -229,7 +229,6 @@ void I2S_Handler ( void );
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
*/
#define LITTLE_ENDIAN 1
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
#define __MPU_PRESENT 0 /*!< MPU present or not */
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */

1
cpu/sam21_common/include/cmsis/samr21/include/samr21g16a.h
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@ -229,7 +229,6 @@ void I2S_Handler ( void );
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
*/
#define LITTLE_ENDIAN 1
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
#define __MPU_PRESENT 0 /*!< MPU present or not */
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */

1
cpu/sam21_common/include/cmsis/samr21/include/samr21g17a.h
View File

@ -229,7 +229,6 @@ void I2S_Handler ( void );
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
*/
#define LITTLE_ENDIAN 1
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
#define __MPU_PRESENT 0 /*!< MPU present or not */
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */

1
cpu/sam21_common/include/cmsis/samr21/include/samr21g18a.h
View File

@ -229,7 +229,6 @@ void I2S_Handler ( void );
* \brief Configuration of the Cortex-M0+ Processor and Core Peripherals
*/
#define LITTLE_ENDIAN 1
#define __CM0PLUS_REV 1 /*!< Core revision r0p1 */
#define __MPU_PRESENT 0 /*!< MPU present or not */
#define __NVIC_PRIO_BITS 2 /*!< Number of bits used for Priority Levels */