Merge pull request #6819 from aabadie/nucleo_l1_adc_dac
stm32l1: add adc & dac support, update configuration for nucleo-l1
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commit
d36bf378fc
@ -1,5 +1,7 @@
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# Put defined MCU peripherals here (in alphabetical order)
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_dac
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_pwm
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FEATURES_PROVIDED += periph_pwm
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@ -49,13 +49,6 @@ extern "C" {
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#define CLOCK_APB1 (CLOCK_CORECLOCK / 1)
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#define CLOCK_APB1 (CLOCK_CORECLOCK / 1)
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/** @} */
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/** @} */
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/**
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* @name DAC configuration
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* @{
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*/
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#define DAC_NUMOF (0)
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/** @} */
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/**
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/**
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* @name Timer configuration
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* @name Timer configuration
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* @{
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* @{
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@ -221,7 +214,34 @@ static const i2c_conf_t i2c_config[] = {
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{I2C2, GPIO_PIN(PORT_B, 10), GPIO_PIN(PORT_B, 11), GPIO_OD_PU,
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{I2C2, GPIO_PIN(PORT_B, 10), GPIO_PIN(PORT_B, 11), GPIO_OD_PU,
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GPIO_AF4, I2C2_ER_IRQn, I2C2_EV_IRQn},
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GPIO_AF4, I2C2_ER_IRQn, I2C2_EV_IRQn},
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};
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};
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/** @} */
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/**
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* @name ADC configuration
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* @{
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*/
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#define ADC_CONFIG { \
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{ GPIO_PIN(PORT_A, 0), 0 }, \
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{ GPIO_PIN(PORT_A, 1), 1 }, \
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{ GPIO_PIN(PORT_A, 4), 4 }, \
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{ GPIO_PIN(PORT_B, 0), 8 }, \
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{ GPIO_PIN(PORT_C, 1), 11 }, \
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{ GPIO_PIN(PORT_C, 0), 10 }, \
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}
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#define ADC_NUMOF (6U)
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/** @} */
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/**
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* @name DAC configuration
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* @{
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*/
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#define DAC_CONFIG { \
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{ GPIO_PIN(PORT_A, 4), 1}, \
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{ GPIO_PIN(PORT_A, 5), 2}, \
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}
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#define DAC_NUMOF (2U)
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/** @} */
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/** @} */
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#ifdef __cplusplus
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#ifdef __cplusplus
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@ -49,6 +49,30 @@ typedef struct {
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uint8_t chan; /**< DAC device used for this line */
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uint8_t chan; /**< DAC device used for this line */
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} dac_conf_t;
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} dac_conf_t;
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/**
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* @brief ADC channel configuration data
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*/
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typedef struct {
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gpio_t pin; /**< pin connected to the channel */
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uint8_t chan; /**< CPU ADC channel connected to the pin */
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} adc_conf_t;
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/**
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* @brief Override the ADC resolution configuration
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* @{
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*/
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = (0x3 << 3), /**< ADC resolution: 6 bit */
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ADC_RES_8BIT = (0x2 << 3), /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = (0x1 << 3), /**< ADC resolution: 10 bit */
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ADC_RES_12BIT = (0x0 << 3), /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = (0xfe), /**< not applicable */
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ADC_RES_16BIT = (0xff) /**< not applicable */
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} adc_res_t;
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/** @} */
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/**
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/**
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* @brief I2C configuration data structure
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* @brief I2C configuration data structure
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*/
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*/
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137
cpu/stm32l1/periph/adc.c
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137
cpu/stm32l1/periph/adc.c
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@ -0,0 +1,137 @@
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/*
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* Copyright (C) 2016 Fundacion Inria Chile
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_stm32l1
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* @{
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*
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* @file
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* @brief Low-level ADC driver implementation
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*
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* @author Francisco Molina <francisco.molina@inria.cl>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Nick v. IJzendoorn <nijzendoorn@engineering-spirit.nl>
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*
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* @}
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*/
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#include "cpu.h"
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#include "mutex.h"
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#include "periph/adc.h"
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#ifdef ADC_CONFIG
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/**
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* @brief Maximum allowed ADC clock speed
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*/
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#define MAX_ADC_SPEED (12000000U)
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/**
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* @brief Load the ADC configuration
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*/
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static const adc_conf_t adc_config[] = ADC_CONFIG;
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/**
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* @brief Allocate locks for all three available ADC device
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*
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* All STM32l1 CPU's have single ADC device
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*/
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static mutex_t lock = MUTEX_INIT;
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static inline void prep(void)
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{
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mutex_lock(&lock);
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RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
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}
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static inline void done(void)
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{
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RCC->APB2ENR &= ~(RCC_APB2ENR_ADC1EN);
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mutex_unlock(&lock);
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}
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int adc_init(adc_t line)
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{
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uint32_t clk_div = 2;
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/* check if the line is valid */
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if (line >= ADC_NUMOF) {
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return -1;
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}
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/* lock and power-on the device */
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prep();
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/* configure the pin */
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if ((adc_config[line].pin != GPIO_UNDEF))
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gpio_init_analog(adc_config[line].pin);
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/* set clock prescaler to get the maximal possible ADC clock value */
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for (clk_div = 2; clk_div < 8; clk_div += 2) {
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if ((CLOCK_CORECLOCK / clk_div) <= MAX_ADC_SPEED) {
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break;
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}
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}
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ADC->CCR = ((clk_div / 2) - 1) << 16;
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/* check if this channel is an internal ADC channel, if so
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* enable the internal temperature and Vref */
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if (adc_config[line].chan == 16 || adc_config[line].chan == 17) {
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ADC->CCR |= ADC_CCR_TSVREFE;
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}
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/* enable the ADC module */
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ADC1->CR2 = ADC_CR2_ADON;
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/* turn off during idle phase*/
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ADC1->CR1 = ADC_CR1_PDI;
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/* free the device again */
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done();
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return 0;
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}
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int adc_sample(adc_t line, adc_res_t res)
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{
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int sample;
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/* check if resolution is applicable */
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if ( (res != ADC_RES_6BIT) &&
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(res != ADC_RES_8BIT) &&
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(res != ADC_RES_10BIT) &&
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(res != ADC_RES_12BIT)) {
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return -1;
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}
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/* lock and power on the ADC device */
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prep();
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/* set resolution, conversion channel and single read */
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ADC1->CR1 |= res & ADC_CR1_RES;
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ADC1->SQR1 &= ~ADC_SQR1_L;
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ADC1->SQR5 = adc_config[line].chan;
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/* wait for regulat channel to be ready*/
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while (!(ADC1->SR & ADC_SR_RCNR)) {}
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/* start conversion and wait for results */
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ADC1->CR2 |= ADC_CR2_SWSTART;
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while (!(ADC1->SR & ADC_SR_EOC)) {}
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/* finally read sample and reset the STRT bit in the status register */
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sample = (int)ADC1->DR;
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ADC1 -> SR &= ~ADC_SR_STRT;
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/* power off and unlock device again */
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done();
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return sample;
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}
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#else
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typedef int dont_be_pedantic;
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#endif /* ADC_CONFIG */
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@ -31,11 +31,11 @@ DISABLE_TEST_FOR_ARM7 := tests-relic
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ARM_CORTEX_M_BOARDS := airfy-beacon arduino-due arduino-zero cc2538dk ek-lm4f120xl \
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ARM_CORTEX_M_BOARDS := airfy-beacon arduino-due arduino-zero cc2538dk ek-lm4f120xl \
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f4vi1 fox frdm-k64f iotlab-m3 limifrog-v1 mbed_lpc1768 msbiot \
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f4vi1 fox frdm-k64f iotlab-m3 limifrog-v1 mbed_lpc1768 msbiot \
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mulle nrf51dongle nrf6310 nucleo144-f303 nucleo144-f429 nucleo144-f446 \
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mulle nrf51dongle nrf52840dk nrf6310 nucleo144-f303 nucleo144-f429 \
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nucleo32-f031 nucleo32-f303 nucleo32-l031 nucleo-f030 nucleo-f070 nucleo-f091 \
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nucleo144-f446 nucleo32-f031 nucleo32-f303 nucleo32-l031 nucleo-f030 \
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nucleo-f302 nucleo-f303 nucleo-f334 nucleo-f401 nucleo-f410 nucleo-f411 \
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nucleo-f070 nucleo-f072 nucleo-f091 nucleo-f302 nucleo-f303 nucleo-f334 \
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nucleo-l053 nucleo-l073 nucleo-l1 nucleo-l476 \
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nucleo-f401 nucleo-f410 nucleo-f411 nucleo-l053 nucleo-l073 nucleo-l1 \
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opencm904 openmote-cc2538 pba-d-01-kw2x \
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nucleo-l476 opencm904 openmote-cc2538 pba-d-01-kw2x \
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pca10000 pca10005 remote saml21-xpro samr21-xpro slwstk6220a sodaq-autonomo \
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pca10000 pca10005 remote saml21-xpro samr21-xpro slwstk6220a sodaq-autonomo \
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spark-core stm32f0discovery stm32f3discovery stm32f4discovery \
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spark-core stm32f0discovery stm32f3discovery stm32f4discovery \
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udoo weio yunjia-nrf51822
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udoo weio yunjia-nrf51822
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