From e200d009ad8767901110d2d6ac4a4950cd8f85f1 Mon Sep 17 00:00:00 2001 From: Benjamin Valentin Date: Thu, 8 Oct 2020 20:53:56 +0200 Subject: [PATCH] boards/common/weact-f4x1cx: create common WeAct boards dir --- boards/common/weact-f4x1cx/Kconfig | 19 ++ boards/common/weact-f4x1cx/Makefile | 3 + boards/common/weact-f4x1cx/Makefile.dep | 15 ++ boards/common/weact-f4x1cx/Makefile.features | 14 ++ boards/common/weact-f4x1cx/Makefile.include | 15 ++ boards/common/weact-f4x1cx/board.c | 64 ++++++ boards/common/weact-f4x1cx/doc.txt | 6 + boards/common/weact-f4x1cx/include/board.h | 94 +++++++++ .../common/weact-f4x1cx/include/gpio_params.h | 53 +++++ .../common/weact-f4x1cx/include/periph_conf.h | 192 ++++++++++++++++++ 10 files changed, 475 insertions(+) create mode 100644 boards/common/weact-f4x1cx/Kconfig create mode 100644 boards/common/weact-f4x1cx/Makefile create mode 100644 boards/common/weact-f4x1cx/Makefile.dep create mode 100644 boards/common/weact-f4x1cx/Makefile.features create mode 100644 boards/common/weact-f4x1cx/Makefile.include create mode 100644 boards/common/weact-f4x1cx/board.c create mode 100644 boards/common/weact-f4x1cx/doc.txt create mode 100644 boards/common/weact-f4x1cx/include/board.h create mode 100644 boards/common/weact-f4x1cx/include/gpio_params.h create mode 100644 boards/common/weact-f4x1cx/include/periph_conf.h diff --git a/boards/common/weact-f4x1cx/Kconfig b/boards/common/weact-f4x1cx/Kconfig new file mode 100644 index 0000000000..0671430d6b --- /dev/null +++ b/boards/common/weact-f4x1cx/Kconfig @@ -0,0 +1,19 @@ +# Copyright (c) 2020 Benjamin Valentin +# +# This file is subject to the terms and conditions of the GNU Lesser +# General Public License v2.1. See the file LICENSE in the top level +# directory for more details. +# + +config BOARD_COMMON_WEACT_F41XCX + bool + # Put defined MCU peripherals here (in alphabetical order) + select HAS_PERIPH_ADC + select HAS_PERIPH_I2C + select HAS_PERIPH_PWM + select HAS_PERIPH_RTC + select HAS_PERIPH_SPI + select HAS_PERIPH_TIMER + select HAS_PERIPH_UART + select HAS_PERIPH_USBDEV + select HAS_HIGHLEVEL_STDIO diff --git a/boards/common/weact-f4x1cx/Makefile b/boards/common/weact-f4x1cx/Makefile new file mode 100644 index 0000000000..efd298c0b6 --- /dev/null +++ b/boards/common/weact-f4x1cx/Makefile @@ -0,0 +1,3 @@ +MODULE = boards_common_weact-f4x1cx + +include $(RIOTBASE)/Makefile.base diff --git a/boards/common/weact-f4x1cx/Makefile.dep b/boards/common/weact-f4x1cx/Makefile.dep new file mode 100644 index 0000000000..b20039bc5f --- /dev/null +++ b/boards/common/weact-f4x1cx/Makefile.dep @@ -0,0 +1,15 @@ +ifneq (,$(filter saul_default,$(USEMODULE))) + USEMODULE += saul_gpio +endif + +include $(RIOTBOARD)/common/makefiles/stdio_cdc_acm.dep.mk + +ifneq (,$(filter stdio_cdc_acm,$(USEMODULE))) + # The Mask-ROM bootloader provides USB-DFU capability + FEATURES_REQUIRED += bootloader_stm32 + USEMODULE += usb_board_reset +endif + +ifneq (,$(filter mtd,$(USEMODULE))) + USEMODULE += mtd_spi_nor +endif diff --git a/boards/common/weact-f4x1cx/Makefile.features b/boards/common/weact-f4x1cx/Makefile.features new file mode 100644 index 0000000000..d2d81aba42 --- /dev/null +++ b/boards/common/weact-f4x1cx/Makefile.features @@ -0,0 +1,14 @@ +CPU = stm32 + +# Put defined MCU peripherals here (in alphabetical order) +FEATURES_PROVIDED += periph_adc +FEATURES_PROVIDED += periph_i2c +FEATURES_PROVIDED += periph_pwm +FEATURES_PROVIDED += periph_rtc +FEATURES_PROVIDED += periph_spi +FEATURES_PROVIDED += periph_timer +FEATURES_PROVIDED += periph_uart +FEATURES_PROVIDED += periph_usbdev + +# Various other features (if any) +FEATURES_PROVIDED += highlevel_stdio diff --git a/boards/common/weact-f4x1cx/Makefile.include b/boards/common/weact-f4x1cx/Makefile.include new file mode 100644 index 0000000000..5e89e89ab5 --- /dev/null +++ b/boards/common/weact-f4x1cx/Makefile.include @@ -0,0 +1,15 @@ +INCLUDES += -I$(RIOTBOARD)/common/stm32/include +INCLUDES += -I$(RIOTBOARD)/common/weact-f4x1cx/include + +# default to flashing over USB +PROGRAMMER ?= dfu-util +DFU_USB_ID ?= 0483:df11 +DFU_FLAGS ?= -a 0 -s 0x08000000:leave +ROM_OFFSET ?= 0x0 + +# CDC ACM is available faster on STM32 +TERM_DELAY ?= 1 + +# Setup of programmer and serial is shared between STM32 based boards +include $(RIOTMAKE)/boards/stm32.inc.mk +include $(RIOTMAKE)/tools/usb_board_reset.mk diff --git a/boards/common/weact-f4x1cx/board.c b/boards/common/weact-f4x1cx/board.c new file mode 100644 index 0000000000..6acbb13c2b --- /dev/null +++ b/boards/common/weact-f4x1cx/board.c @@ -0,0 +1,64 @@ +/* + * Copyright (C) 2019 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_weact-f4x1cx + * @{ + * + * @file + * @brief Board initialization code for the WeAct-F4x1Cx board. + * + * @author Benjamin Valentin + * + * @} + */ + +#include "board.h" +#include "cpu.h" +#include "mtd.h" +#include "mtd_spi_nor.h" +#include "periph/gpio.h" +#include "timex.h" + +#ifdef MODULE_MTD +/* AT25SF041 */ +static const mtd_spi_nor_params_t _weact_nor_params = { + .opcode = &mtd_spi_nor_opcode_default, + .wait_chip_erase = 4800LU * US_PER_MS, + .wait_32k_erase = 300LU * US_PER_MS, + .wait_sector_erase = 70LU * US_PER_MS, + .wait_chip_wake_up = 1LU * US_PER_MS, + .clk = WEACT_4X1CX_NOR_SPI_CLK, + .flag = WEACT_4X1CX_NOR_FLAGS, + .spi = WEACT_4X1CX_NOR_SPI_DEV, + .mode = WEACT_4X1CX_NOR_SPI_MODE, + .cs = WEACT_4X1CX_NOR_SPI_CS, + .wp = GPIO_UNDEF, + .hold = GPIO_UNDEF, + .addr_width = 3, +}; + +static mtd_spi_nor_t weact_nor_dev = { + .base = { + .driver = &mtd_spi_nor_driver, + .page_size = WEACT_4X1CX_NOR_PAGE_SIZE, + .pages_per_sector = WEACT_4X1CX_NOR_PAGES_PER_SECTOR, + }, + .params = &_weact_nor_params, +}; + +mtd_dev_t *mtd0 = (mtd_dev_t *)&weact_nor_dev; +#endif /* MODULE_MTD */ + +void board_init(void) +{ + cpu_init(); + + gpio_init(LED0_PIN, GPIO_OUT); + LED0_OFF; +} diff --git a/boards/common/weact-f4x1cx/doc.txt b/boards/common/weact-f4x1cx/doc.txt new file mode 100644 index 0000000000..7d1afedabc --- /dev/null +++ b/boards/common/weact-f4x1cx/doc.txt @@ -0,0 +1,6 @@ +/** +@defgroup boards_common_weact-f4x1cx WeAct-F4x1Cx common code +@ingroup boards_common +@brief Support for cheap stm32f401/stm32f411 based boards by WeAct. + + */ diff --git a/boards/common/weact-f4x1cx/include/board.h b/boards/common/weact-f4x1cx/include/board.h new file mode 100644 index 0000000000..34757c802a --- /dev/null +++ b/boards/common/weact-f4x1cx/include/board.h @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2019 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_weact-f4x1cx + * + * @brief Support for the WeAct-F4x1Cx Board + * @{ + * + * @file + * @brief Pin definitions and board configuration options + * + * @author Benjamin Valentin + */ + +#ifndef BOARD_H +#define BOARD_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include "mtd.h" +#include "periph_cpu.h" + +/** + * @name xtimer configuration + * @{ + */ +#define XTIMER_BACKOFF (8) +#define XTIMER_OVERHEAD (6) +/** @} */ + +/** + * @name LED pin definition and handlers + * @{ + */ +#define LED0_PORT GPIOC +#define LED0_PIN GPIO_PIN(PORT_C, 13) +#define LED0_MASK (1 << 13) + +#define LED0_ON (LED0_PORT->BSRR = (LED0_MASK << 16)) +#define LED0_OFF (LED0_PORT->BSRR = (LED0_MASK << 0)) +#define LED0_TOGGLE (LED0_PORT->ODR ^= LED0_MASK) +/** @} */ + +/** + * @name User button pin definition + * @{ + */ +#define BTN0_PIN GPIO_PIN(PORT_A, 0) +#define BTN0_MODE GPIO_IN_PU +/** @} */ + +/** + * @name WeAct-F4X1CX NOR flash hardware configuration + * + * The pad for the NOR Flash (U3) is not populated. + * You have to solder a serial flash yourself and adjust the parameters. + * @{ + */ +#define WEACT_4X1CX_NOR_PAGE_SIZE (256) +#define WEACT_4X1CX_NOR_PAGES_PER_SECTOR (16) +#define WEACT_4X1CX_NOR_FLAGS (SPI_NOR_F_SECT_4K | SPI_NOR_F_SECT_32K) +#define WEACT_4X1CX_NOR_SPI_DEV SPI_DEV(0) +#define WEACT_4X1CX_NOR_SPI_CLK SPI_CLK_10MHZ +#define WEACT_4X1CX_NOR_SPI_CS GPIO_PIN(PORT_A, 4) +#define WEACT_4X1CX_NOR_SPI_MODE SPI_MODE_0 +/** @} */ + +/** + * @name MTD configuration + * @{ + */ +extern mtd_dev_t *mtd0; +#define MTD_0 mtd0 +/** @} */ + +/** + * @brief Initialize board specific hardware, including clock, LEDs and std-IO + */ +void board_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* BOARD_H */ +/** @} */ diff --git a/boards/common/weact-f4x1cx/include/gpio_params.h b/boards/common/weact-f4x1cx/include/gpio_params.h new file mode 100644 index 0000000000..a3948f2cfd --- /dev/null +++ b/boards/common/weact-f4x1cx/include/gpio_params.h @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2019 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_weact-f4x1cx + * @{ + * + * @file + * @brief Board specific configuration of direct mapped GPIOs + * + * @author Benjamin Valentin + */ + +#ifndef GPIO_PARAMS_H +#define GPIO_PARAMS_H + +#include "board.h" +#include "saul/periph.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief GPIO pin configuration + */ +static const saul_gpio_params_t saul_gpio_params[] = +{ + { + .name = "LED", + .pin = LED0_PIN, + .mode = GPIO_OUT, + .flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR) + }, + { + .name = "KEY", + .pin = BTN0_PIN, + .mode = BTN0_MODE, + .flags = SAUL_GPIO_INVERTED + }, +}; + +#ifdef __cplusplus +} +#endif + +#endif /* GPIO_PARAMS_H */ +/** @} */ diff --git a/boards/common/weact-f4x1cx/include/periph_conf.h b/boards/common/weact-f4x1cx/include/periph_conf.h new file mode 100644 index 0000000000..37537b72e0 --- /dev/null +++ b/boards/common/weact-f4x1cx/include/periph_conf.h @@ -0,0 +1,192 @@ +/* + * Copyright (C) 2019 Benjamin Valentin + * + * This file is subject to the terms and conditions of the GNU Lesser + * General Public License v2.1. See the file LICENSE in the top level + * directory for more details. + */ + +/** + * @ingroup boards_common_weact-f4x1cx + * @{ + * + * @file + * @brief Peripheral MCU configuration for the WeAct-F4X1CX Board + * + * @author Hauke Petersen + * @author José Ignacio Alamos + * @author Alexandre Abadie + * @author Benjamin Valentin + */ + +#ifndef PERIPH_CONF_H +#define PERIPH_CONF_H + +/* This board provides an LSE */ +#ifndef CONFIG_BOARD_HAS_LSE +#define CONFIG_BOARD_HAS_LSE 1 +#endif + +/* This board provides an HSE */ +#ifndef CONFIG_BOARD_HAS_HSE +#define CONFIG_BOARD_HAS_HSE 1 +#endif + +/* The HSE provides a 25MHz clock */ +#define CLOCK_HSE MHZ(25) + +#include "clk_conf.h" +#include "cfg_i2c1_pb8_pb9.h" +#include "cfg_timer_tim5.h" +#include "cfg_usb_otg_fs.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @name UART configuration + * @{ + */ +static const uart_conf_t uart_config[] = { + { + .dev = USART2, + .rcc_mask = RCC_APB1ENR_USART2EN, + .rx_pin = GPIO_PIN(PORT_A, 3), + .tx_pin = GPIO_PIN(PORT_A, 2), + .rx_af = GPIO_AF7, + .tx_af = GPIO_AF7, + .bus = APB1, + .irqn = USART2_IRQn, +#ifdef MODULE_PERIPH_DMA + .dma = DMA_STREAM_UNDEF, + .dma_chan = UINT8_MAX, +#endif + }, + { + .dev = USART1, + .rcc_mask = RCC_APB2ENR_USART1EN, + .rx_pin = GPIO_PIN(PORT_A, 10), + .tx_pin = GPIO_PIN(PORT_A, 9), + .rx_af = GPIO_AF7, + .tx_af = GPIO_AF7, + .bus = APB2, + .irqn = USART1_IRQn, +#ifdef MODULE_PERIPH_DMA + .dma = DMA_STREAM_UNDEF, + .dma_chan = UINT8_MAX, +#endif + }, +}; + +/* assign ISR vector names */ +#define UART_0_ISR isr_usart2 +#define UART_1_ISR isr_usart1 + +/* deduct number of defined UART interfaces */ +#define UART_NUMOF ARRAY_SIZE(uart_config) +/** @} */ + +/** @name PWM configuration + * @{ + */ +static const pwm_conf_t pwm_config[] = { + { + .dev = TIM2, + .rcc_mask = RCC_APB1ENR_TIM2EN, + .chan = { { .pin = GPIO_PIN(PORT_A, 15), .cc_chan = 0 }, + { .pin = GPIO_PIN(PORT_B, 3), /* D3 */ .cc_chan = 1 }, + { .pin = GPIO_PIN(PORT_B, 10), /* D6 */ .cc_chan = 2 }, + { .pin = GPIO_UNDEF, .cc_chan = 0 } }, + .af = GPIO_AF1, + .bus = APB1 + }, + { + .dev = TIM3, + .rcc_mask = RCC_APB1ENR_TIM3EN, + .chan = { { .pin = GPIO_PIN(PORT_B, 4), /* D5 */ .cc_chan = 0 }, + { .pin = GPIO_PIN(PORT_C, 7), /* D9 */ .cc_chan = 1 }, + { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 }, + { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } }, + .af = GPIO_AF2, + .bus = APB1 + }, +}; + +#define PWM_NUMOF ARRAY_SIZE(pwm_config) +/** @} */ + +/** + * @name SPI configuration + * @{ + */ +static const spi_conf_t spi_config[] = { + { /* U3 - SPI flash */ + .dev = SPI1, + .mosi_pin = GPIO_PIN(PORT_A, 7), + .miso_pin = GPIO_PIN(PORT_A, 6), + .sclk_pin = GPIO_PIN(PORT_A, 5), + .cs_pin = GPIO_PIN(PORT_A, 4), + .mosi_af = GPIO_AF5, + .miso_af = GPIO_AF5, + .sclk_af = GPIO_AF5, + .cs_af = GPIO_AF5, + .rccmask = RCC_APB2ENR_SPI1EN, + .apbbus = APB2 + }, + { + .dev = SPI2, + .mosi_pin = GPIO_PIN(PORT_B, 15), + .miso_pin = GPIO_PIN(PORT_B, 14), + .sclk_pin = GPIO_PIN(PORT_B, 13), + .cs_pin = GPIO_PIN(PORT_B, 12), + .mosi_af = GPIO_AF5, + .miso_af = GPIO_AF5, + .sclk_af = GPIO_AF5, + .cs_af = GPIO_AF5, + .rccmask = RCC_APB1ENR_SPI2EN, + .apbbus = APB1 + }, + { + .dev = SPI3, + .mosi_pin = GPIO_PIN(PORT_B, 5), + .miso_pin = GPIO_PIN(PORT_B, 4), + .sclk_pin = GPIO_PIN(PORT_B, 3), + .cs_pin = GPIO_PIN(PORT_A, 15), + .mosi_af = GPIO_AF6, + .miso_af = GPIO_AF6, + .sclk_af = GPIO_AF6, + .cs_af = GPIO_AF6, + .rccmask = RCC_APB1ENR_SPI3EN, + .apbbus = APB1 + }, +}; + +#define SPI_NUMOF ARRAY_SIZE(spi_config) +/** @} */ + +/** + * @name ADC configuration + * + * Note that we do not configure all ADC channels, + * and not in the STM32F4x1 order. + * Feel free to add more if needed. + * + * @{ + */ +static const adc_conf_t adc_config[] = { + {GPIO_PIN(PORT_A, 0), 0, 0}, + {GPIO_PIN(PORT_A, 1), 0, 1}, + {GPIO_PIN(PORT_A, 4), 0, 4}, + {GPIO_PIN(PORT_B, 0), 0, 8}, +}; + +#define ADC_NUMOF ARRAY_SIZE(adc_config) +/** @} */ + +#ifdef __cplusplus +} +#endif + +#endif /* PERIPH_CONF_H */ +/** @} */