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iot-lab_M3: refactor at86rf231 driver

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This commit is contained in:
Thomas Eichinger 2014-07-24 20:08:58 +02:00
parent b86b78bcb2
commit e59bc2eb9d
7 changed files with 92 additions and 128 deletions
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2
boards/iot-lab_M3/Makefile.include
View File

@ -13,7 +13,7 @@ export AS = $(PREFIX)as
export LINK = $(PREFIX)gcc
export SIZE = $(PREFIX)size
export OBJCOPY = $(PREFIX)objcopy
export TERMPROG = $(RIOTBASE)/dist/tools/pyterm/pyterm.py
export TERMPROG = $(RIOTBASE)/dist/tools/pyterm/pyterm -p
export FLASHER = $(RIOTBOARD)/$(BOARD)/dist/flash.sh
export DEBUGGER = $(RIOTBOARD)/$(BOARD)/dist/debug.sh

101
boards/iot-lab_M3/drivers/at86rf231_driver.c
View File

@ -46,27 +46,6 @@ GPIO
SLEEP : PA2 : control sleep, tx & rx state
*/
static inline void RESET_CLR(void)
{
SPI_0_RESET_PORT->BRR = (1 << SPI_0_RESET_PIN);
}
static inline void RESET_SET(void)
{
SPI_0_RESET_PORT->BSRR = (1 << SPI_0_RESET_PIN);
}
static inline void CSn_SET(void)
{
SPI_0_CS_PORT->BSRR = (1 << SPI_0_CS_PIN);
}
static inline void CSn_CLR(void)
{
SPI_0_CS_PORT->BRR = (1 << SPI_0_CS_PIN);
}
static inline void SLEEP_CLR(void)
{
SPI_0_SLEEP_PORT->BRR = (1 << SPI_0_SLEEP_PIN);
}
uint8_t at86rf231_get_status(void)
{
return at86rf231_reg_read(AT86RF231_REG__TRX_STATUS)
@ -74,12 +53,42 @@ uint8_t at86rf231_get_status(void)
}
static void enable_exti_interrupt(void)
void at86rf231_spi_select(void)
{
SPI_0_CS_PORT->BRR = (1 << SPI_0_CS_PIN);
}
void at86rf231_spi_unselect(void)
{
SPI_0_CS_PORT->BSRR = (1 << SPI_0_CS_PIN);
}
void at86rf231_slp_set(void)
{
SPI_0_SLEEP_PORT->BSRR = (1 << SPI_0_SLEEP_PIN);
}
void at86rf231_slp_clear(void)
{
SPI_0_SLEEP_PORT->BRR = (1 << SPI_0_SLEEP_PIN);
}
void at86rf231_rst_set(void)
{
SPI_0_RESET_PORT->BRR = (1 << SPI_0_RESET_PIN);
}
void at86rf231_rst_clear(void)
{
SPI_0_RESET_PORT->BSRR = (1 << SPI_0_RESET_PIN);
}
void at86rf231_enable_interrupts(void)
{
gpio_irq_enable(SPI_0_IRQ0_GPIO);
}
static void disable_exti_interrupt(void)
void at86rf231_disable_interrupts(void)
{
gpio_irq_disable(SPI_0_IRQ0_GPIO);
}
@ -102,10 +111,10 @@ void at86rf231_gpio_spi_interrupts_init(void)
/* IRQ0 */
gpio_init_in(SPI_0_IRQ0_GPIO, GPIO_NOPULL);
gpio_init_int(SPI_0_IRQ0_GPIO, GPIO_NOPULL, GPIO_RISING, at86rf231_rx_irq);
gpio_init_int(SPI_0_IRQ0_GPIO, GPIO_NOPULL, GPIO_RISING, (gpio_cb_t)at86rf231_rx_irq, NULL);
/* Connect EXTI4 Line to PC4 pin */
enable_exti_interrupt();
at86rf231_enable_interrupts();
/* CS */
gpio_init_out(SPI_0_CS_GPIO, GPIO_NOPULL);
@ -119,32 +128,28 @@ void at86rf231_gpio_spi_interrupts_init(void)
void at86rf231_reset(void)
{
/* force reset */
RESET_CLR();
CSn_SET();
SLEEP_CLR();
at86rf231_rst_set();
vtimer_usleep(AT86RF231_TIMING__RESET);
/* put pins to default values */
at86rf231_spi_unselect();
at86rf231_slp_clear();
RESET_SET();
/* additional waiting to comply to min rst pulse width */
uint8_t delay = 50;
while (delay--){}
/* Wait until TRX_OFF is entered */
vtimer_usleep(AT86RF231_TIMING__RESET_TO_TRX_OFF);
at86rf231_rst_clear();
/* Send a FORCE TRX OFF command */
at86rf231_reg_write(AT86RF231_REG__TRX_STATE, AT86RF231_TRX_STATE__FORCE_TRX_OFF);
/* Wait until TRX_OFF state is entered from P_ON */
vtimer_usleep(AT86RF231_TIMING__SLEEP_TO_TRX_OFF);
/* busy wait for TRX_OFF state */
uint8_t status;
uint8_t max_wait = 100; // TODO : move elsewhere, this is in 10us
uint8_t max_wait = 100;
do {
status = at86rf231_get_status();
vtimer_usleep(10);
if (!--max_wait) {
printf("at86rf231 : ERROR : could not enter TRX_OFF mode\n");
break;
@ -153,22 +158,14 @@ void at86rf231_reset(void)
!= AT86RF231_TRX_STATUS__TRX_OFF);
}
void at86rf231_spi_select(void)
uint8_t at86rf231_spi_transfer_byte(uint8_t byte)
{
CSn_CLR();
char ret;
spi_transfer_byte(SPI_0, byte, &ret);
return ret;
}
void at86rf231_spi_unselect(void)
void at86rf231_spi_transfer(const uint8_t *data_out, uint8_t *data_in, uint16_t length)
{
CSn_SET();
}
void at86rf231_enable_interrupts(void)
{
enable_exti_interrupt();
}
void at86rf231_disable_interrupts(void)
{
disable_exti_interrupt();
spi_transfer_bytes(SPI_0, (char*)data_out, (char*)data_in, length);
}

11
boards/iot-lab_M3/drivers/at86rf231_spi1.c
View File

@ -36,14 +36,3 @@ GPIO
SLEEP : PA2 : control sleep, tx & rx state
*/
uint8_t at86rf231_spi_transfer_byte(uint8_t byte)
{
char ret;
spi_transfer_byte(SPI_0, byte, &ret);
return ret;
}
void at86rf231_spi_transfer(const uint8_t *data_out, uint8_t *data_in, uint16_t length)
{
spi_transfer_bytes(SPI_0, (char*)data_out, (char*)data_in, length);
}

88
cpu/stm32f1/periph/gpio.c
View File

@ -31,7 +31,8 @@
#include "debug.h"
typedef struct {
void (*cb)(void);
gpio_cb_t cb; /**< callback called from GPIO interrupt */
void *arg; /**< argument passed to the callback */
} gpio_state_t;
static gpio_state_t config[GPIO_NUMOF];
@ -155,7 +156,6 @@ int gpio_init_out(gpio_t dev, gpio_pp_t pullup)
break;
#endif
case GPIO_UNDEFINED:
default:
return -1;
}
@ -292,7 +292,6 @@ int gpio_init_in(gpio_t dev, gpio_pp_t pullup)
pin = GPIO_15_PIN;
break;
#endif
case GPIO_UNDEFINED:
default:
return -1;
}
@ -309,7 +308,7 @@ int gpio_init_in(gpio_t dev, gpio_pp_t pullup)
return 0; /* everything alright here */
}
int gpio_init_int(gpio_t dev, gpio_pp_t pullup, gpio_flank_t flank, void (*cb)(void))
int gpio_init_int(gpio_t dev, gpio_pp_t pullup, gpio_flank_t flank, gpio_cb_t cb, void *arg)
{
int res;
uint8_t exti_line;
@ -475,7 +474,6 @@ int gpio_init_int(gpio_t dev, gpio_pp_t pullup, gpio_flank_t flank, void (*cb)(v
NVIC_EnableIRQ(GPIO_15_IRQ);
break;
#endif
case GPIO_UNDEFINED:
default:
return -1;
}
@ -507,7 +505,7 @@ int gpio_init_int(gpio_t dev, gpio_pp_t pullup, gpio_flank_t flank, void (*cb)(v
return 0;
}
int gpio_irq_enable(gpio_t dev)
void gpio_irq_enable(gpio_t dev)
{
uint8_t exti_line;
@ -592,21 +590,17 @@ int gpio_irq_enable(gpio_t dev)
exti_line = GPIO_15_EXTI_LINE;
break;
#endif
case GPIO_UNDEFINED:
default:
return -1;
}
/* save state */
int state = (EXTI->IMR & (1 << exti_line) >> exti_line);
// int state = (EXTI->IMR & (1 << exti_line) >> exti_line);
/* unmask the pins interrupt channel */
EXTI->IMR |= (1 << exti_line);
return state;
return;
}
int gpio_irq_disable(gpio_t dev)
void gpio_irq_disable(gpio_t dev)
{
uint8_t exti_line;
@ -691,17 +685,14 @@ int gpio_irq_disable(gpio_t dev)
exti_line = GPIO_15_EXTI_LINE;
break;
#endif
case GPIO_UNDEFINED:
default:
return -1;
}
/* save state */
int state = ((EXTI->IMR & (1 << exti_line)) >> exti_line);
// /* save state */
// int state = ((EXTI->IMR & (1 << exti_line)) >> exti_line);
/* unmask the pins interrupt channel */
EXTI->IMR &= ~(1 << exti_line);
return state;
return;
}
int gpio_read(gpio_t dev)
@ -806,7 +797,6 @@ int gpio_read(gpio_t dev)
pin = GPIO_15_PIN;
break;
#endif
case GPIO_UNDEFINED:
default:
return -1;
}
@ -827,7 +817,7 @@ int gpio_read(gpio_t dev)
}
}
int gpio_set(gpio_t dev)
void gpio_set(gpio_t dev)
{
switch (dev) {
#ifdef GPIO_0_EN
@ -910,15 +900,12 @@ int gpio_set(gpio_t dev)
GPIO_15_PORT->ODR |= (1 << GPIO_15_PIN);
break;
#endif
case GPIO_UNDEFINED:
default:
return -1;
}
return 0;
return;
}
int gpio_clear(gpio_t dev)
void gpio_clear(gpio_t dev)
{
switch (dev) {
#ifdef GPIO_0_EN
@ -1001,32 +988,29 @@ int gpio_clear(gpio_t dev)
GPIO_15_PORT->ODR &= ~(1 << GPIO_15_PIN);
break;
#endif
case GPIO_UNDEFINED:
default:
return -1;
}
return 0;
return;
}
int gpio_toggle(gpio_t dev)
void gpio_toggle(gpio_t dev)
{
if (gpio_read(dev)) {
return gpio_clear(dev);
gpio_clear(dev);
}
else {
return gpio_set(dev);
gpio_set(dev);
}
}
int gpio_write(gpio_t dev, int value)
void gpio_write(gpio_t dev, int value)
{
if (value) {
return gpio_set(dev);
gpio_set(dev);
}
else {
return gpio_clear(dev);
gpio_clear(dev);
}
}
@ -1035,7 +1019,7 @@ __attribute__((naked)) void isr_exti0(void)
ISR_ENTER();
if (EXTI->PR & EXTI_PR_PR0) {
EXTI->PR |= EXTI_PR_PR0; /* clear status bit by writing a 1 to it */
config[GPIO_0].cb();
config[GPIO_0].cb(config[GPIO_0].arg);
}
if (sched_context_switch_request) {
@ -1049,7 +1033,7 @@ __attribute__((naked)) void isr_exti1(void)
ISR_ENTER();
if (EXTI->PR & EXTI_PR_PR1) {
EXTI->PR |= EXTI_PR_PR1; /* clear status bit by writing a 1 to it */
config[GPIO_1].cb();
config[GPIO_1].cb(config[GPIO_1].arg);
}
if (sched_context_switch_request) {
@ -1063,7 +1047,7 @@ __attribute__((naked)) void isr_exti2(void)
ISR_ENTER();
if (EXTI->PR & EXTI_PR_PR2) {
EXTI->PR |= EXTI_PR_PR2; /* clear status bit by writing a 1 to it */
config[GPIO_2].cb();
config[GPIO_2].cb(config[GPIO_2].arg);
}
if (sched_context_switch_request) {
@ -1077,7 +1061,7 @@ __attribute__((naked)) void isr_exti3(void)
ISR_ENTER();
if (EXTI->PR & EXTI_PR_PR3) {
EXTI->PR |= EXTI_PR_PR3; /* clear status bit by writing a 1 to it */
config[GPIO_3].cb();
config[GPIO_3].cb(config[GPIO_3].arg);
}
if (sched_context_switch_request) {
@ -1091,7 +1075,7 @@ __attribute__((naked)) void isr_exti4(void)
ISR_ENTER();
if (EXTI->PR & EXTI_PR_PR4) {
EXTI->PR |= EXTI_PR_PR4; /* clear status bit by writing a 1 to it */
config[GPIO_4].cb();
config[GPIO_4].cb(config[GPIO_4].arg);
}
if (sched_context_switch_request) {
@ -1105,23 +1089,23 @@ __attribute__((naked)) void isr_exti9_5(void)
ISR_ENTER();
if (EXTI->PR & EXTI_PR_PR5) {
EXTI->PR |= EXTI_PR_PR5; /* clear status bit by writing a 1 to it */
config[GPIO_5].cb();
config[GPIO_5].cb(config[GPIO_5].arg);
}
else if (EXTI->PR & EXTI_PR_PR6) {
EXTI->PR |= EXTI_PR_PR6; /* clear status bit by writing a 1 to it */
config[GPIO_6].cb();
config[GPIO_6].cb(config[GPIO_6].arg);
}
else if (EXTI->PR & EXTI_PR_PR7) {
EXTI->PR |= EXTI_PR_PR7; /* clear status bit by writing a 1 to it */
config[GPIO_7].cb();
config[GPIO_7].cb(config[GPIO_7].arg);
}
else if (EXTI->PR & EXTI_PR_PR8) {
EXTI->PR |= EXTI_PR_PR8; /* clear status bit by writing a 1 to it */
config[GPIO_8].cb();
config[GPIO_8].cb(config[GPIO_8].arg);
}
else if (EXTI->PR & EXTI_PR_PR9) {
EXTI->PR |= EXTI_PR_PR9; /* clear status bit by writing a 1 to it */
config[GPIO_9].cb();
config[GPIO_9].cb(config[GPIO_9].arg);
}
if (sched_context_switch_request) {
@ -1135,27 +1119,27 @@ __attribute__((naked)) void isr_exti15_10(void)
ISR_ENTER();
if (EXTI->PR & EXTI_PR_PR10) {
EXTI->PR |= EXTI_PR_PR10; /* clear status bit by writing a 1 to it */
config[GPIO_10].cb();
config[GPIO_10].cb(config[GPIO_10].arg);
}
else if (EXTI->PR & EXTI_PR_PR11) {
EXTI->PR |= EXTI_PR_PR11; /* clear status bit by writing a 1 to it */
config[GPIO_11].cb();
config[GPIO_11].cb(config[GPIO_11].arg);
}
else if (EXTI->PR & EXTI_PR_PR12) {
EXTI->PR |= EXTI_PR_PR12; /* clear status bit by writing a 1 to it */
config[GPIO_12].cb();
config[GPIO_12].cb(config[GPIO_12].arg);
}
else if (EXTI->PR & EXTI_PR_PR13) {
EXTI->PR |= EXTI_PR_PR13; /* clear status bit by writing a 1 to it */
config[GPIO_13].cb();
config[GPIO_13].cb(config[GPIO_13].arg);
}
else if (EXTI->PR & EXTI_PR_PR14) {
EXTI->PR |= EXTI_PR_PR14; /* clear status bit by writing a 1 to it */
config[GPIO_14].cb();
config[GPIO_14].cb(config[GPIO_14].arg);
}
else if (EXTI->PR & EXTI_PR_PR15) {
EXTI->PR |= EXTI_PR_PR15; /* clear status bit by writing a 1 to it */
config[GPIO_15].cb();
config[GPIO_15].cb(config[GPIO_15].arg);
}
if (sched_context_switch_request) {

14
cpu/stm32f1/periph/uart.c
View File

@ -38,8 +38,9 @@
* @brief Each UART device has to store two callbacks.
*/
typedef struct {
void (*rx_cb)(char);
void (*tx_cb)(void);
uart_rx_cb_t rx_cb;
uart_tx_cb_t tx_cb;
void *arg;
} uart_conf_t;
@ -58,7 +59,7 @@ static inline void irq_handler(uart_t uartnum, USART_TypeDef *uart);
static uart_conf_t config[UART_NUMOF];
int uart_init(uart_t uart, uint32_t baudrate, void (*rx_cb)(char), void (*tx_cb)(void))
int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, uart_tx_cb_t tx_cb, void *arg)
{
int res;
@ -84,7 +85,6 @@ int uart_init(uart_t uart, uint32_t baudrate, void (*rx_cb)(char), void (*tx_cb)
UART_1_DEV->CR1 |= USART_CR1_RXNEIE;
break;
#endif
case UART_UNDEFINED:
default:
return -2;
}
@ -131,7 +131,6 @@ int uart_init_blocking(uart_t uart, uint32_t baudrate)
UART_1_PORT_CLKEN();
break;
#endif
case UART_UNDEFINED:
default:
return -2;
}
@ -180,7 +179,6 @@ void uart_tx_begin(uart_t uart)
UART_1_DEV->CR1 |= USART_CR1_TXEIE;
break;
#endif
case UART_UNDEFINED:
break;
}
}
@ -198,7 +196,6 @@ void uart_tx_end(uart_t uart)
UART_1_DEV->CR1 &= ~USART_CR1_TXEIE;
break;
#endif
case UART_UNDEFINED:
break;
}
}
@ -218,7 +215,6 @@ int uart_write(uart_t uart, char data)
dev = UART_1_DEV;
break;
#endif
case UART_UNDEFINED:
default:
return -1;
}
@ -245,7 +241,6 @@ int uart_read_blocking(uart_t uart, char *data)
dev = UART_1_DEV;
break;
#endif
case UART_UNDEFINED:
default:
return -1;
}
@ -271,7 +266,6 @@ int uart_write_blocking(uart_t uart, char data)
dev = UART_1_DEV;
break;
#endif
case UART_UNDEFINED:
default:
return -1;
}

2
cpu/stm32f1/syscalls.c
View File

@ -46,7 +46,7 @@ caddr_t heap_top = (caddr_t)&_end + 4;
void _init(void)
{
#ifdef MODULE_UART0
uart_init(UART_0, 115200, NULL, NULL);
uart_init(UART_0, 115200, NULL, NULL, NULL);
#else
uart_init_blocking(UART_0, 115200);
#endif

2
drivers/include/at86rf231.h
View File

@ -31,7 +31,7 @@ typedef struct __attribute__((packed))
}
at86rf231_packet_t;
extern int transceiver_pid;
extern volatile kernel_pid_t transceiver_pid;
#define AT_DRIVER_STATE_DEFAULT (0)
#define AT_DRIVER_STATE_SENDING (1)