diff --git a/cpu/sam0_common/Kconfig b/cpu/sam0_common/Kconfig
index c548bfe4d5..9a525df6fc 100644
--- a/cpu/sam0_common/Kconfig
+++ b/cpu/sam0_common/Kconfig
@@ -19,6 +19,7 @@ config CPU_COMMON_SAM0
     select HAS_PERIPH_TIMER_PERIODIC
     select HAS_PERIPH_UART_MODECFG
     select HAS_PERIPH_UART_NONBLOCKING
+    select HAS_PERIPH_UART_RECONFIGURE
     select HAS_PERIPH_WDT
     select HAS_PERIPH_WDT_CB
     select HAS_PERIPH_WDT_WARNING_PERIOD
diff --git a/cpu/sam0_common/Makefile.features b/cpu/sam0_common/Makefile.features
index 89d252458a..26f1801594 100644
--- a/cpu/sam0_common/Makefile.features
+++ b/cpu/sam0_common/Makefile.features
@@ -9,6 +9,7 @@ FEATURES_PROVIDED += periph_spi_reconfigure
 FEATURES_PROVIDED += periph_timer_periodic # implements timer_set_periodic()
 FEATURES_PROVIDED += periph_uart_modecfg
 FEATURES_PROVIDED += periph_uart_nonblocking
+FEATURES_PROVIDED += periph_uart_reconfigure
 FEATURES_PROVIDED += periph_wdt periph_wdt_cb periph_wdt_warning_period
 
 -include $(RIOTCPU)/cortexm_common/Makefile.features
diff --git a/cpu/sam0_common/include/periph_cpu_common.h b/cpu/sam0_common/include/periph_cpu_common.h
index d6247437cd..bd43ff88c9 100644
--- a/cpu/sam0_common/include/periph_cpu_common.h
+++ b/cpu/sam0_common/include/periph_cpu_common.h
@@ -189,6 +189,15 @@ typedef enum {
     UART_DATA_BITS_8 = 0x0,   /**< 8 data bits */
 } uart_data_bits_t;
 /** @} */
+
+/**
+ * @brief   UART pin getters
+ * @{
+ */
+#define uart_pin_rx(dev) uart_config[dev].rx_pin
+#define uart_pin_tx(dev) uart_config[dev].tx_pin
+/** @} */
+
 #endif /* ndef DOXYGEN */
 
 
diff --git a/cpu/sam0_common/periph/uart.c b/cpu/sam0_common/periph/uart.c
index 82cbb63a7c..3297cf0e37 100644
--- a/cpu/sam0_common/periph/uart.c
+++ b/cpu/sam0_common/periph/uart.c
@@ -188,6 +188,42 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
     return UART_OK;
 }
 
+void uart_init_pins(uart_t uart)
+{
+    _configure_pins(uart);
+
+    uart_poweron(uart);
+}
+
+void uart_deinit_pins(uart_t uart)
+{
+    uart_poweroff(uart);
+
+    /* de-configure RX pin */
+    if (uart_config[uart].rx_pin != GPIO_UNDEF) {
+        gpio_disable_mux(uart_config[uart].rx_pin);
+    }
+
+    /* de-configure TX pin */
+    if (uart_config[uart].tx_pin != GPIO_UNDEF) {
+        gpio_disable_mux(uart_config[uart].tx_pin);
+    }
+
+#ifdef MODULE_PERIPH_UART_HW_FC
+    /* If RTS/CTS needed, enable them */
+    if (uart_config[uart].tx_pad == UART_PAD_TX_0_RTS_2_CTS_3) {
+        /* Ensure RTS is defined */
+        if (uart_config[uart].rts_pin != GPIO_UNDEF) {
+            gpio_disable_mux(uart_config[uart].rts_pin);
+        }
+        /* Ensure CTS is defined */
+        if (uart_config[uart].cts_pin != GPIO_UNDEF) {
+            gpio_disable_mux(uart_config[uart].cts_pin);
+        }
+    }
+#endif
+}
+
 void uart_write(uart_t uart, const uint8_t *data, size_t len)
 {
     if (uart_config[uart].tx_pin == GPIO_UNDEF) {