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boards/nucleo-l476rg: Add DMA support

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This commit is contained in:
Leandro Lanzieri 2019-06-21 09:40:03 +02:00
parent abf4d60286
commit e92516e31c
2 changed files with 39 additions and 10 deletions
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1
boards/nucleo-l476rg/Makefile.features
View File

@ -1,5 +1,6 @@
# Put defined MCU peripherals here (in alphabetical order) # Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_adc FEATURES_PROVIDED += periph_adc
FEATURES_PROVIDED += periph_dma
FEATURES_PROVIDED += periph_i2c FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_pwm FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc FEATURES_PROVIDED += periph_rtc

48
boards/nucleo-l476rg/include/periph_conf.h
View File

@ -90,6 +90,28 @@ extern "C" {
#define CLOCK_APB2 (CLOCK_CORECLOCK / 2) #define CLOCK_APB2 (CLOCK_CORECLOCK / 2)
/** @} */ /** @} */
/**
* @name DMA streams configuration
* @{
*/
#ifdef MODULE_PERIPH_DMA
static const dma_conf_t dma_config[] = {
{ .stream = 1 }, /* DMA1 Channel 2 - SPI1_RX | USART3_TX */
{ .stream = 2 }, /* DMA1 Channel 3 - SPI1_TX */
{ .stream = 3 }, /* DMA1 Channel 4 - USART1_TX */
{ .stream = 6 }, /* DMA1 Channel 7 - USART2_TX */
};
#define DMA_0_ISR isr_dma1_channel2
#define DMA_1_ISR isr_dma1_channel3
#define DMA_2_ISR isr_dma1_channel4
#define DMA_3_ISR isr_dma1_channel7
#define DMA_NUMOF (sizeof(dma_config) / sizeof(dma_config[0]))
#endif /* MODULE_PERIPH_DMA */
/** @} */
/** /**
* @name Timer configuration * @name Timer configuration
* @{ * @{
@ -125,9 +147,9 @@ static const uart_conf_t uart_config[] = {
.irqn = USART2_IRQn, .irqn = USART2_IRQn,
.type = STM32_USART, .type = STM32_USART,
.clk_src = 0, /* Use APB clock */ .clk_src = 0, /* Use APB clock */
#ifdef UART_USE_DMA #ifdef MODULE_PERIPH_DMA
.dma_stream = 6, .dma = 3,
.dma_chan = 4 .dma_chan = 2
#endif #endif
}, },
{ {
@ -141,9 +163,9 @@ static const uart_conf_t uart_config[] = {
.irqn = USART3_IRQn, .irqn = USART3_IRQn,
.type = STM32_USART, .type = STM32_USART,
.clk_src = 0, /* Use APB clock */ .clk_src = 0, /* Use APB clock */
#ifdef UART_USE_DMA #ifdef MODULE_PERIPH_DMA
.dma_stream = 5, .dma = 0,
.dma_chan = 4 .dma_chan = 2
#endif #endif
}, },
{ {
@ -157,9 +179,9 @@ static const uart_conf_t uart_config[] = {
.irqn = USART1_IRQn, .irqn = USART1_IRQn,
.type = STM32_USART, .type = STM32_USART,
.clk_src = 0, /* Use APB clock */ .clk_src = 0, /* Use APB clock */
#ifdef UART_USE_DMA #ifdef MODULE_PERIPH_DMA
.dma_stream = 4, .dma = 2,
.dma_chan = 4 .dma_chan = 2
#endif #endif
} }
}; };
@ -244,7 +266,13 @@ static const spi_conf_t spi_config[] = {
.cs_pin = GPIO_UNDEF, .cs_pin = GPIO_UNDEF,
.af = GPIO_AF5, .af = GPIO_AF5,
.rccmask = RCC_APB2ENR_SPI1EN, .rccmask = RCC_APB2ENR_SPI1EN,
.apbbus = APB2 .apbbus = APB2,
#ifdef MODULE_PERIPH_DMA
.tx_dma = 1,
.tx_dma_chan = 1,
.rx_dma = 0,
.rx_dma_chan = 1,
#endif
} }
}; };