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cpu, sam0_common: periph/uart use read-only bit-fields

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This commit is contained in:
smlng 2017-09-22 09:53:02 +02:00
parent 55b2d484f7
commit ea1aa38b86
1 changed files with 11 additions and 11 deletions
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14
cpu/sam0_common/periph/uart.c
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@ -72,7 +72,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
/* reset the UART device */ /* reset the UART device */
dev(uart)->CTRLA.reg = SERCOM_USART_CTRLA_SWRST; dev(uart)->CTRLA.reg = SERCOM_USART_CTRLA_SWRST;
while (dev(uart)->SYNCBUSY.reg & SERCOM_USART_SYNCBUSY_SWRST) {} while (dev(uart)->SYNCBUSY.bit.SWRST) {}
/* configure clock generator */ /* configure clock generator */
sercom_set_gen(dev(uart), uart_config[uart].gclk_src); sercom_set_gen(dev(uart), uart_config[uart].gclk_src);
@ -95,7 +95,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
dev(uart)->BAUD.FRAC.BAUD = (baud / 10); dev(uart)->BAUD.FRAC.BAUD = (baud / 10);
/* enable transmitter, and configure 8N1 mode */ /* enable transmitter, and configure 8N1 mode */
dev(uart)->CTRLB.reg = (SERCOM_USART_CTRLB_TXEN); dev(uart)->CTRLB.reg = SERCOM_USART_CTRLB_TXEN;
/* enable receiver and RX interrupt if configured */ /* enable receiver and RX interrupt if configured */
if (rx_cb) { if (rx_cb) {
uart_ctx[uart].rx_cb = rx_cb; uart_ctx[uart].rx_cb = rx_cb;
@ -108,7 +108,7 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
dev(uart)->CTRLB.reg |= SERCOM_USART_CTRLB_SFDE; dev(uart)->CTRLB.reg |= SERCOM_USART_CTRLB_SFDE;
} }
} }
while (dev(uart)->SYNCBUSY.reg & SERCOM_USART_SYNCBUSY_CTRLB) {} while (dev(uart)->SYNCBUSY.bit.CTRLB) {}
/* and finally enable the device */ /* and finally enable the device */
dev(uart)->CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE; dev(uart)->CTRLA.reg |= SERCOM_USART_CTRLA_ENABLE;
@ -119,10 +119,10 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
void uart_write(uart_t uart, const uint8_t *data, size_t len) void uart_write(uart_t uart, const uint8_t *data, size_t len)
{ {
for (size_t i = 0; i < len; i++) { for (size_t i = 0; i < len; i++) {
while (!(dev(uart)->INTFLAG.reg & SERCOM_USART_INTFLAG_DRE)) {} while (!dev(uart)->INTFLAG.bit.DRE) {}
dev(uart)->DATA.reg = data[i]; dev(uart)->DATA.reg = data[i];
} }
while (!(dev(uart)->INTFLAG.reg & SERCOM_USART_INTFLAG_TXC)) {} while (!dev(uart)->INTFLAG.bit.TXC) {}
} }
void uart_poweron(uart_t uart) void uart_poweron(uart_t uart)
@ -139,12 +139,12 @@ void uart_poweroff(uart_t uart)
static inline void irq_handler(unsigned uartnum) static inline void irq_handler(unsigned uartnum)
{ {
if (dev(uartnum)->INTFLAG.reg & SERCOM_USART_INTFLAG_RXC) { if (dev(uartnum)->INTFLAG.bit.RXC) {
/* interrupt flag is cleared by reading the data register */ /* interrupt flag is cleared by reading the data register */
uart_ctx[uartnum].rx_cb(uart_ctx[uartnum].arg, uart_ctx[uartnum].rx_cb(uart_ctx[uartnum].arg,
(uint8_t)(dev(uartnum)->DATA.reg)); (uint8_t)(dev(uartnum)->DATA.reg));
} }
else if (dev(uartnum)->INTFLAG.reg & SERCOM_USART_INTFLAG_ERROR) { else if (dev(uartnum)->INTFLAG.bit.ERROR) {
/* clear error flag */ /* clear error flag */
dev(uartnum)->INTFLAG.reg = SERCOM_USART_INTFLAG_ERROR; dev(uartnum)->INTFLAG.reg = SERCOM_USART_INTFLAG_ERROR;
} }