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cpu/samd21: uart: now using padd setting from board config

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Notice the extra fields in uart_conf_t for rx_pad and tx_pad.
This commit is contained in:
Kees Bakker 2016-08-02 22:29:36 +02:00
parent 845ef0decd
commit ea8b90fa5f
2 changed files with 6 additions and 5 deletions
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4
boards/samr21-xpro/include/periph_conf.h
View File

@ -105,8 +105,8 @@ extern "C" {
*/
static const uart_conf_t uart_config[] = {
/* device, RX pin, TX pin, mux */
{&SERCOM0->USART, GPIO_PIN(PA,5), GPIO_PIN(PA,4), GPIO_MUX_D},
{&SERCOM5->USART, GPIO_PIN(PA,23), GPIO_PIN(PA,22), GPIO_MUX_D},
{&SERCOM0->USART, GPIO_PIN(PA,5), GPIO_PIN(PA,4), GPIO_MUX_D, SERCOM_RX_PAD_1, UART_TX_PAD_0},
{&SERCOM5->USART, GPIO_PIN(PA,23), GPIO_PIN(PA,22), GPIO_MUX_D, SERCOM_RX_PAD_1, UART_TX_PAD_0},
};
/* interrupt function name mapping */

7
cpu/samd21/periph/uart.c
View File

@ -86,11 +86,12 @@ static int init_base(uart_t uart, uint32_t baudrate)
/* reset the UART device */
dev->CTRLA.reg = SERCOM_USART_CTRLA_SWRST;
while (dev->SYNCBUSY.reg & SERCOM_USART_SYNCBUSY_SWRST) {}
/* set asynchronous mode w/o parity, LSB first, PAD0 to TX, PAD1 to RX and
/* set asynchronous mode w/o parity, LSB first, PADn to TX, PADn to RX and
* use internal clock */
dev->CTRLA.reg = (SERCOM_USART_CTRLA_DORD |
SERCOM_USART_CTRLA_RXPO(0x1) |
SERCOM_USART_CTRLA_SAMPR(0x1) |
SERCOM_USART_CTRLA_TXPO(uart_config[uart].tx_pad) |
SERCOM_USART_CTRLA_RXPO(uart_config[uart].rx_pad) |
SERCOM_USART_CTRLA_SAMPR(0x1) | // 1: x16 sample rate
SERCOM_USART_CTRLA_MODE_USART_INT_CLK);
/* set baudrate */
dev->BAUD.FRAC.FP = (baud % 10);