diff --git a/cpu/stm32_common/include/periph_cpu_common.h b/cpu/stm32_common/include/periph_cpu_common.h index 588515cef8..a24dd71c1e 100644 --- a/cpu/stm32_common/include/periph_cpu_common.h +++ b/cpu/stm32_common/include/periph_cpu_common.h @@ -25,6 +25,11 @@ extern "C" { #endif +/** + * @brief Length of the CPU_ID in octets + */ +#define CPUID_LEN (12U) + /** * @brief Use the shared SPI functions * @{ diff --git a/cpu/stm32l1/periph/cpuid.c b/cpu/stm32_common/periph/cpuid.c similarity index 54% rename from cpu/stm32l1/periph/cpuid.c rename to cpu/stm32_common/periph/cpuid.c index beae57016b..cb34622079 100644 --- a/cpu/stm32l1/periph/cpuid.c +++ b/cpu/stm32_common/periph/cpuid.c @@ -1,5 +1,6 @@ /* * Copyright (C) 2014-2016 Freie Universität Berlin + * Copyright (C) 2015 James Hollister * * This file is subject to the terms and conditions of the GNU Lesser * General Public License v2.1. See the file LICENSE in the top level @@ -7,24 +8,27 @@ */ /** - * @addtogroup cpu_stm32l1 + * @addtogroup cpu_stm32_common * @{ * * @file - * @brief Low-level CPUID driver implementation + * @brief Implementation of the CPUID driver interface * * @author Thomas Eichinger + * @author James Hollister + * @author Hauke Petersen * * @} */ +#include #include #include "periph/cpuid.h" -extern volatile uint32_t _cpuid_address[3]; +extern uint32_t *_cpuid_address; void cpuid_get(void *id) { - memcpy(id, (void *)(&_cpuid_address), CPUID_LEN); + memcpy(id, _cpuid_address, CPUID_LEN); } diff --git a/cpu/stm32f0/include/periph_cpu.h b/cpu/stm32f0/include/periph_cpu.h index d4a3fee688..d2a7560684 100644 --- a/cpu/stm32f0/include/periph_cpu.h +++ b/cpu/stm32f0/include/periph_cpu.h @@ -19,26 +19,13 @@ #ifndef PERIPH_CPU_H #define PERIPH_CPU_H -#include "cpu.h" #include "periph_cpu_common.h" #ifdef __cplusplus extern "C" { #endif -/** - * @brief Length of the CPU_ID in octets - */ -#define CPUID_LEN (12U) - -/** - * @brief declare needed generic SPI functions - * @{ - */ -#define PERIPH_SPI_NEEDS_TRANSFER_BYTES -#define PERIPH_SPI_NEEDS_TRANSFER_REG -#define PERIPH_SPI_NEEDS_TRANSFER_REGS -/** @} */ +/* to be filled */ #ifdef __cplusplus } diff --git a/cpu/stm32f0/ldscripts/stm32f051r8.ld b/cpu/stm32f0/ldscripts/stm32f051r8.ld index f22058a95e..73cf275797 100644 --- a/cpu/stm32f0/ldscripts/stm32f051r8.ld +++ b/cpu/stm32f0/ldscripts/stm32f051r8.ld @@ -22,6 +22,9 @@ MEMORY { rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K + cpuid (r) : ORIGIN = 0x1ffff7ac, LENGTH = 12 } +_cpuid_address = ORIGIN(cpuid); + INCLUDE cortexm_base.ld diff --git a/cpu/stm32f0/ldscripts/stm32f091rc.ld b/cpu/stm32f0/ldscripts/stm32f091rc.ld index ebe346988c..810b690eb6 100644 --- a/cpu/stm32f0/ldscripts/stm32f091rc.ld +++ b/cpu/stm32f0/ldscripts/stm32f091rc.ld @@ -22,6 +22,9 @@ MEMORY { rom (rx) : ORIGIN = 0x08000000, LENGTH = 256K ram (rwx) : ORIGIN = 0x20000000, LENGTH = 32K + cpuid (r) : ORIGIN = 0x1ffff7ac, LENGTH = 12 } +_cpuid_address = ORIGIN(cpuid); + INCLUDE cortexm_base.ld diff --git a/cpu/stm32f0/periph/cpuid.c b/cpu/stm32f0/periph/cpuid.c deleted file mode 100644 index aea2cfd9d4..0000000000 --- a/cpu/stm32f0/periph/cpuid.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (C) 2015 James Hollister - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @addtogroup cpu_stm32f0 - * @{ - * - * @file - * @brief Low-level CPUID driver implementation - * - * @author James Hollister - * - * @} - */ - -#include - -#include "periph/cpuid.h" - -#define STM32F0_CPUID_ADDR (0x1ffff7ac) - -void cpuid_get(void *id) -{ - memcpy(id, (void *)(STM32F0_CPUID_ADDR), CPUID_LEN); -} diff --git a/cpu/stm32f1/include/periph_cpu.h b/cpu/stm32f1/include/periph_cpu.h index dd5825d257..7bcd4550ea 100644 --- a/cpu/stm32f1/include/periph_cpu.h +++ b/cpu/stm32f1/include/periph_cpu.h @@ -19,7 +19,6 @@ #ifndef PERIPH_CPU_H #define PERIPH_CPU_H -#include "cpu.h" #include "periph_cpu_common.h" #ifdef __cplusplus @@ -44,11 +43,6 @@ typedef uint32_t gpio_t; */ #define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y) -/** - * @brief Length of the CPU_ID in octets - */ -#define CPUID_LEN (12U) - /** * @brief Override values for pull register configuration * @{ diff --git a/cpu/stm32f1/ldscripts/stm32f103c8.ld b/cpu/stm32f1/ldscripts/stm32f103c8.ld index 4b7d38c942..ba67be616d 100644 --- a/cpu/stm32f1/ldscripts/stm32f103c8.ld +++ b/cpu/stm32f1/ldscripts/stm32f103c8.ld @@ -22,6 +22,9 @@ MEMORY { rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K + cpuid (r) : ORIGIN = 0x1ffff7e8, LENGTH = 12 } +_cpuid_address = ORIGIN(cpuid); + INCLUDE cortexm_base.ld diff --git a/cpu/stm32f1/ldscripts/stm32f103cb.ld b/cpu/stm32f1/ldscripts/stm32f103cb.ld index ede19622a4..601fb652c6 100644 --- a/cpu/stm32f1/ldscripts/stm32f103cb.ld +++ b/cpu/stm32f1/ldscripts/stm32f103cb.ld @@ -22,6 +22,9 @@ MEMORY { rom (rx) : ORIGIN = 0x08005000, LENGTH = 128K-0x5000 ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K + cpuid (r) : ORIGIN = 0x1ffff7e8, LENGTH = 12 } +_cpuid_address = ORIGIN(cpuid); + INCLUDE cortexm_base.ld diff --git a/cpu/stm32f1/ldscripts/stm32f103rb.ld b/cpu/stm32f1/ldscripts/stm32f103rb.ld index 8412a07e07..4098fca666 100644 --- a/cpu/stm32f1/ldscripts/stm32f103rb.ld +++ b/cpu/stm32f1/ldscripts/stm32f103rb.ld @@ -22,6 +22,9 @@ MEMORY { rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K ram (xrw) : ORIGIN = 0x20000000, LENGTH = 20K + cpuid (r) : ORIGIN = 0x1ffff7e8, LENGTH = 12 } +_cpuid_address = ORIGIN(cpuid); + INCLUDE cortexm_base.ld diff --git a/cpu/stm32f1/ldscripts/stm32f103re.ld b/cpu/stm32f1/ldscripts/stm32f103re.ld index af84488fe6..a322d128e3 100644 --- a/cpu/stm32f1/ldscripts/stm32f103re.ld +++ b/cpu/stm32f1/ldscripts/stm32f103re.ld @@ -22,6 +22,9 @@ MEMORY { rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K ram (xrw) : ORIGIN = 0x20000000, LENGTH = 64K + cpuid (r) : ORIGIN = 0x1ffff7e8, LENGTH = 12 } +_cpuid_address = ORIGIN(cpuid); + INCLUDE cortexm_base.ld diff --git a/cpu/stm32f1/periph/cpuid.c b/cpu/stm32f1/periph/cpuid.c deleted file mode 100644 index 9e5ebfb9e8..0000000000 --- a/cpu/stm32f1/periph/cpuid.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Copyright (C) 2014-2016 Freie Universität Berlin - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @addtogroup cpu_stm32f1 - * @{ - * - * @file - * @brief Low-level CPUID driver implementation - * - * @author Thomas Eichinger - * - * @} - */ - -#include - -#include "periph/cpuid.h" - -void cpuid_get(void *id) -{ - memcpy(id, (void *)(0x1ffff7e8), CPUID_LEN); -} diff --git a/cpu/stm32f3/include/periph_cpu.h b/cpu/stm32f3/include/periph_cpu.h index acb94896a8..bfb65319cf 100644 --- a/cpu/stm32f3/include/periph_cpu.h +++ b/cpu/stm32f3/include/periph_cpu.h @@ -19,7 +19,6 @@ #ifndef PERIPH_CPU_H #define PERIPH_CPU_H -#include "cpu.h" #include "periph_cpu_common.h" #ifdef __cplusplus @@ -44,11 +43,6 @@ typedef uint32_t gpio_t; */ #define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y) -/** - * @brief Length of the CPU_ID in octets - */ -#define CPUID_LEN (12U) - /** * @brief Available ports on the STM32F3 family */ diff --git a/cpu/stm32f3/ldscripts/stm32f303re.ld b/cpu/stm32f3/ldscripts/stm32f303re.ld index 59c32208f6..709382490f 100644 --- a/cpu/stm32f3/ldscripts/stm32f303re.ld +++ b/cpu/stm32f3/ldscripts/stm32f303re.ld @@ -25,6 +25,9 @@ MEMORY rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 16K + cpuid (r) : ORIGIN = 0x1ffff7ac, LENGTH = 12 } +_cpuid_address = ORIGIN(cpuid); + INCLUDE cortexm_base.ld diff --git a/cpu/stm32f3/ldscripts/stm32f303vc.ld b/cpu/stm32f3/ldscripts/stm32f303vc.ld index 7f928b387c..cccb3c61ef 100644 --- a/cpu/stm32f3/ldscripts/stm32f303vc.ld +++ b/cpu/stm32f3/ldscripts/stm32f303vc.ld @@ -23,6 +23,9 @@ MEMORY rom (rx) : ORIGIN = 0x08000000, LENGTH = 256K ram (rwx) : ORIGIN = 0x20000000, LENGTH = 40K ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 8K + cpuid (r) : ORIGIN = 0x1ffff7ac, LENGTH = 12 } +_cpuid_address = ORIGIN(cpuid); + INCLUDE cortexm_base.ld diff --git a/cpu/stm32f3/ldscripts/stm32f334r8.ld b/cpu/stm32f3/ldscripts/stm32f334r8.ld index dbf9a07e01..a2c1cbcca4 100644 --- a/cpu/stm32f3/ldscripts/stm32f334r8.ld +++ b/cpu/stm32f3/ldscripts/stm32f334r8.ld @@ -23,6 +23,9 @@ MEMORY rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K ram (rwx) : ORIGIN = 0x20000000, LENGTH = 12K ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 4K + cpuid (r) : ORIGIN = 0x1ffff7ac, LENGTH = 12 } +_cpuid_address = ORIGIN(cpuid); + INCLUDE cortexm_base.ld diff --git a/cpu/stm32f3/periph/cpuid.c b/cpu/stm32f3/periph/cpuid.c deleted file mode 100644 index 8ebad6568e..0000000000 --- a/cpu/stm32f3/periph/cpuid.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (C) 2015 James Hollister - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @addtogroup cpu_stm32f3 - * @{ - * - * @file - * @brief Low-level CPUID driver implementation - * - * @author James Hollister - * - * @} - */ - -#include - -#include "periph/cpuid.h" - -#define STM32F3_CPUID_ADDR (0x1ffff7ac) - -void cpuid_get(void *id) -{ - memcpy(id, (void *)(STM32F3_CPUID_ADDR), CPUID_LEN); -} diff --git a/cpu/stm32f4/include/periph_cpu.h b/cpu/stm32f4/include/periph_cpu.h index d6b21e4a92..eb3bab81b4 100644 --- a/cpu/stm32f4/include/periph_cpu.h +++ b/cpu/stm32f4/include/periph_cpu.h @@ -19,7 +19,6 @@ #ifndef PERIPH_CPU_H #define PERIPH_CPU_H -#include "cpu.h" #include "periph_cpu_common.h" #ifdef __cplusplus @@ -44,11 +43,6 @@ typedef uint32_t gpio_t; */ #define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y) -/** - * @brief Length of the CPU_ID in octets - */ -#define CPUID_LEN (12U) - /** * @brief Available ports on the STM32F4 family */ diff --git a/cpu/stm32f4/ldscripts/stm32f401re.ld b/cpu/stm32f4/ldscripts/stm32f401re.ld index 31072ce8fc..7f9a6ceda6 100644 --- a/cpu/stm32f4/ldscripts/stm32f401re.ld +++ b/cpu/stm32f4/ldscripts/stm32f401re.ld @@ -22,6 +22,9 @@ MEMORY { rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K ram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K + cpuid (r) : ORIGIN = 0x1fff7a10, LENGTH = 12 } +_cpuid_address = ORIGIN(cpuid); + INCLUDE cortexm_base.ld diff --git a/cpu/stm32f4/ldscripts/stm32f407vg.ld b/cpu/stm32f4/ldscripts/stm32f407vg.ld index 498a707bde..2129121ba7 100644 --- a/cpu/stm32f4/ldscripts/stm32f407vg.ld +++ b/cpu/stm32f4/ldscripts/stm32f407vg.ld @@ -23,6 +23,9 @@ MEMORY rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 64K + cpuid (r) : ORIGIN = 0x1fff7a10, LENGTH = 12 } +_cpuid_address = ORIGIN(cpuid); + INCLUDE cortexm_base.ld diff --git a/cpu/stm32f4/ldscripts/stm32f415rg.ld b/cpu/stm32f4/ldscripts/stm32f415rg.ld index d3bbc4074f..08f4040aa4 100644 --- a/cpu/stm32f4/ldscripts/stm32f415rg.ld +++ b/cpu/stm32f4/ldscripts/stm32f415rg.ld @@ -23,6 +23,9 @@ MEMORY rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K ram (rwx) : ORIGIN = 0x20000000, LENGTH = 128K ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 64K + cpuid (r) : ORIGIN = 0x1fff7a10, LENGTH = 12 } +_cpuid_address = ORIGIN(cpuid); + INCLUDE cortexm_base.ld diff --git a/cpu/stm32f4/periph/cpuid.c b/cpu/stm32f4/periph/cpuid.c deleted file mode 100644 index 90249869c6..0000000000 --- a/cpu/stm32f4/periph/cpuid.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (C) 2015 James Hollister - * - * This file is subject to the terms and conditions of the GNU Lesser - * General Public License v2.1. See the file LICENSE in the top level - * directory for more details. - */ - -/** - * @addtogroup cpu_stm32f4 - * @{ - * - * @file - * @brief Low-level CPUID driver implementation - * - * @author James Hollister - * - * @} - */ - -#include - -#include "periph/cpuid.h" - -#define STM32F4_CPUID_ADDR (0x1fff7a10) - -void cpuid_get(void *id) -{ - memcpy(id, (void *)(STM32F4_CPUID_ADDR), CPUID_LEN); -} diff --git a/cpu/stm32l1/include/periph_cpu.h b/cpu/stm32l1/include/periph_cpu.h index 2e7a9402e7..395881c530 100644 --- a/cpu/stm32l1/include/periph_cpu.h +++ b/cpu/stm32l1/include/periph_cpu.h @@ -21,7 +21,6 @@ #ifndef PERIPH_CPU_H #define PERIPH_CPU_H -#include "cpu.h" #include "periph_cpu_common.h" #ifdef __cplusplus @@ -46,11 +45,6 @@ typedef uint32_t gpio_t; */ #define GPIO_PIN(x, y) ((GPIOA_BASE + (x << 10)) | y) -/** - * @brief Length of the CPU_ID in octets - */ -#define CPUID_LEN (12U) - /** * @brief Available ports on the STM32L1 family */ diff --git a/cpu/stm32l1/ldscripts/stm32l151rba.ld b/cpu/stm32l1/ldscripts/stm32l151rba.ld index 17339c3fac..18148d6fc9 100644 --- a/cpu/stm32l1/ldscripts/stm32l151rba.ld +++ b/cpu/stm32l1/ldscripts/stm32l151rba.ld @@ -22,12 +22,6 @@ MEMORY { rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K ram (rw) : ORIGIN = 0x20000000, LENGTH = 32K - - /* see STM32L1 Reference Manual (31.2 Unique device ID registers (96 bits)) - * Base address: - * - 0x1FF80050 for Cat.1 and Cat.2 devices - * - 0x1FF800D0 for Cat.3, Cat.4, Cat.5 and Cat.6 devices - */ cpuid (r) : ORIGIN = 0x1ff80050, LENGTH = 12 } diff --git a/cpu/stm32l1/ldscripts/stm32l151rc.ld b/cpu/stm32l1/ldscripts/stm32l151rc.ld index 38f061b5e3..af1d52132c 100644 --- a/cpu/stm32l1/ldscripts/stm32l151rc.ld +++ b/cpu/stm32l1/ldscripts/stm32l151rc.ld @@ -22,12 +22,6 @@ MEMORY { rom (rx) : ORIGIN = 0x08000000, LENGTH = 256K ram (xrw) : ORIGIN = 0x20000000, LENGTH = 32K - - /* see STM32L1 Reference Manual (31.2 Unique device ID registers (96 bits)) - * Base address: - * - 0x1FF80050 for Cat.1 and Cat.2 devices - * - 0x1FF800D0 for Cat.3, Cat.4, Cat.5 and Cat.6 devices - */ cpuid (r) : ORIGIN = 0x1ff800d0, LENGTH = 12 } diff --git a/cpu/stm32l1/ldscripts/stm32l152ret6.ld b/cpu/stm32l1/ldscripts/stm32l152ret6.ld index c98faaae2c..24a844c095 100644 --- a/cpu/stm32l1/ldscripts/stm32l152ret6.ld +++ b/cpu/stm32l1/ldscripts/stm32l152ret6.ld @@ -22,12 +22,6 @@ MEMORY { rom (rx) : ORIGIN = 0x08000000, LENGTH = 512K ram (xrw) : ORIGIN = 0x20000000, LENGTH = 80K - - /* see STM32L1 Reference Manual (31.2 Unique device ID registers (96 bits)) - * Base address: - * - 0x1FF80050 for Cat.1 and Cat.2 devices - * - 0x1FF800D0 for Cat.3, Cat.4, Cat.5 and Cat.6 devices - */ cpuid (r) : ORIGIN = 0x1ff800d0, LENGTH = 12 }