From eac6a5464873173f24649c9e1f47b487616b1dbe Mon Sep 17 00:00:00 2001
From: Alexandre Abadie <alexandre.abadie@inria.fr>
Date: Fri, 29 Mar 2019 22:57:03 +0100
Subject: [PATCH] stm32_common/rtt: add support for stm32f7

---
 cpu/stm32_common/periph/rtt.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/cpu/stm32_common/periph/rtt.c b/cpu/stm32_common/periph/rtt.c
index e215020ba7..6c4e8dc773 100644
--- a/cpu/stm32_common/periph/rtt.c
+++ b/cpu/stm32_common/periph/rtt.c
@@ -49,15 +49,7 @@
 #endif
 
 
-#if !defined(CPU_FAM_STM32F4)
-#define CLOCK_SRC_REG       RCC->CCIPR
-#define CLOCK_SRC_MASK      RCC_CCIPR_LPTIM1SEL
-#if CLOCK_LSE
-#define CLOCK_SRC_CFG       (RCC_CCIPR_LPTIM1SEL_1 | RCC_CCIPR_LPTIM1SEL_0)
-#else
-#define CLOCK_SRC_CFG       (RCC_CCIPR_LPTIM1SEL_0)
-#endif
-#else
+#if defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32F7)
 #define CLOCK_SRC_REG       RCC->DCKCFGR2
 #define CLOCK_SRC_MASK      RCC_DCKCFGR2_LPTIM1SEL
 #if CLOCK_LSE
@@ -65,6 +57,14 @@
 #else
 #define CLOCK_SRC_CFG       (RCC_DCKCFGR2_LPTIM1SEL_0)
 #endif
+#else
+#define CLOCK_SRC_REG       RCC->CCIPR
+#define CLOCK_SRC_MASK      RCC_CCIPR_LPTIM1SEL
+#if CLOCK_LSE
+#define CLOCK_SRC_CFG       (RCC_CCIPR_LPTIM1SEL_1 | RCC_CCIPR_LPTIM1SEL_0)
+#else
+#define CLOCK_SRC_CFG       (RCC_CCIPR_LPTIM1SEL_0)
+#endif
 #endif