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boards/nucleo-g431rb: added PWM configuration

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This commit is contained in:
Dave VanKampen 2021-10-21 08:25:54 -04:00
parent e86370cf4b
commit eb09d2dafb
3 changed files with 22 additions and 0 deletions
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1
boards/nucleo-g431rb/Kconfig
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@ -17,6 +17,7 @@ config BOARD_NUCLEO_G431RB
# Put defined MCU peripherals here (in alphabetical order) # Put defined MCU peripherals here (in alphabetical order)
select HAS_PERIPH_I2C select HAS_PERIPH_I2C
select HAS_PERIPH_LPUART select HAS_PERIPH_LPUART
select HAS_PERIPH_PWM
select HAS_PERIPH_RTC select HAS_PERIPH_RTC
select HAS_PERIPH_RTT select HAS_PERIPH_RTT
select HAS_PERIPH_SPI select HAS_PERIPH_SPI

1
boards/nucleo-g431rb/Makefile.features
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@ -3,6 +3,7 @@ CPU_MODEL = stm32g431rb
# Put defined MCU peripherals here (in alphabetical order) # Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_i2c FEATURES_PROVIDED += periph_i2c
FEATURES_PROVIDED += periph_pwm
FEATURES_PROVIDED += periph_rtc FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_spi FEATURES_PROVIDED += periph_spi

20
boards/nucleo-g431rb/include/periph_conf.h
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@ -102,6 +102,26 @@ static const spi_conf_t spi_config[] = {
#define SPI_NUMOF ARRAY_SIZE(spi_config) #define SPI_NUMOF ARRAY_SIZE(spi_config)
/** @} */ /** @} */
/**
* @name PWM configuration
* @{
*/
static const pwm_conf_t pwm_config[] = {
{
.dev = TIM3,
.rcc_mask = RCC_APB1ENR1_TIM3EN,
.chan = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0 },
{ .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1 },
{ .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 },
{ .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } },
.af = GPIO_AF2,
.bus = APB1
}
};
#define PWM_NUMOF ARRAY_SIZE(pwm_config)
/** @} */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif