Merge pull request #17320 from aabadie/pr/cpu/stm32_ztimer
cpu/stm32: migrate adc and eth periphs to ztimer
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commit
ec39b8e3aa
@ -24,7 +24,8 @@ ifneq (,$(filter stm32_eth,$(USEMODULE)))
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FEATURES_REQUIRED += periph_eth
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USEMODULE += netdev_eth
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USEMODULE += iolist
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USEMODULE += xtimer
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USEMODULE += ztimer
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USEMODULE += ztimer_msec
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endif
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ifneq (,$(filter periph_can,$(FEATURES_USED)))
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@ -42,7 +43,7 @@ ifneq (,$(filter periph_rtc_mem,$(USEMODULE)))
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endif
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ifneq (,$(filter periph_adc,$(FEATURES_USED)))
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ifneq (,$(filter $(CPU_FAM),wl))
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ifneq (,$(filter f3 l4 wl, $(CPU_FAM)))
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USEMODULE += ztimer
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USEMODULE += ztimer_msec
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endif
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@ -31,6 +31,6 @@ config MODULE_PERIPH_CAN
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config MODULE_PERIPH_ADC
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bool "ADC peripheral driver"
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depends on HAS_PERIPH_ADC
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select MODULE_ZTIMER if HAS_CPU_STM32WL
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select MODULE_ZTIMER_MSEC if HAS_CPU_STM32WL
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select MODULE_ZTIMER if HAS_CPU_STM32F3 || HAS_CPU_STM32L4 || HAS_CPU_STM32WL
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select MODULE_ZTIMER_MSEC if HAS_CPU_STM32F3 || HAS_CPU_STM32L4 || HAS_CPU_STM32WL
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select MODULE_PERIPH_COMMON
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@ -23,7 +23,7 @@
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#include "mutex.h"
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#include "periph/adc.h"
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#include "periph_conf.h"
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#include "xtimer.h"
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#include "ztimer.h"
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#define SMP_MIN (0x2) /*< Sampling time for slow channels
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(0x2 = 4.5 ADC clock cycles) */
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@ -134,7 +134,13 @@ int adc_init(adc_t line)
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if (!(dev(line)->CR & ADC_CR_ADEN)) {
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/* Enable ADC internal voltage regulator and wait for startup period */
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dev(line)->CR |= ADC_CR_ADVREGEN;
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xtimer_usleep(ADC_T_ADCVREG_STUP_US);
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#if IS_USED(MODULE_ZTIMER_USEC)
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ztimer_sleep(ZTIMER_USEC, ADC_T_ADCVREG_STUP_US);
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#else
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/* to avoid using ZTIMER_USEC unless already included round up the
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internal voltage regulator start up to 1ms */
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ztimer_sleep(ZTIMER_MSEC, 1);
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#endif
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if (dev(line)->DIFSEL & (1 << adc_config[line].chan)) {
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/* Configure calibration for differential inputs */
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@ -25,7 +25,7 @@
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#include "mutex.h"
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#include "periph/adc.h"
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#include "periph_conf.h"
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#include "xtimer.h"
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#include "ztimer.h"
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/**
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* @brief map CPU specific register/value names
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@ -138,7 +138,13 @@ int adc_init(adc_t line)
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/* enable ADC internal voltage regulator and wait for startup period */
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dev(line)->ADC_CR_REG |= (ADC_CR_ADVREGEN);
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xtimer_usleep(ADC_T_ADCVREG_STUP_US);
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#if IS_USED(MODULE_ZTIMER_USEC)
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ztimer_sleep(ZTIMER_USEC, ADC_T_ADCVREG_STUP_US);
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#else
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/* to avoid using ZTIMER_USEC unless already included round up the
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internal voltage regulator start up to 1ms */
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ztimer_sleep(ZTIMER_MSEC, 1);
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#endif
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/* configure calibration for single ended input */
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dev(line)->ADC_CR_REG &= ~(ADC_CR_ADCALDIF);
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@ -38,10 +38,10 @@
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#define ENABLE_DEBUG_VERBOSE 0
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#include "debug.h"
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#include "xtimer.h"
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#define STM32_ETH_LINK_UP_TIMEOUT_US (1UL * US_PER_SEC)
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#include "ztimer.h"
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#define STM32_ETH_LINK_UP_TIMEOUT_MS (1UL * MS_PER_SEC)
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static xtimer_t _link_status_timer;
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static ztimer_t _link_status_timer;
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/* Set the value of the divider with the clock configured */
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#if !defined(CLOCK_CORECLOCK) || CLOCK_CORECLOCK < (20000000U)
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@ -322,7 +322,7 @@ static void _timer_cb(void *arg)
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dev->event_callback(dev, NETDEV_EVENT_ISR);
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}
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xtimer_set(&_link_status_timer, STM32_ETH_LINK_UP_TIMEOUT_US);
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ztimer_set(ZTIMER_MSEC, &_link_status_timer, STM32_ETH_LINK_UP_TIMEOUT_MS);
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}
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static bool _phy_can_negotiate(void)
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@ -411,7 +411,7 @@ static int stm32_eth_init(netdev_t *netdev)
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if (IS_USED(MODULE_STM32_ETH_LINK_UP)) {
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_link_status_timer.callback = _timer_cb;
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_link_status_timer.arg = netdev;
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xtimer_set(&_link_status_timer, STM32_ETH_LINK_UP_TIMEOUT_US);
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ztimer_set(ZTIMER_MSEC, &_link_status_timer, STM32_ETH_LINK_UP_TIMEOUT_MS);
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}
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/* The PTP clock is initialized prior to the netdevs and will have already
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