cpu/esp32: additional _ removed from __uart_*
An additional _ for static symbols has been added by mistake and should be removed. This will make future merging with the reimplementation of ESP8266 easier.
This commit is contained in:
Gunar Schorcht
parent
6bbd3a5c27
commit
ec44ee7fb8
@ -61,7 +61,7 @@ struct uart_hw_t {
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};
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/* hardware ressources */
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static struct uart_hw_t __uarts[] = {
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static struct uart_hw_t _uarts[] = {
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{
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.regs = &UART0,
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.pin_txd = GPIO1,
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@ -100,50 +100,50 @@ static struct uart_hw_t __uarts[] = {
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extern void uart_div_modify(uint8_t uart_no, uint32_t div);
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/* forward declaration of internal functions */
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static uint8_t IRAM __uart_rx_one_char (uart_t uart);
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static void __uart_tx_one_char(uart_t uart, uint8_t data);
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static void __uart_intr_enable (uart_t uart);
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static void IRAM __uart_intr_handler (void *para);
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static uint8_t IRAM _uart_rx_one_char (uart_t uart);
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static void _uart_tx_one_char(uart_t uart, uint8_t data);
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static void _uart_intr_enable (uart_t uart);
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static void IRAM _uart_intr_handler (void *para);
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void __uart_config (uart_t uart)
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void _uart_config (uart_t uart)
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{
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CHECK_PARAM (uart < UART_NUMOF);
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/* setup the baudrate */
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if (uart == UART_DEV(0) || uart == UART_DEV(1)) {
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/* for UART0 and UART1, we can us the ROM function */
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uart_div_modify(uart, (UART_CLK_FREQ << 4) / __uarts[uart].baudrate);
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uart_div_modify(uart, (UART_CLK_FREQ << 4) / _uarts[uart].baudrate);
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}
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else {
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/* for UART2, we have to control it by registers */
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__uarts[uart].regs->conf0.tick_ref_always_on = 1; /* use APB_CLK */
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_uarts[uart].regs->conf0.tick_ref_always_on = 1; /* use APB_CLK */
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/* compute and set the integral and the decimal part */
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uint32_t clk = (UART_CLK_FREQ << 4) / __uarts[uart].baudrate;
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__uarts[uart].regs->clk_div.div_int = clk >> 4;
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__uarts[uart].regs->clk_div.div_frag = clk & 0xf;
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uint32_t clk = (UART_CLK_FREQ << 4) / _uarts[uart].baudrate;
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_uarts[uart].regs->clk_div.div_int = clk >> 4;
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_uarts[uart].regs->clk_div.div_frag = clk & 0xf;
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}
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/* set 8 data bits */
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__uarts[uart].regs->conf0.bit_num = 3;
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_uarts[uart].regs->conf0.bit_num = 3;
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/* reset the FIFOs */
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__uarts[uart].regs->conf0.rxfifo_rst = 1;
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__uarts[uart].regs->conf0.rxfifo_rst = 0;
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__uarts[uart].regs->conf0.txfifo_rst = 1;
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__uarts[uart].regs->conf0.txfifo_rst = 0;
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_uarts[uart].regs->conf0.rxfifo_rst = 1;
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_uarts[uart].regs->conf0.rxfifo_rst = 0;
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_uarts[uart].regs->conf0.txfifo_rst = 1;
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_uarts[uart].regs->conf0.txfifo_rst = 0;
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if (__uarts[uart].isr_ctx.rx_cb) {
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if (_uarts[uart].isr_ctx.rx_cb) {
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/* since reading can only be done byte by byte, we set
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UART_RXFIFO_FULL_THRHD interrupt level to 1 byte */
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__uarts[uart].regs->conf1.rxfifo_full_thrhd = 1;
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_uarts[uart].regs->conf1.rxfifo_full_thrhd = 1;
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/* enable the RX FIFO FULL interrupt */
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__uart_intr_enable (uart);
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_uart_intr_enable (uart);
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/* route all UART interrupt sources to same the CPU interrupt */
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intr_matrix_set(PRO_CPU_NUM, __uarts[uart].int_src, CPU_INUM_UART);
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intr_matrix_set(PRO_CPU_NUM, _uarts[uart].int_src, CPU_INUM_UART);
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/* we have to enable therefore the CPU interrupt here */
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xt_set_interrupt_handler(CPU_INUM_UART, __uart_intr_handler, NULL);
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xt_set_interrupt_handler(CPU_INUM_UART, _uart_intr_handler, NULL);
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xt_ints_on(BIT(CPU_INUM_UART));
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}
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}
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@ -158,36 +158,36 @@ int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, void *arg)
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if (uart == UART_DEV(1) || uart == UART_DEV(2)) {
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/* reset the pins when they were already used as UART pins */
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if (gpio_get_pin_usage(__uarts[uart].pin_txd) == _UART) {
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gpio_set_pin_usage(__uarts[uart].pin_txd, _GPIO);
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if (gpio_get_pin_usage(_uarts[uart].pin_txd) == _UART) {
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gpio_set_pin_usage(_uarts[uart].pin_txd, _GPIO);
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}
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if (gpio_get_pin_usage(__uarts[uart].pin_rxd) == _UART) {
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gpio_set_pin_usage(__uarts[uart].pin_rxd, _GPIO);
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if (gpio_get_pin_usage(_uarts[uart].pin_rxd) == _UART) {
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gpio_set_pin_usage(_uarts[uart].pin_rxd, _GPIO);
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}
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/* try to initialize the pins as GPIOs first */
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if (gpio_init (__uarts[uart].pin_txd, GPIO_OUT) ||
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gpio_init (__uarts[uart].pin_rxd, GPIO_IN)) {
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if (gpio_init (_uarts[uart].pin_txd, GPIO_OUT) ||
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gpio_init (_uarts[uart].pin_rxd, GPIO_IN)) {
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return -1;
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}
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/* store the usage type in GPIO table */
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gpio_set_pin_usage(__uarts[uart].pin_txd, _UART);
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gpio_set_pin_usage(__uarts[uart].pin_rxd, _UART);
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gpio_set_pin_usage(_uarts[uart].pin_txd, _UART);
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gpio_set_pin_usage(_uarts[uart].pin_rxd, _UART);
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/* connect TxD pin to the TxD output signal through the GPIO matrix */
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GPIO.func_out_sel_cfg[__uarts[uart].pin_txd].func_sel = __uarts[uart].signal_txd;
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GPIO.func_out_sel_cfg[_uarts[uart].pin_txd].func_sel = _uarts[uart].signal_txd;
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/* connect RxD input signal to the RxD pin through the GPIO matrix */
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GPIO.func_in_sel_cfg[__uarts[uart].signal_rxd].sig_in_sel = 1;
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GPIO.func_in_sel_cfg[__uarts[uart].signal_rxd].sig_in_inv = 0;
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GPIO.func_in_sel_cfg[__uarts[uart].signal_rxd].func_sel = __uarts[uart].pin_rxd;
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GPIO.func_in_sel_cfg[_uarts[uart].signal_rxd].sig_in_sel = 1;
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GPIO.func_in_sel_cfg[_uarts[uart].signal_rxd].sig_in_inv = 0;
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GPIO.func_in_sel_cfg[_uarts[uart].signal_rxd].func_sel = _uarts[uart].pin_rxd;
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}
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__uarts[uart].baudrate = baudrate;
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_uarts[uart].baudrate = baudrate;
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/* register interrupt context */
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__uarts[uart].isr_ctx.rx_cb = rx_cb;
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__uarts[uart].isr_ctx.arg = arg;
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_uarts[uart].isr_ctx.rx_cb = rx_cb;
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_uarts[uart].isr_ctx.arg = arg;
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/* enable and configure the according UART module */
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uart_poweron(uart);
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@ -200,7 +200,7 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
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CHECK_PARAM (uart < UART_NUMOF);
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for (size_t i = 0; i < len; i++) {
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__uart_tx_one_char(uart, data[i]);
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_uart_tx_one_char(uart, data[i]);
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}
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}
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@ -209,17 +209,17 @@ void uart_poweron (uart_t uart)
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switch (uart) {
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#if UART_NUMOF
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case 0: periph_module_enable(PERIPH_UART0_MODULE);
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__uart_config(uart);
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_uart_config(uart);
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break;
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#endif
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#if UART_NUMOF > 1
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case 1: periph_module_enable(PERIPH_UART1_MODULE);
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__uart_config(uart);
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_uart_config(uart);
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break;
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#endif
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#if UART_NUMOF > 2
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case 2: periph_module_enable(PERIPH_UART2_MODULE);
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__uart_config(uart);
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_uart_config(uart);
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break;
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#endif
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default: break;
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@ -242,7 +242,7 @@ void uart_poweroff (uart_t uart)
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}
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}
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void IRAM __uart_intr_handler (void *arg)
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void IRAM _uart_intr_handler (void *arg)
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{
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/* to satisfy the compiler */
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(void)arg;
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@ -252,23 +252,23 @@ void IRAM __uart_intr_handler (void *arg)
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/* UART0, UART1, UART2 peripheral interrupt sources are routed to the same
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interrupt, so we have to use the status to distinguish interruptees */
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for (unsigned uart = 0; uart < UART_NUMOF; uart++) {
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if (__uarts[uart].used) {
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if (_uarts[uart].used) {
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DEBUG("%s uart=%d int_st=%08x\n", __func__,
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uart, __uarts[uart].regs->int_st.val);
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uart, _uarts[uart].regs->int_st.val);
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if (__uarts[uart].used && __uarts[uart].regs->int_st.rxfifo_full) {
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if (_uarts[uart].used && _uarts[uart].regs->int_st.rxfifo_full) {
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/* read one byte of data */
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uint8_t data = __uart_rx_one_char (uart);
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uint8_t data = _uart_rx_one_char (uart);
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/* if registered, call the RX callback function */
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if (__uarts[uart].isr_ctx.rx_cb) {
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__uarts[uart].isr_ctx.rx_cb(__uarts[uart].isr_ctx.arg, data);
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if (_uarts[uart].isr_ctx.rx_cb) {
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_uarts[uart].isr_ctx.rx_cb(_uarts[uart].isr_ctx.arg, data);
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}
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/* clear interrupt flag */
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__uarts[uart].regs->int_clr.rxfifo_full = 1;
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_uarts[uart].regs->int_clr.rxfifo_full = 1;
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}
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/* TODO handle other types of interrupts, for the moment just clear them */
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__uarts[uart].regs->int_clr.val = ~0x0;
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_uarts[uart].regs->int_clr.val = ~0x0;
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}
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}
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@ -279,32 +279,32 @@ void IRAM __uart_intr_handler (void *arg)
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#define UART_FIFO_MAX 127
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/* receive one data byte with wait */
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static uint8_t IRAM __uart_rx_one_char (uart_t uart)
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static uint8_t IRAM _uart_rx_one_char (uart_t uart)
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{
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/* wait until at least von byte is in RX FIFO */
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while (!__uarts[uart].regs->status.rxfifo_cnt) {}
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while (!_uarts[uart].regs->status.rxfifo_cnt) {}
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/* read the lowest byte from RX FIFO register */
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return __uarts[uart].regs->fifo.rw_byte;
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return _uarts[uart].regs->fifo.rw_byte;
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}
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/* send one data byte with wait */
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static void __uart_tx_one_char(uart_t uart, uint8_t data)
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static void _uart_tx_one_char(uart_t uart, uint8_t data)
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{
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/* wait until at least one byte is avaiable in the TX FIFO */
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while (__uarts[uart].regs->status.txfifo_cnt >= UART_FIFO_MAX) {}
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while (_uarts[uart].regs->status.txfifo_cnt >= UART_FIFO_MAX) {}
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/* send the byte by placing it in the TX FIFO using MPU */
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WRITE_PERI_REG(UART_FIFO_AHB_REG(uart), data);
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}
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static void __uart_intr_enable(uart_t uart)
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static void _uart_intr_enable(uart_t uart)
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{
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__uarts[uart].regs->int_ena.rxfifo_full = 1;
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__uarts[uart].regs->int_clr.rxfifo_full = 1;
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__uarts[uart].used = true;
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_uarts[uart].regs->int_ena.rxfifo_full = 1;
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_uarts[uart].regs->int_clr.rxfifo_full = 1;
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_uarts[uart].used = true;
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DEBUG("%s %08x\n", __func__, __uarts[uart].regs->int_ena.val);
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DEBUG("%s %08x\n", __func__, _uarts[uart].regs->int_ena.val);
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}
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/* systemwide UART initializations */
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@ -312,7 +312,7 @@ void uart_system_init (void)
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{
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for (unsigned uart = 0; uart < UART_NUMOF; uart++) {
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/* reset all UART interrupt status registers */
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__uarts[uart].regs->int_clr.val = ~0;
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_uarts[uart].regs->int_clr.val = ~0;
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}
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}
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@ -320,7 +320,7 @@ void uart_print_config(void)
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{
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for (unsigned uart = 0; uart < UART_NUMOF; uart++) {
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ets_printf("\tUART_DEV(%d)\ttxd=%d rxd=%d\n", uart,
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__uarts[uart].pin_txd, __uarts[uart].pin_rxd);
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_uarts[uart].pin_txd, _uarts[uart].pin_rxd);
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}
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}
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@ -331,11 +331,11 @@ int uart_set_baudrate(uart_t uart, uint32_t baudrate)
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CHECK_PARAM_RET (uart < UART_NUMOF, -1);
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/* use APB_CLK */
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__uarts[uart].regs->conf0.tick_ref_always_on = 1;
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_uarts[uart].regs->conf0.tick_ref_always_on = 1;
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/* compute and set the integral and the decimal part */
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uint32_t clk = (UART_CLK_FREQ << 4) / baudrate;
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__uarts[uart].regs->clk_div.div_int = clk >> 4;
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__uarts[uart].regs->clk_div.div_frag = clk & 0xf;
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_uarts[uart].regs->clk_div.div_int = clk >> 4;
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_uarts[uart].regs->clk_div.div_frag = clk & 0xf;
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return UART_OK;
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}
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