From ecbe64d6f51326da8f67693cc4a823c6cd09bbe8 Mon Sep 17 00:00:00 2001
From: Vincent Dupont <vincent@otakeys.com>
Date: Thu, 11 May 2017 13:42:43 +0200
Subject: [PATCH] cpu/stm32f4: add stm32f413vg support

---
 cpu/stm32f4/include/cpu_conf.h       |  6 +++++-
 cpu/stm32f4/ldscripts/stm32f413vg.ld | 30 ++++++++++++++++++++++++++++
 cpu/stm32f4/ldscripts/stm32f413zh.ld |  3 +--
 3 files changed, 36 insertions(+), 3 deletions(-)
 create mode 100644 cpu/stm32f4/ldscripts/stm32f413vg.ld

diff --git a/cpu/stm32f4/include/cpu_conf.h b/cpu/stm32f4/include/cpu_conf.h
index efba213cd0..414b78e0d0 100644
--- a/cpu/stm32f4/include/cpu_conf.h
+++ b/cpu/stm32f4/include/cpu_conf.h
@@ -33,7 +33,7 @@
 #include "vendor/stm32f411xe.h"
 #elif defined(CPU_MODEL_STM32F412ZG)
 #include "vendor/stm32f412zx.h"
-#elif defined(CPU_MODEL_STM32F413ZH)
+#elif defined(CPU_MODEL_STM32F413ZH) || defined(CPU_MODEL_STM32F413VG)
 #include "vendor/stm32f413xx.h"
 #elif defined(CPU_MODEL_STM32F415RG)
 #include "vendor/stm32f415xx.h"
@@ -52,7 +52,11 @@ extern "C" {
  * @{
  */
 #define CPU_DEFAULT_IRQ_PRIO            (1U)
+#if defined(CPU_MODEL_STM32F413ZH) || defined(CPU_MODEL_STM32F413VG)
+#define CPU_IRQ_NUMOF                   (102U)
+#else
 #define CPU_IRQ_NUMOF                   (82U)
+#endif
 #define CPU_FLASH_BASE                  FLASH_BASE
 /** @} */
 
diff --git a/cpu/stm32f4/ldscripts/stm32f413vg.ld b/cpu/stm32f4/ldscripts/stm32f413vg.ld
new file mode 100644
index 0000000000..686c03883e
--- /dev/null
+++ b/cpu/stm32f4/ldscripts/stm32f413vg.ld
@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2017 OTA keys S.A.
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @addtogroup      cpu_stm32f4
+ * @{
+ *
+ * @file
+ * @brief           Memory definitions for the STM32F413VG
+ *
+ * @author          Vincent Dupont <vincent@otakeys.com>
+ *
+ * @}
+ */
+
+MEMORY
+{
+    rom (rx)    : ORIGIN = 0x08000000, LENGTH = 1M
+    ram (rwx)   : ORIGIN = 0x20000000, LENGTH = 320K
+    cpuid (r)   : ORIGIN = 0x1fff7a10, LENGTH = 12
+}
+
+_cpuid_address = ORIGIN(cpuid);
+
+INCLUDE cortexm_base.ld
diff --git a/cpu/stm32f4/ldscripts/stm32f413zh.ld b/cpu/stm32f4/ldscripts/stm32f413zh.ld
index cfdbda08ad..cd3d16de4e 100644
--- a/cpu/stm32f4/ldscripts/stm32f413zh.ld
+++ b/cpu/stm32f4/ldscripts/stm32f413zh.ld
@@ -21,8 +21,7 @@
 MEMORY
 {
     rom (rx)    : ORIGIN = 0x08000000, LENGTH = 1536K
-    ram (rwx)   : ORIGIN = 0x20000000, LENGTH = 256K
-    ccmram (rwx): ORIGIN = 0x10000000, LENGTH = 64K
+    ram (rwx)   : ORIGIN = 0x20000000, LENGTH = 320K
     cpuid (r)   : ORIGIN = 0x1fff7a10, LENGTH = 12
 }